Abstract: The present invention relates to a method for producing a compound semiconductor (2), which comprises the following steps: Producing at least one precursor layer stack (11), consisting of a first precursor layer (5.1), a second precursor layer (6), and a third precursor layer (5.2), wherein, in a first stage, the first precursor layer (5.1) is produced by depositing the metals copper, indium, and gallium onto a body (12), and, in a second stage, the second precursor layer (6) is produced by depositing at least one chalcogen, selected from sulfur and selenium, onto the first precursor layer (5.1) and, in a third stage, the third precursor layer (5.2) is produced by depositing the metals copper, indium, and gallium onto the second precursor layer (6); Heat treating the at least one precursor layer stack (11) in a process chamber (13) such that the metals of the first precursor layer (5.1), the at least one chalcogen of the second precursor layer (6), and the metals of the third precursor layer (5.

Abstract: A light emitting device includes a substrate, a conductive electrode connection layer, at least one epitaxial structure and an insulating layer. The substrate had an upper surface and a lower surface opposite to each other. The conductive electrode connection layer is disposed on the upper surface of the substrate and electrically connected with the substrate. The epitaxial structure is disposed on the conductive electrode connection layer and electrically connected with the conductive electrode connection layer, wherein the epitaxial structure has a first peripheral surface. The insulating layer is disposed between the conductive electrode connection layer and the least one epitaxial structure, wherein the insulating layer has a second peripheral surface, and the second peripheral surface is aligned with the first peripheral surface.

Abstract: For a small sensor produced through a MEMS process, when an electrode pad, wiring, or a shield layer is formed in a final step, it is difficult to nondestructively investigate whether a structure for sensing a physical quantity has been processed satisfactorily. In the present invention, in a physical quantity sensor formed from an MEMS structure, in a structure in which a surface electrode having through wiring is formed on the surface of an electrode substrate and the periphery thereof is insulated, forming a shield layer comprising a metallic material on the surface of the electrode substrate in a planar view and providing a space for internal observation inside the shield layer makes it possible to check for internal defects.

Abstract: A microelectromechanical system (MEMS) microphone package including a MEMS microphone die configured to sense acoustic pressure and to generate a signal based on the acoustic pressure. An application specific integrated circuit (ASIC) electrically connects to the MEMS microphone die. The MEMS microphone package includes a molded package spacer that connects to a conductive lid and to a substrate. The molded package spacer forms side walls of the MEMS microphone package and is adapted to route electrical connections from the MEMS microphone die and the ASIC to the substrate.

Abstract: Semiconductor devices and methods of forming the semiconductor devices are provided. The semiconductor devices may include a bit line provided to cross an active region of a substrate, isolation patterns provided on the substrate to face each other in a direction parallel to the bit line, a storage node contact provided between the isolation patterns to be in contact with a source/drain region provided in an upper portion of the active region, and a spacer provided between the bit line and the storage node contact. Here, the isolation patterns may include a material having an etch selectivity with respect to the spacer.

Abstract: A semiconductor component includes a semiconductor body of a first conduction type and a metal layer on the semiconductor body, wherein the metal layer forms with the semiconductor body a Schottky contact along a contact surface. A doping concentration of the first conduction type on the contact surface varies along a direction of the contact surface.

Abstract: A semiconductor device includes a substrate including cell and dummy regions, first channel structures on the cell region and extending in a first direction vertical with respect to the substrate, gate lines surrounding outer sidewalls of the first channel structures and extending in a second direction parallel to the substrate, the gate lines being spaced apart from each other along the first direction, cutting lines between the gate lines on the cell region and extending in the second direction, dummy patterns spaced apart from each other along the first direction on the dummy region, the dummy patterns having a stepped shape along a third direction parallel to the top surface of the substrate and perpendicular to the second direction, at least a portion of the dummy patterns including a same conductive material as that in the gate lines, and dummy lines through the dummy patterns.

Abstract: A semiconductor structure includes a substrate having thereon a dielectric layer. An opening is formed in the dielectric layer. The opening includes a bottom surface and a sidewall surface. A diffusion barrier layer is conformally disposed along the sidewall surface and the bottom surface of the opening. A nucleation metal layer is conformally disposed on the diffusion barrier layer. A bulk metal layer is disposed on the nucleation metal layer. A film-growth retarding layer is disposed between the nucleation metal layer and the bulk metal layer.

Abstract: Discussed is an organic light emitting display device. The organic light emitting display device according to an embodiment includes a first electrode and a second electrode on a substrate to be opposite to each other and at least three emission parts between the first electrode and the second electrode. A first distance between the substrate and the first emission layer, a second distance between the first emission layer and the second emission layer, a third distance between the second emission layer and the third emission layer, and a fourth distance between the third emission layer and the second electrode are different from each other.

Abstract: A light-emitting display device includes a substrate having a plurality of pixels. A first electrode is provided on the substrate for each pixel, and a pixel defining layer defines each of the pixels. The pixel defining layer has an opening to expose the first electrode. A charge injection layer is on the first electrode, and a surface processing layer is on the charge injection layer. The surface processing layer extends from inside the opening of the pixel defining layer to a top surface of the pixel defining layer. The surface processing layer including a plurality of grooves in a portion extending on the top surface of the pixel defining layer. A charge transport layer is on the surface processing layer, a light-emitting layer is on the charge transport layer, and a second electrode is on the light-emitting layer.

Abstract: A semiconductor device is provided which comprises an ESD protection device. The structure of the semiconductor device comprises a p-doped isolated region in which a structure is manufactured which operates as a Silicon Controlled Rectifier which is coupled between an I/O pad and a reference voltage or ground voltage. The semiconductor device also comprises a pnp transistor which is coupled parallel to the Silicon Controlled Rectifier. The base of the transistor is coupled to the gate of the Silicon Controlled Rectifier. In an optional embodiment, the base and gate are also coupled to the I/O pad.

Abstract: An organic EL element includes: a first electrode that is a metal layer; a transparent conductive layer containing indium zinc oxide; and a light-emitting layer, wherein the first electrode, the transparent conductive layer, and the light-emitting layer are stacked, and a ratio of zinc to indium in a vicinity of an interface of the transparent conductive layer is lower than or equal to 0.25, the interface being closer to the light-emitting layer.

Abstract: An organic light emitting diode display including: a plurality of pixel electrodes disposed on a substrate; a pixel defining layer disposed on the pixel electrodes and including a plurality of openings exposing the respective pixel electrodes; a plurality of organic emission layers disposed on the respective pixel electrodes; and intermediate pattern layers respectively disposed between the pixel electrodes and the organic emission layers. The intermediate pattern layers include a plurality of first patterns that are extended while being respectively connected along the openings neighboring along a predetermined path.

Abstract: An organic EL display panel including: a substrate; a first lower electrode and a second lower electrode disposed over the substrate with a gap therebetween in a first direction; a wall separating a space above the first lower electrode and a space above the second lower electrode from one another; organic light-emitting layers respectively disposed in the spaces; and an upper electrode extending over the organic light-emitting layers. The wall includes a first portion disposed over the gap and two second portions each of which is disposed over a different one of the first lower electrode and the second lower electrode. The first portion is between the two second portions in the first direction, and at least a part of a bottom face of the first portion is positioned higher than a bottom face of the second portion.

Abstract: An integrated circuit having a reference device and method of forming the same. A reference device is disclosed having: a fully depleted n-type MOSFET implemented as a long channel device having a substantially undoped body; and a fully depleted p-type MOSFET implemented with as a long channel device having a substantially undoped body; wherein the n-type MOSFET and p-type MOSFET are connected in series and employ identical gate stacks, wherein each has a gate electrically coupled to a respective drain to form two diodes, and wherein both diodes are in one of an on state and an off state according to a value of an electrical potential applied across the n-type MOSFET and p-type MOSFET.

Abstract: A semiconductor device and a method of fabricating a contact to interface with an interconnect in a semiconductor device are described. The device includes a dielectric layer formed on a semiconductor layer, and a contact fabricated in a via formed within the dielectric layer. An interconnect formed above the contact interfaces with an exposed surface of the contact opposite a surface closest to the semiconductor layer. The contact includes a contact material in a first portion of the contact and an interface metal in a second portion of the contact.

Abstract: A semiconductor device and a method of fabricating a contact to interface with an interconnect in a semiconductor device are described. The device includes a dielectric layer formed on a semiconductor layer, and a contact fabricated in a via formed within the dielectric layer. An interconnect formed above the contact interfaces with an exposed surface of the contact opposite a surface closest to the semiconductor layer. The contact includes a contact material in a first portion of the contact and an interface metal in a second portion of the contact.

Abstract: Light emitters are two-dimensionally disposed along a main surface of the substrate. The light emitters each include: a first electrode; an organic light-emitting layer; an intermediate layer; a charge transport layer; and a second electrode. Such layers are disposed in the stated order with the first electrode closest to the substrate. The intermediate layer contains a fluoride of an alkali metal or a fluoride of an alkaline earth metal. The charge transport layer contains an organic material doped with an alkali metal or an alkaline earth metal. The light emitters are partitioned from one another by first banks extending in one direction along the main surface of the substrate and second banks extending in a direction intersecting the one direction. Surface portions of the first banks facing the light emitters have greater liquid repellency than surface portions of the second banks facing the light emitters.

Abstract: A microelectromechanical system (MEMS) device package for encapsulating a MEMS device a molded package spacer that connects to a conductive lid and to a substrate. The molded package spacer forms either side walls or a divider of the MEMS device package and is adapted to route electrical connections from the MEMS device to either the substrate or a second MEMS device package via the substrate.

Abstract: In some examples, a transistor includes a drain, a channel, and a gate. The channel surrounds the drain and has a channel length to width ratio. The gate is over the channel to provide an active channel region that has an active channel region length to width ratio that is greater than the channel length to width ratio.