Abstract: An optical sensor device may include a set of optical sensors. The optical sensor device may include a substrate. The optical sensor device may include a multispectral filter array disposed on the substrate. The multispectral filter array may include a first dielectric mirror disposed on the substrate. The multispectral filter array may include a spacer disposed on the first dielectric mirror. The spacer may include a set of layers. The multispectral filter array may include a second dielectric mirror disposed on the spacer. The second dielectric mirror may be aligned with two or more sensor elements of a set of sensor elements.

Abstract: Described herein is a method and structure for fabricating vias in a semiconductor substrate. The semiconductor substrate is first doped to make it mildly conducting, via holes are formed therein, and a conductive material is deposited in the holes. Using the moderate conductivity of the substrate, the conductive material may be plated into the holes.

Abstract: Non-planar semiconductor devices including semiconductor fins or stacked semiconductor nanowires that are electrostatically enhanced are provided. The electrostatic enhancement is achieved in the present application by epitaxially growing a semiconductor material protruding portion on exposed sidewalls of alternating semiconductor material portions of at least one hard mask capped semiconductor-containing fin structure that is formed on a substrate.

Abstract: A power semiconductor device includes a power semiconductor element, a controlling element, a first lead frame and a second lead frame, respectively, a first metal wire electrically connecting the power semiconductor element and the first lead frame, and a sealing body covering these components. The first lead frame includes a first inner lead having a connecting surface to which one end of the first metal wire is connected. Among surfaces of the sealing body, in a side surface, a resin inlet mark is formed in a side surface portion from which the first lead frame and the second lead frame do not project, the resin inlet mark being greater in surface roughness than another area. The resin inlet mark is formed opposite to a side where the first metal wire is positioned on the connecting surface when seen in the direction along the mounting surface.

Abstract: A display device is provided. The display device includes a first substrate, a display unit, a second substrate, and a light shielding structure. The display unit is disposed on the first substrate and includes at least one light emitting diode chip. The light shielding structure surrounds the light emitting diode chip of the display units and is located between the first substrate and the second substrate.

Abstract: An impurity of a second conductivity type is selectively doped in a surface of a semiconductor substrate of a first conductivity type to form doped regions. A portion of a surface of the doped regions is covered by a heat insulating film. At least a remaining portion of the surface of the doped regions is covered by an absorbing film and the doped regions are heated through the absorbing film, enabling an impurity region of the second conductivity type to be formed having two or more of the doped regions that have a same impurity concentration and differing carrier concentrations.

Abstract: A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.

Abstract: A heat sink includes a heat sink base, a first fin, and a second fin. The spacing between the base and the first fin and the second fin, restively, may be adjusted by rotating a threaded rod. The threaded rod includes a first threaded knurl that is engaged with the first fin and a second threaded knurl that is engaged with the second fin. The thread pitch of the first threaded knurl and the second threaded knurl may differ. For example, the pitch of the first threaded knurl may be smaller than the pitch of the second threaded knurl if the first fin is located nearest the heat sink base relative to the second fin. The spacing of the heat sink fins may be adjusted based upon the current operating conditions of the electronic device to maintain an optimal temperature of a heat generating device during device operation.

Abstract: A device may include a multispectral filter array disposed on the substrate. The multi spectral filter array may include a first metal mirror disposed on the substrate. The multi spectral filter may include a spacer disposed on the first metal mirror. The spacer may include a set of layers. The spacer may include a second metal mirror disposed on the spacer. The second metal mirror may be aligned with two or more sensor elements of a set of sensor elements.

Abstract: A display apparatus includes a substrate, a light-emitting diode (“LED”) provided above the substrate, an insulating layer provided above the LED, and a wire grid polarizer (“WGP”) provided above the insulating layer.

Abstract: An interlayer insulating film is formed on a gate insulating film and a gate electrode, and the interlayer insulating film is opened forming contact holes. Next, the interlayer insulating film and regions exposed by the contact holes are covered by a titanium nitride film, and the titanium nitride film is etched to remain only at portions of the gate insulating film and the interlayer insulating film exposed in the contact holes. The interlayer insulating film and the regions exposed by the contact holes are covered by a nickel film, and after the nickel film directly contacting the interlayer insulating film 8 is removed, the nickel film is heat treated and a nickel silicide layer is formed.

Abstract: In an embodiment, a semiconductor structure includes a multi-chip package system (MCPS). The MCPS includes one or more dies, a molding compound extending along sidewalls of the one or more dies, and a redistribution layer (RDL) over the one or more dies and the molding compound. The semiconductor structure also includes at least one sensor coupled to the RDL, with the RDL interposed between the at least one sensor and the one or more dies. The semiconductor structure further includes a substrate having conductive features on a first side of the substrate. The conductive features are coupled to the RDL. The substrate has a cavity extending from the first side of the substrate to a second side of the substrate opposite the first side, and the at least one sensor is disposed in the cavity.

Abstract: A light-receiving device includes a silicon semiconductor substrate, a plurality of first serial connections each of which includes a first avalanche photodiode (APD) and a first resistor connected in series, and a plurality of second serial connections each of which includes a second avalanche photodiode (APD) and a second resistor connected in series. The first APDs and the first resistors are formed on the silicon semiconductor substrate, and the first APDs is formed of silicon. The second APDs and the second resistors are formed on the silicon semiconductor substrate, and the second APDs is formed of a material having a smaller band gap than silicon. The plurality of first and second serial connections is connected in parallel between an anode terminal and a cathode terminal.

Abstract: A resistive memory element comprises a first electrode, an active material over the first electrode, a buffer material over the active material and comprising longitudinally extending, columnar grains of crystalline material, an ion reservoir material over the buffer material, and a second electrode over the ion reservoir material. A memory cell, a memory device, an electronic system, and a method of forming a resistive memory element are also described.

Abstract: Example embodiments relate to semiconductor devices including two-dimensional (2D) materials, and methods of manufacturing the semiconductor devices. A semiconductor device may be an optoelectronic device including at least one doped 2D material. The optoelectronic device may include a first electrode, a second electrode, and a semiconductor layer between the first and second electrodes. At least one of the first electrode and the second electrode may include doped graphene. The semiconductor layer may have a built-in potential greater than or equal to about 0.1 eV, or greater than or equal to about 0.3 eV. One of the first electrode and the second electrode may include p-doped graphene, and the other may include n-doped graphene. Alternatively, one of the first electrode and the second electrode may include p-doped or n-doped graphene, and the other may include a metallic material.

Abstract: This invention discloses a structure of an integrated inductor, comprising: an outer metal segment which comprises a first metal sub-segment and a second metal sub-segment; an inner metal segment which is arranged inside an area surrounded by the outer metal segment and comprises a third metal sub-segment and a fourth metal sub-segment; and at least a connecting structure for connecting the outer metal segment and the inner metal segment. The first metal sub-segment corresponds to the third metal sub-segment, and the first metal sub-segment and the third metal sub-segment belong to different metal layers in a semiconductor structure. The second metal sub-segment corresponds to the fourth metal sub-segment, and the second metal sub-segment and the fourth metal sub-segment belong to different metal layers in a semiconductor structure.

Abstract: A light-emitting diode device includes a substrate; a plurality of light-emitting units formed on the substrate, wherein the light-emitting units form a serially-connected array, including n adjacent light-emitting unit rows, wherein n?5, and the light-emitting units in the same rows connect vertically and/or the light-emitting units in the same columns connect horizontally, and a connecting direction of at least three light-emitting units in two adjacent rows are the same; a plurality of conductive connecting structures connecting the plurality of light-emitting units; a first contact light-emitting unit formed on the substrate and in the first light-emitting unit row; and a second contact light-emitting unit formed on the substrate and in the nth light-emitting unit row; at least three light-emitting units in the first light-emitting unit row have a 1st area, and at least three light-emitting units in the nth light-emitting unit row have a 2nd area, wherein the 1st area and the 2nd area are not equal.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising first and second regions, in the first region, first and second gate electrodes formed parallel to each other on the substrate, and being spaced apart from each other by a first distance, in the second region, third and fourth gate electrodes formed parallel to each other on the substrate, and being spaced apart from each other by a second distance which is greater than the first distance, in the first region, a first recess formed on the substrate between the first and second gate electrodes, in the second region, a second recess formed on the substrate between the third and fourth gate electrodes, a first epitaxial source/drain filling the first recess and a second epitaxial source/drain filling the second recess, wherein an uppermost portion of an upper surface of the first epitaxial source/drain is higher than an uppermost portion of an upper surface of the second epitaxial source/drain.

Abstract: A method for manufacturing a micromechanical component having a substrate and having a cap connected to the substrate and enclosing with the substrate a first cavity is provided, a first pressure existing, and a first gas mixture having a first chemical composition being enclosed, in the first cavity, in a first method step an access opening that connects the first cavity to an environment of the micromechanical component being constituted in the substrate or in the cap, in a second method step the first pressure and/or the first chemical composition being established in the first cavity, in a third method step the access opening being sealed with the aid of a laser by the introduction of energy or heat into an absorbing portion of the substrate or of the cap, the introduction of energy or heat being controlled by spatial displacement of a laser beam along a path proceeding substantially parallel to a surface, facing away from the first cavity, of the substrate or of the cap.

Abstract: A method for producing a nitride semiconductor device. The method comprises providing a substrate made of a material other than a nitride semiconductor. The material has a hexagonal crystal structure. An upper face of the substrate has at least one flat section. The method further comprises growing a first nitride semiconductor layer on the upper face of the substrate. The first nitride semiconductor layer is made of monocrystalline AlN. The first nitride semiconductor layer has an upper face that is a +c plane. The first nitride semiconductor layer has a thickness in a range of 10 nm to 100 nm. The method further comprises growing a second nitride semiconductor layer on the upper face of the first nitride semiconductor layer. The second nitride semiconductor layer is made of InXAlYGa1-X-YN (0?X, 0?Y, X+Y<1).