Patents Examined by Nicole Barreca
  • Patent number: 6596448
    Abstract: A phase error monitor pattern and its related applications. The phase error monitor pattern includes an alternating phase shift pattern on the peripheries of an alternating phase shift mask and a modification pattern on the peripheries of a modification pattern. The alternating phase shift mask and the modification mask are used in sequence. The alternating phase shift pattern has a plurality of pairs of first non-transparent regions. Each pair of first non-transparent regions is located at each side of a phase shift region. The modification pattern has a plurality of second non-transparent regions. Each second non-transparent region corresponds in position to the non-transparent region on a first side of each pair of first non-transparent regions. The method of monitoring phase errors includes sequentially performing photo-exposure of a positive photoresist using the alternating phase shift mask and the modification mask and measuring the deviations of the monitor photoresist pattern.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: July 22, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Wen Lai, Chemg-Shyan Tsay
  • Patent number: 6589713
    Abstract: An integrated circuit fabrication process to pattern features having reduced pitch is disclosed herein. The process includes reducing the width of a developed exposed area of a patterned photoresist layer provided over a substrate before patterning the substrate. The process further includes additionally patterning the patterned photoresist layer using the previously used mask or reticle to form a first feature and a second feature. The distance between adjacent first and second features is smaller than the distance between either of adjacent first features or adjacent second features.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: July 8, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Uzodinma Okoroanyanwu
  • Patent number: 6589715
    Abstract: A process for etching a PPMS layer that increases the etch selectivity of PPMS relative to PPMSO from an initial low etch selectivity to a higher etch selectivity at a later stage of the etching process. In some embodiments, the etch selectivity used during a first etching step of the process is less than 4:1 and the etch selectivity used during a second etching step, subsequent to the first step, is greater than 5:1. In some other embodiments, the etch selectivity of the first step is between 2-3:1 and the etch selectivity of the second step is greater than 8:1. Optionally, in still other embodiments a third etching step, performed between the first and second etching steps may be employed where the etch selectivity is between 3-8:1.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: July 8, 2003
    Assignees: France Telecom, Applied Materials, Inc.
    Inventors: Olivier Joubert, Cedric Monget, Timothy Weidman, Dian Sugiarto, David Mui
  • Patent number: 6589718
    Abstract: A method of making a resist pattern is provided, which decreases or eliminates the fluctuation of deformation of original openings of a resist layer which is induced by the change of their density (i.e., the count of the original openings within a unit area) or by their location in the reflowing process. The method comprises the steps of (a) forming a resist layer on a target layer; (b) patterning the resist layer to form original openings and at least one slit in the resist layer; the slit surrounding the original openings and having a specific width; and (c) reflowing the resist layer patterned in the step (b) under heat to cause deformation in the original openings and the at least one slit, thereby contracting the original openings and eliminating the at least one slit; the original openings thus contracted serving as resultant openings for forming desired contact/via holes in the target layer; the resist layer having the resultant openings constituting a resist pattern.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: July 8, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Hirofumi Saito
  • Patent number: 6586169
    Abstract: In order to create a lithography exposure device for producing structures extending in a surface area in a light-sensitive layer, with which a radiation field can be generated in the light-sensitive layer and with a control for controlling the intensity and position of the radiation field in such a manner that by means of a large number of successive exposure steps a plurality of conversion areas can be generated, in which the material of the light-sensitive layer is converted from an initial state into an end state and which together result in the structures, with which it is possible to produce, without masks, structures which have in at least one direction an extension which is smaller than that of one of the radiation fields used, it is suggested that with at least some of the exposure steps the control generate radiation fields with a distribution of energy which makes the action of at least two radiation fields on the same conversion area necessary in order to transfer the material of the light-sensitiv
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: July 1, 2003
    Assignee: Deutsches Zentrum fuer Luft- und Raumfahrt e.V.
    Inventors: Uwe Brauch, Hans Opower
  • Patent number: 6582888
    Abstract: A method for producing organic electroluminescent components having a structured electrode, in particular displays having a structured metal electrode, includes the following steps: At least two layers are applied onto a bottom electrode which is located on a substrate. The first layer is electrically insulating and is not damaged when the second layer is applied. A defined boundary remains between the two layers. The first layer has a higher solubility rate in a liquid developer than the second layer and it is possible to structure the second layer. The second layer is structured and the structure is transferred to the first layer. At least one organic functional layer is applied onto the second layer. A top electrode is deposited onto the organic functional layer.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: June 24, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventors: Waltraud Herbst, Rainer Leuschner, Ewald Günther, Jürgen Simmerer
  • Patent number: 6579666
    Abstract: A method comprising introducing a photoimageable material on a substrate; developing the photoimageable material over an opening area, the photoimageable material over a first portion of the opening area developed to a first extent and the photoimageable material over a second portion of the opening area developed to a different second extent; removing developed photoimageable material from the opening area; and forming an opening in the substrate in the opening area.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: June 17, 2003
    Assignee: Intel Corportion
    Inventor: Ajay Jain
  • Patent number: 6576405
    Abstract: A photolithographic method for manufacturing a CMOS semiconductor device having retrograde twin well with high aspect ratio (of thickness of the photoresist to width of the mask line or thickness of the resulting structure to its own width) is disclosed. The method is applicable for high energy implantation or other processes requiring thick photoresists with high aspect ratios, with one embodiment comprising the following: (a) forming a thick film of positive photoresist on a silicon substrate (b) prebaking (softbaking) the thick film using non-typical conditions (c) exposing the thick film using UV light (d) post exposure baking (PEB) the thick film using non-typical conditions (e) developing the exposed, thick film (f) stabilizing the thick film using non-typical conditions According to this method, a thick film of photoresist with high aspect ratios can be accurately and advantageously formed.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: June 10, 2003
    Assignee: ZiLOG, Inc.
    Inventors: Stephen J. Buffat, Jean L. Adams
  • Patent number: 6576407
    Abstract: A photoresist layer comprising an optically active component is provided, so that after an incident linearly polarized light penetrates the photoresist layer, the intensity ratio of an S wave polarization and a P wave polarization divided from the linearly polarized light is effectively 1:1 so improving astigmatism.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: June 10, 2003
    Assignee: Macronix International Co. Ltd.
    Inventors: Shun-Li Lin, Wei-Hua Hsu
  • Patent number: 6573029
    Abstract: A method of forming a device pattern of a semiconductor device. The method includes the steps of carrying out an over-exposure to a resist film using a mask which has transmission regions which are positioned about a circumference of each of intended patterns of a resist film. Then carrying out a development of the resist film to form a resist pattern having the intended patterns. And then forming a device pattern of a semiconductor device by use of the resist pattern.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: June 3, 2003
    Assignee: NEC Corporation
    Inventor: Mami Takeuchi
  • Patent number: 6573020
    Abstract: In a method for the manufacture, by means of lithography, of ceramic small and micro-parts, a pre-ceramic silicon containing polymer layer is deposited on a highly temperature resistant substrate and then dried at room temperature. The layer is then exposed in an image pattern to electromagnetic radiation and the exposed layer is developed in an organic solvent to remove the non-exposed areas. The preparation is then pyrolyzed at more than 900° C. and finally sintered at a temperature of at least 1600° C. to form a ceramic structured layer on the substrate.
    Type: Grant
    Filed: September 30, 2000
    Date of Patent: June 3, 2003
    Assignee: Forschungszentrum Karlsruhe GmbH
    Inventors: Thomas Hanemann, Jürgen Hausselt
  • Patent number: 6562553
    Abstract: A method of contact printing on a device using a partially transparent mask (18) having first and second surfaces, comprises the steps of applying a layer of low surface energy polymeric material (22) to the first surface of the mask; placing the first surface (24) of the mask contiguous to the device (10), the layer of low surface energy polymeric material being substantially in contact with the device; and applying radiation (32) to the second surface of the mask for affecting a pattern in the device.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: May 13, 2003
    Assignee: Motorola, Inc.
    Inventors: David P. Mancini, Douglas J. Resnick
  • Patent number: 6562547
    Abstract: A method for producing structures in chips is realized by carrying out a sequence of structuring steps in a self-adjusting manner. By structuring a first auxiliary layer applied on a substrate, a first masking structure is formed after a first masking procedure, which first masking structure has at least one partial region projecting beyond the surface of the substrate. After this, a further structuring step is carried out, for instance, by etching, implantation or CVD, using the previously produced first masking structure as a mask. After this, the first masking structure with a view to forming a second masking structure is inverted by applying at least one second auxiliary layer onto the first masking structure. The thus formed structure is at least partially taken off and the thus denuded first auxiliary layer is selectively removed, whereupon the second masking structure is used as a mask for a further structuring step.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: May 13, 2003
    Assignee: Austria Mikro Systeme International Aktiengesellschaft
    Inventors: Jochen Kraft, Martin Schatzmayr, Hubert Enichlmair
  • Patent number: 6548226
    Abstract: A photolithographic process for patterning a photoresist layer over a substrate. A positive photoresist layer is formed over the substrate. The positive photoresist layer contains a photoacid generator and a photobase generator. The positive photoresist layer is exposed to light through a photomask so that the photoacid generator in the photoresist layer is changed into photoacid and the photobase generator is changed to photobase. The photomask has a first pattern region and a second pattern region that correspond with a first region and a second region of the photoresist layer. The first pattern region has a duty ratio greater than the second pattern region so that the first region is exposed to a higher light intensity than the second region. Finally, the positive photoresist layer is developed. The reaction threshold for turning the photobase generator into photobase is adjusted according to the exposure strength between the first region and the second region.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: April 15, 2003
    Assignee: United Microelectronics Corp.
    Inventor: Chih-Yung Lin
  • Patent number: 6534245
    Abstract: Apertures in a circuit board or chip carrier are filled with a cured photosensitive dielectric material by substantially filling the apertures in the circuit board or chip carrier and applying a layer of a thickness to the circuit board or chip carrier with a positive photosensitive dielectric material, exposing the photosensitive dielectric material to actinic radiation in such a way as to leave material located in apertures unexposed to the radiation; baking the structure so as to harden the unexposed photosensitive dielectric material and developing the exposed dielectric material in order to remove it leaving behind cured photosensitive dielectric material in the apertures.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: March 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Bernd Karl Appelt, Gary Alan Johansson, Konstantinos I. Papathomas
  • Patent number: 6531265
    Abstract: A method to planarize a semiconductor surface using a Fence Creation and Elimination (FCE) process is described. Shallow recesses on a semiconductor surface are filled with a filling material. The filling material is deposited on the semiconductor surface to a thickness approximately equal to the depth of the shallow recesses. A selectively etchable material is formed on the filling material. A reverse mask (RM) is used to pattern the selectively etchable material to form segments of the selectively etchable material equal to the pattern of the shallow recesses and aligned to the shallow recesses. Exposed filling material is removed followed by the removal of the segments of the selectively etchable material. The remaining filling material in the shallow recesses forms fences which extend above the surface of the semiconductor. The fences are removed resulting in a planar semiconductor surface.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: March 11, 2003
    Assignee: International Business Machines Corporation
    Inventors: Shaw-Ning Mei, T. Howard Shillingford, Edward J. Vishnesky
  • Patent number: 6524773
    Abstract: Polarizing glass having localized regions or patterns of non-polarizing glass is disclosed. The glass is formed by use of reducing gas-blocking material, by local thermal heating of the glass, or by an etching technique.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: February 25, 2003
    Assignee: Corning Incorporated
    Inventors: Nicholas F. Borrelli, Chad B. Moore, Paul A. Sachenik
  • Patent number: 6524775
    Abstract: An edge bead remover for a photoresist composition disposed as a film on a surface, consisting essentially of a solvent mixture comprising from about 50 to about 80 parts by weight, based on the weight of the solvent mixture, of at least one di(C1-C3)alkyl carbonate and from about 20 to about 50 parts by weight, based on the weight of the solvent mixture, of cyclopentanone. A method is also provided for treating a photoresist composition film disposed on a surface which method comprises contacting the photoresist composition with a solvent mixture, in an amount sufficient to produce a substantially uniform film thickness of the photoresist composition across the surface, wherein the solvent mixture comprises from about 50 to about 80 parts by weight, based on the weight of the solvent mixture, of at least one di(C1-C3)alkyl carbonate and from about 20 to about 50 parts by weight, based on the weight of the solvent mixture, of cyclopentanone.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: February 25, 2003
    Assignee: Clariant Finance (BVI) Limited
    Inventors: Joseph E. Oberlander, Craig Traynor, Ernesto S. Sison, Jeff Griffin
  • Patent number: 6514664
    Abstract: The present invention is a radiation sensitive composition that includes a polymer resin, a photoacid generator, a solvent, and a heterocyclic additive selected from: 1-phenyl-2-pyrrolidinone and compound of the formulas (I), (II), (III), and (IV): where R1 is —H, —NH2—, —OH, —N(CH3)2, —NH—CO—CH3, or where R2 is —CH3 or benzoyl; where R3 is —H, or C1-C4 alkyl; W, X, Y, and Z are each independently selected from —CH2—,  —CH(CH3)—, —C(CH3)2—, —NH—, or —N(CH3)—, with the proviso that at least one of W, X, Y, or Z is  and at least one of W, X, Y, or Z is —NH— or —N(CH3)—; where A is —CH═ or R4 is —H, —CH3, or —CH2—CH(CH3)2; R5 is —H, —CH3, or —CH2—CH(OH)—CH2(OH); R6 is &
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: February 4, 2003
    Assignee: Arch Specialty Chemicals, Inc.
    Inventors: Medhat A. Touky, Gail McCormick, Jacqueline M. Marshall, Andrew J. Blakeney
  • Patent number: 6509142
    Abstract: An apparatus and method for the proximity photolithography of large substrates is provided. The apparatus includes a mask frame for holding the mask in a substantially vertical position. A tiltable platen is provided for receiving a photoresist-coated substrate in a horizontal position. The platen includes a vacuum chuck for holding the substrate to the platen. The platen is tilted in order to place the substrate in a position parallel to the mask. A motor is used to move the mask into close proximity with the substrate and a scanning exposure is begun. The scanning exposure is accomplished by a rail-mounted shuttle which holds equipment for producing a collimated light beam. A servo motor drives the shuttle along the rail to perform the scanning exposure. Once the exposure is completed, the mask is moved away from the exposed substrate and the platen is lowered to its horizontal position. The vacuum chuck disengages the exposed substrate which is then transported from the platen.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: January 21, 2003
    Assignee: ORC Technologies, Inc.
    Inventors: Gregory R. Baxter, James H. Beauchene, Eugene J. Melbon, Victor M. Jacobo