Abstract: A resist film is formed by applying, on a semiconductor substrate, a resist material including at least one atom or group selected from the group consisting of a halogen atom, a cyano group, a nitro group, an alkoxy group, an amino group, an alkyl group, a trifluoromethyl group and a mercapto group. The resist film is irradiated with exposing light of a wavelength of a 1 nm through 180 nm band for pattern exposure, and the resist film is developed after the pattern exposure, so as to form a resist pattern.
Type:
Grant
Filed:
March 8, 2000
Date of Patent:
January 6, 2004
Assignee:
Matsushita Electric Industrial Co., Ltd.
Abstract: A desired pattern is formed in a photoresist layer that overlies a semiconductor wafer using a reflective mask. This mask is formed by consecutively depositing a reflective layer, an absorber layer and an anti-reflective (ARC) layer. The ARC layer is patterned according to the desired pattern. The ARC layer is inspected to find areas in which the desired pattern is not achieved. The ARC layer is then repaired to achieve the desired pattern with the absorber layer protecting the reflective layer. The desired pattern is transferred to the absorber layer to reveal the reflective portion of mask. Radiation is reflected off the reflective mask to the semiconductor wafer to expose the photoresist layer overlying the semiconductor wafer with the desired pattern.
Type:
Grant
Filed:
August 24, 2001
Date of Patent:
January 6, 2004
Assignee:
Motorola, Inc.
Inventors:
Sang-in Han, Pawitter Mangat, James R. Wasson, Scott D. Hector
Abstract: A method of optical proximity correction, suitably applied to a photolithography process with a high numeric aperture. The exposure light comprises a P-polarized light and an S-polarized light perpendicular to the P-polarized light. The P-polarized light has a transmission coefficient larger than that of the S-polarized light. In this method, different optical proximity correction modes are applied to the patterns with different orientations. While correcting any pattern, the ratio of transmission coefficient of the P-polarized light to the S-polarized light and the polarization angle between the pattern orientation and the polarization direction of the P-polarization/S-polarization light are considered.
Abstract: The invention concerns a method for producing a pattern on a transparent substrate, particularly a glass or glass-ceramic substrate.
According to the invention, there is deposited on at least one area of one face of the substrate, a first layer of a photosensitive resin comprising at least one sensitizing agent and at least one photosensitive compound essentially composed of a polymer with an average degree of cross-linking d° such that it is able to absorb solid particles. Certain areas of said first layer are exposed to light, particularly in order to increase, in a controlled manner, the average degree of cross-linking do of said polymer so as to modulate its absorption capacity. On the first layer is deposited at least one second layer of a mineral-particle-based composition. The substrate is subjected to at least one treatment cycle, particularly in order to fix said mineral particles.
The invention also concerns the substrate produced by this method and its applications.
Abstract: A method of removing photoresist material from a semiconductor substrate includes providing a semiconductor substrate having a patterned photoresist mask. A layer comprised of polymer material is formed over the patterned photoresist mask. The layer comprised of polymer material and a portion of the patterned photoresist mask are then removed. The layer comprised of polymer material is preferably formed by introducing a process gas into a plasma environment and is preferably formed with less thickness in a low aspect ratio area relative to a high aspect ratio area.
Abstract: A desirable pattern is formed in a photoresist layer that overlies a semiconductor wafer using an attenuating phase shift reflective mask. This mask is formed by consecutively depositing an attenuating phase shift layer, a buffer layer and a repairable layer. The repairable layer is patterned according to the desirable pattern. The repairable layer is inspected to find areas in which the desirable pattern is not achieved. The repairable layer is then repaired to achieve the desirable pattern with the buffer layer protecting the attenuating phase shift layer. The desirable pattern is transferred to the buffer layer and then transferred to the attenuating phase shift layer to achieve the attenuating phase shift reflective mask. Radiation is reflected off the attenuating phase shift reflective mask to the photoresist layer to expose it with the desirable pattern.
Abstract: A semiconductor substrate etching masking layer onto which the pattern to be etched can be transferred by photolithography at extreme ultraviolet light wavelengths from 10 to 100 nm and which is resistant to plasma etching. An ultraviolet light semiconductor integrated circuit photolithography process and the use for fabricating a double masking layer for semiconductor substrate etching of a photo-ablation layer sensitive to extreme ultraviolet light and resistant to deep ultraviolet light and/or ultraviolet light coupled to a polymer resin layer resistant to extreme ultraviolet light and to plasma etching when the resin has been developed and sensitive to deep ultraviolet light and/or to ultraviolet light.
Abstract: A method including forming a photoimageable material on a substrate; developing the photoimageable material over an opening area, the photoimageable material over a first portion of the opening area developed to a first extent and the photoimageable material over a second portion of the opening area developed to a different second extent; removing developed photoimageable material from the opening area; and forming an opening in the substrate in the opening area.
Abstract: A method utilizing gray-tone exposure of a class of thick negative photo-sensitized epoxy resists from the substrate side of a transparent substrate and development methods that rely upon a physical distinction between polymerized (solid) and unpolymerized (liquid) photoresist at elevated temperatures may be used to fabricate 3-D structures in the photo-sensitized epoxy. Such structures may exhibit smoothly-varying topographic features with thicknesses as great as 2 mm.
Abstract: There is provided a method for forming a photoresist layer for photolithographic applications which has increased structural strength. The photoresist layer is exposed through a mask and developed. The photoresist layer is then treated to change its material properties before the photoresist layer is dried. Also provided are a semiconductor fabrication method employing a treated photoresist and a composition for a treatable photoresist.
Type:
Grant
Filed:
July 12, 2001
Date of Patent:
October 21, 2003
Assignee:
Advanced Micro Devices, Inc.
Inventors:
Christopher F. Lyons, Scott A. Bell, Todd Lukanc, Marina V. Plat
Abstract: Nanolaminates are formed by alternating deposition, e.g., by combustion chemical vapor deposition (CCVD), layers of resistive material and layers of dielectric material. Outer resistive material layers are patterned to form discrete patches of resistive material. Electrical pathways between opposed patches of resistive material on opposite sides of the laminate act as capacitors. Electrical pathways horizontally through resistive material layers, which may be connected by via plated holes, act as resistors.
Type:
Grant
Filed:
February 12, 2001
Date of Patent:
October 14, 2003
Inventors:
Andrew T. Hunt, Wen-Yi Lin, Richard W. Carpenter
Abstract: This invention relates to methods for preparing photo-patterned mono- or polychromatic, polarizing films. The polarizer can be pixelated into a number of small regions wherein some of the regions have one orientation of the principal neutral or color absorbing axis; and some other of the said regions have another orientation of the principal neutral or color absorbing axis. The axis orientation is determined by the polarization vector of actinic radiation and the multi-axes orientation is possible by a separated masked exposure. This polarizer can be placed on the interior substrate surface of the LCD cell.
Type:
Grant
Filed:
August 22, 2000
Date of Patent:
October 7, 2003
Assignee:
The Hong Kong University of Science and Technology
Inventors:
Hoi-Sing Kwok, Wing-Chiu Yip, Vladimir Chigrinov, Vladimir Kozenkov
Abstract: Antireflective structures according to the present invention comprise a metal silicon nitride composition in a layer that is superposed upon a layer to be patterned that would other wise cause destructive reflectivity during photoresist patterning. The antireflective structure has the ability to absorb light used during photoresist patterning. The antireflective structure also has the ability to scatter unabsorbed light into patterns and intensities that are ineffective to photoresist material exposed to the patterns and intensities. One preferred material for the antireflective layer includes metal silicon nitride ternary compounds of the general formula MxSiyNz, where M is at least one transition metal, x is less than y and z is greater than about 0 and less than about 5y.
Abstract: A method of photolithography. An anti-reflective coating is formed on the conductive layer. An nitrogen plasma treatment is performed. A photo-resist layer is formed and patterned on the anti-reflective coating. The conductive layer is defined. The photo-resist layer is removed. The anti-reflective layer is removed by using phosphoric acid.
Type:
Grant
Filed:
April 5, 2001
Date of Patent:
September 30, 2003
Assignee:
United Microelectronics Corp.
Inventors:
Kevin Hsieh, Chih-Yung Lin, Chih-Hsiang Hsiao, Juan-Yuan Wu, Water Lur
Abstract: A method for fabricating a structure on a substrate with a low contrast photoresist having a height greater than 15 microns is provided. A uniformly thick film of photoresist is achieved on a substrate by spinning the substrate at two different speeds, then at least partially, but not fully drying the layer of photoresist at ambient temperature. The layer of photoresist is then dried and hardened by applying heat to the bottom surface of the substrate via a hot plate. The substrate is maintained level at all times during the spinning and drying steps in order to prevent wedging of the photoresist which remains in a plastic state until fully hardened by the hot plate. A surface relief pattern is then created in the photoresist via a scanning beam of electromagnetic radiation, which is preferably a laser beam. The resulting exposed surface relief patterns are then developed to produce the desired structure, which has a height of 15 microns or greater.
Abstract: The present invention pertains to a method for depositing built-up structures on the surface of patterned masking material used for semiconductor device fabrication. Such built-up structures are useful in achieving critical dimensions in the fabricated device. The composition of the built-up structure to be fabricated is dependant upon the plasma etchants used during etching of underlying substrates and on the composition of the substrate material directly underlying the masking material.
Abstract: A method of producing an integrated circuit configuration where trenches are formed surrounding active regions in a main surface of a semiconductor substrate. A photoresist layer is applied to the insulating layer and structured forming a mask using a data processing device, by the following steps: Providing an idealized pattern representing trenches with contours corresponding to contours of the trenches. Producing an idealized mask pattern on the basis of the idealized pattern shifted by an allowance in comparison with the idealized pattern, the idealized mask pattern has surface zones whose distance apart is shorter than a given minimum measurement. The idealized mask pattern is used to produce a further idealized mask pattern in which the surface zones are replaced by minimum surface elements with length measurements which are greater than the given minimum measurement. The trenches are then filled by depositing an insulating layer using the formed mask.
Abstract: A method for manufacturing a magnetoresistance head of the present invention comprises the steps of forming an organic film on a multilayered film constituting a magnetoresistance device, forming an upper film formed of resist or inorganic film on the organic film, patterning the organic film and the upper film, cutting into edges of the organic film patterns from edges of the upper film patterns inwardly to such an extent that particles of the thin film being formed on the upper film and the multilayered film do not contact to side portions of the organic film patterns.
Abstract: The invention discloses an improvement in the photolithographic patterning method of a photoresist layer formed on a substrate surface with intervention of an anti-reflection coating film, in which the refractive index and the light-absorption coefficient of the anti-reflection coating film are controlled in such a way that, in a graph prepared by plotting the thickness of the anti-reflection coating film taken as the abscissa values and the reflectivity of the light for patterning exposure at the interface between the anti-reflection coating film and the photoresist layer thereon taken as the ordinate values, the range of the variation in the film thickness corresponding to an increment of 0.01 in the reflectivity in the vicinity of the minimum point on the thickness vs. reflectivity curve does not exceed ±0.01 &mgr;m.
Abstract: A method for forming cells array of mask read only memory, at least includes: form numerous gate structures on substrate; form numerous doped regions in uncovered part of substrate; form first conductor layer on uncovered part of substrate with a thickness essentially equal to thickness of gate structures; form first dielectric layer on first conductor layer; form second conductor layer on both gate structures and first dielectric layer; perform a pattern transform process for transferring both second conductor layer and gate structures into conductor lines as word lines; form second dielectric layer on sidewalls of conductor lines to form spacer; form code photoresist on second conductor layer; and perform ions implantation process for implant numerous ions into partial substrate which is not covered by code photoresist.