Patents Examined by Nikolay K Yushin
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Patent number: 11257980Abstract: A light-emitting diode is provided. The light-emitting diode includes a multiple quantum well structure to generate a light beam with a broadband blue spectrum. The light beam contains a first sub-light beam with a first wavelength and a second sub-light beam with a second wavelength. A difference between the first wavelength and the second wavelength ranges from 1 nm to 50 nm, and the light-emitting diode has a Wall-Plug-Efficiency (WPE) of greater than 0.45 under an operating current density of 120 mA/mm2.Type: GrantFiled: November 12, 2019Date of Patent: February 22, 2022Assignee: KAISTAR LIGHTING(XIAMEN) CO., LTD.Inventors: Ben-Jie Fan, Jing-Qiong Zhang, Yi-Qun Li, Hung-Chih Yang, Tsung-Chieh Lin, Ho-Chien Chen, Shuen-Ta Teng, Cheng-Chang Hsieh
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Patent number: 11257958Abstract: The present invention provides a thin film transistor and a manufacturing method thereof. The thin film transistor includes a substrate, a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode, and a passivation layer. Both structures of the source electrode and the drain electrode are a three-layered metal structure, and the three-layered metal structure is a titanium tantalum/copper/titanium tantalum structure. Therefore, after the passivation layer is applied to the source electrode and the drain electrode, a bulging problem of the passivation layer can be effectively improved, and thus the thin film transistor has better plasticity and can be used for flexible displays.Type: GrantFiled: December 10, 2019Date of Patent: February 22, 2022Inventor: Jingjing Liu
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Patent number: 11257942Abstract: A resistive element that includes: a substrate; a first nitride semiconductor layer; a second nitride semiconductor layer; a two-dimensional electron gas layer on the first nitride semiconductor layer side at an interface between the first nitride semiconductor layer and the second nitride semiconductor layer; a first electrode ohmically connected to the two-dimensional electron gas layer; a second electrode ohmically connected to the two-dimensional electron gas layer; and an insulating layer between the first electrode and the second electrode in plan view. The two-dimensional electron gas layer functions as an electric resistance element. A conductive layer is not provided above the insulating layer between the first electrode and the second electrode in the plan view. The resistive element has a resistance-value stabilization structure that functions to keep a resistance value of the electric resistance element constant.Type: GrantFiled: March 24, 2020Date of Patent: February 22, 2022Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Kenichi Miyajima, Yoshiaki Katou, Akihiko Nishio, Kaname Motoyoshi
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Patent number: 11251247Abstract: A display device and a method for fabricating the same are provided. The display device comprises pixels connected to scan lines, and to data lines crossing the scan lines, each of the pixels including a light emitting element, and a first transistor configured to control a driving current supplied to the light emitting element according to a data voltage applied from the data line, the first transistor including a first active layer having an oxide semiconductor, and a first oxide layer on the first active layer and having a crystalline oxide containing tin (Sn).Type: GrantFiled: April 8, 2020Date of Patent: February 15, 2022Assignee: Samsung Display Co., Ltd.Inventors: Hyung Jun Kim, Myoung Hwa Kim, Tae Sang Kim, Yeon Keon Moon, Joon Seok Park, Sang Woo Sohn, Sang Won Shin, Jun Hyung Lim, Hye Lim Choi
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Patent number: 11251207Abstract: The present disclosure discloses a method for preparing an array substrate, an array substrate and a display panel, wherein the method comprises: forming a buffer layer on a substrate in a first region and a second region, wherein the buffer layer has a groove located in the second region; forming a first indium oxide thin film on the buffer layer in the first region; forming a second indium oxide thin film in the groove; performing a reduction process on the second indium oxide thin film to obtain indium particles; forming an amorphous silicon thin film in the groove, and inducing the amorphous silicon of the amorphous silicon thin film to form microcrystalline silicon at a preset temperature by using the indium particles; and removing the indium particles in the microcrystalline silicon to form a microcrystalline silicon semiconductor layer of the microcrystalline silicon thin film transistor.Type: GrantFiled: April 13, 2020Date of Patent: February 15, 2022Assignee: BOE Technology Group Co., Ltd.Inventors: Yupeng Gao, Guangcai Yuan, Feng Guan, Zhi Wang, Jianhua Du, Zhaohui Qiang, Chao Li
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Patent number: 11245008Abstract: The present application provides a TFT, a manufacturing method thereof, and a sensor. The TFT includes a substrate, and a source, a drain and an active layer on the substrate. The active layer includes a microchannel, and the thin film transistor is configured to detect a sample in the microchannel. When a sample to be detected enters the microchannel, the electron distribution in the active layer would be affected, which causes fluctuations in the TFT characteristics. By detecting such fluctuations, detecting the composition and property of the liquid to be detected may be achieved. Moreover, by virtue of the microchannel, the sample may be precisely controlled. The impact of the external environment may be reduced and the detection accuracy can be enhanced. Continuous monitoring instead of one-time detection of the sample may be achieved and the sample detection efficiency may be improved.Type: GrantFiled: July 24, 2019Date of Patent: February 8, 2022Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Xiaochen Ma, Guangcai Yuan, Ce Ning, Hehe Hu, Xin Gu
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Patent number: 11244951Abstract: A memory cell includes a select device and a capacitor electrically coupled in series with the select device. The capacitor includes two conductive capacitor electrodes having ferroelectric material there-between. The capacitor has an intrinsic current leakage path from one of the capacitor electrodes to the other through the ferroelectric material. There is a parallel current leakage path from the one capacitor electrode to the other. The parallel current leakage path is circuit-parallel the intrinsic path and of lower total resistance than the intrinsic path. Other aspects are disclosed.Type: GrantFiled: July 13, 2020Date of Patent: February 8, 2022Assignee: Micron Technology, Inc.Inventors: Kamal M. Karda, Qian Tao, Durai Vishak Nirmal Ramaswamy, Haitao Liu, Kirk D. Prall, Ashonita Chavan
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Patent number: 11244972Abstract: An array substrate, a method for manufacturing the same and a display device are provided. The method includes: providing a base substrate; forming a conductive material thin film on the base substrate; forming a first photoresist layer on a side of the conductive material thin film distal to the base substrate; etching the conductive material thin film by using the first photoresist layer as a mask to obtain a first etched pattern; removing third covering portions of the first photoresist layer to obtain a second photoresist layer; and etching the first etched pattern by using the second photoresist layer as a mask to obtain a gate electrode and a signal line.Type: GrantFiled: April 27, 2020Date of Patent: February 8, 2022Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Ning Liu, Bin Zhou, Jun Liu, Qinghe Wang, Wei Song, Wei Li
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Patent number: 11244964Abstract: The present disclosure relates to a display device, an array substrate and a manufacturing method thereof, and relates to the technical field of display. The method includes steps of: providing a base substrate, and forming a semiconductor pattern, a gate insulation layer, a gate electrode, an insulation layer and a source/drain electrode on the base substrate, and further includes forming the composite material layer on the base substrate including the semiconductor pattern, and hydrotreating the composite material layer, in which the composite material layer may contain titanium complex-graphene oxide. The present disclosure is capable of omitting the interlayer insulation layer, thereby avoiding the situation that a flexible layer cannot be displayed due to the breakage of insulation layer between inorganic layers, thereby improving bending performance of the flexible screen.Type: GrantFiled: January 29, 2018Date of Patent: February 8, 2022Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventor: Shuai Zhang
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Patent number: 11233074Abstract: The present application provides an array substrate and a manufacturing method thereof. The array substrate includes a thin film transistor and a storage capacitor prepared on a substrate; the thin film transistor includes a gate, an active layer, and a source/drain; the storage capacitor includes a first electrode and a second electrode isolated therefrom by a dielectric layer; the gate is disposed above the first electrode and located at one end of the first electrode; and the second electrode corresponds to a portion of the first electrode non-corresponding to the gate.Type: GrantFiled: December 20, 2019Date of Patent: January 25, 2022Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.Inventors: Zhenguo Lin, Xingyu Zhou, Yuanjun Hsu, Poyen Lu
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Patent number: 11230668Abstract: The present invention provides an etchant less causing damage to IGZOs. The etchant of the present invention comprises hydroxyethanediphosphonic acid (A), one or more phosphonic acids (B), hydrogen peroxide (C), nitric acid (D), a fluorine compound (E), an azole (F), and an alkali (G), and is characterized in that the phosphoric acids (B) comprise one or more phosphonic acids selected from the group consisting of diethylenetriaminepentamethylenephosphonic acid, N,N,N?,N?-ethylenediaminetetrakismethylenephosphonic acid, and aminotrimethylenephosphonic acid and that the proportion of the hydroxyethanediphosphonic acid (A) is in the range of 0.01-0.1 mass % and the proportion of the phosphonic acids (B) is in the range of 0.003-0.04 mass %.Type: GrantFiled: March 26, 2018Date of Patent: January 25, 2022Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.Inventors: Youzou Yamada, Toshiyuki Goto
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Patent number: 11227875Abstract: A display device includes a pixel connected to a scan line, and a data line crossing the scan line, wherein the pixel includes a light-emitting element, a driving transistor configured to control a driving current supplied to the light-emitting element according to a data voltage applied from the data line, and a first switching transistor configured to apply the data voltage of the data line to the driving transistor according to a scan signal that is applied to the scan line. The driving transistor includes a first active layer including an oxide semiconductor, and a first oxide layer disposed on the first active layer and including an oxide semiconductor. The first switching transistor includes a second active layer including an oxide semiconductor, and the first oxide layer is not disposed on the second active layer.Type: GrantFiled: March 31, 2020Date of Patent: January 18, 2022Assignee: Samsung Display Co., Ltd.Inventors: Myoung Hwa Kim, Joon Seok Park, So Young Koo, Tae Sang Kim, Yeon Keon Moon, Geun Chul Park, Jun Hyung Lim, Kyung Jin Jeon
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Patent number: 11227995Abstract: A ReRAM device manufactured using 2-D Si2Te3 (silicon telluride) nanowires or nanoplates. The Si2Te3 nanowires exhibit a unique reversible resistance switching behavior driven by an applied electrical potential, which leads to switching of the NWs from a high-resistance state (HRS) to a low-resistance state (LRS). This switched LRS is highly stable unless the opposite potential is applied to switch the resistance back. This provides a new class of resistive switching based on semiconductor rather than dielectric materials. In several embodiments, the polarity of the initially applied potential along the Si2Te3 nanowires defines the switch “on” and “off” directions, which become permanent once set.Type: GrantFiled: October 18, 2019Date of Patent: January 18, 2022Inventors: Jingbiao Cui, Keyue Wu, Jiyang Chen, Xiao Shen
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Patent number: 11217698Abstract: A thin film transistor is provided. The thin film transistor includes an active layer, and the active layer includes a plurality of stacked structures, and each of the stacked structures includes: a N-layer indium oxidation layer; a gallium oxidation layer, the gallium oxidation layer is provided on the indium oxidation layer of the N-layer indium oxidation layer; and a zinc oxidation layer is provided on the gallium oxidation layer. These stacked structures improve the performance of the thin film transistor. A preparation method of the thin film transistor and a display panel containing the thin film transistor is also provided.Type: GrantFiled: June 5, 2020Date of Patent: January 4, 2022Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventor: Chuanbao Luo
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Patent number: 11217610Abstract: An active matrix substrate includes: a first substrate; and first electrodes, a dielectric layer covering the first electrodes, and a first water-repelling layer in this sequence on the first substrate, wherein the dielectric layer has a multilayer structure including two or more layers and includes a silicon nitride film and a metal-oxide film between the silicon nitride film and the first water-repelling layer, and the silicon nitride film has an oxygen-containing surface layer region on a surface thereof that is in contact with the metal-oxide film.Type: GrantFiled: March 27, 2020Date of Patent: January 4, 2022Assignee: SHARP KABUSHIKI KAISHAInventors: Atsushi Hachiya, Hiroaki Furukawa, Kazuya Tsujino
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Patent number: 11205673Abstract: An image sensor includes a plurality of pixel sensing portions arranged in m columns and n rows. Each of the pixel sensing portions includes at least one thin film transistor and a photodetection diode (13) including n-type (16), intrinsic (15) and p-type (14) semiconductor layers. The p-type semiconductor layer (14) includes a multi-layered structure including lower (142) and upper (141) p-type semiconductor layered portions. The upper p-type semiconductor layered portion (141) has a band gap greater than 1.7 eV and has a p-type dopant in an amount not less than two times of that of the lower p-type semiconductor layered portion (142). An image sensing-enabled display apparatus and a method of making the image sensor are also disclosed.Type: GrantFiled: June 11, 2018Date of Patent: December 21, 2021Assignee: SHANGHAI HARVEST INTELLIGENCE TECHNOLOGY CO., LTD.Inventors: Hong-Yih Tseng, Jiandong Huang
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Patent number: 11205664Abstract: A highly reliable semiconductor device having a high on-state current is provided. The semiconductor device includes a first insulator, a second insulator over the first insulator, a first oxide over the first insulator, a second oxide over the first oxide, a first conductor and a second conductor over the second oxide, a third insulator over the first conductor, a fourth insulator over the second conductor, a third oxide over the second oxide, a fifth insulator over the third oxide, a third conductor that is positioned over the fifth insulator and overlaps with the third oxide, a sixth insulator covering the first to fifth insulators, the first oxide, the second oxide, and the first to third conductors, and a seventh insulator over the sixth insulator.Type: GrantFiled: December 19, 2018Date of Patent: December 21, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Ryota Hodo, Tomoyo Kamogawa, Katsuaki Tochibayashi
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Patent number: 11205667Abstract: Disclosed is a method of preparing a thin film transistor substrate, a thin film transistor substrate, and a display apparatus. The method includes forming a conductive material layer, forming a hydrophobic insulation layer on the conductive material layer, forming a photoresist layer on the hydrophobic insulation layer, patterning the photoresist layer to form a photoresist pattern, removing a segment in the hydrophobic insulation layer that is not covered by the photoresist pattern to form a hydrophobic insulation pattern, and removing a segment in the conductive material layer that is not covered by the hydrophobic insulation pattern to form a conductive pattern.Type: GrantFiled: May 20, 2019Date of Patent: December 21, 2021Assignees: HEFEI BOE OPTOELECTRONICS TECHNOLOGY, CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Kui Gong, Dezhi Xu, Wei Tian, Honggang Gu, Yuhu Zhang
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Patent number: 11201179Abstract: Embodiments of the present disclosure provide a thin film transistor assembly, an array substrate and a display panel. The thin film transistor assembly includes a first thin film transistor and a second thin film transistor disposed on a substrate. The first thin film transistor includes a first source electrode, a first drain electrode, and a first active layer. The second thin film transistor includes a second source electrode. The first source electrode is disposed on a side of the first active layer facing towards the substrate. The first drain electrode is disposed on a side of the first active layer facing away from the substrate. An orthogonal projection of the first source electrode on the substrate overlaps an orthogonal projection of the second source electrode on the substrate.Type: GrantFiled: March 20, 2020Date of Patent: December 14, 2021Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yanwei Ren, Wulijibaier Tang, Xiaoguang Li, Jingyi Xu, Yuelin Wang, Lei Jia, Yanan Yu, Guolei Zhi
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Patent number: 11195885Abstract: A display device includes: a first substrate; a second substrate on the first substrate; a pixel between the first substrate and the second substrate and including a pixel area and a non-pixel area around the pixel area; a color filter between the pixel and the second substrate and overlapping with the pixel area; and a plurality of protrusions between the second substrate and the color filter, and each of the protrusions has a width that decreases as a distance from the second substrate increases.Type: GrantFiled: March 31, 2020Date of Patent: December 7, 2021Assignee: Samsung Display Co., Ltd.Inventors: Gak Seok Lee, Byung-Chul Kim, Inok Kim, Jaemin Seong, Inseok Song, Keunchan Oh, Jieun Jang, Chang-Soon Jang, Sun-Kyu Joo