Abstract: A highly reliable semiconductor device having a high on-state current is provided. The semiconductor device includes a first insulator, a second insulator over the first insulator, a first oxide over the first insulator, a second oxide over the first oxide, a first conductor and a second conductor over the second oxide, a third insulator over the first conductor, a fourth insulator over the second conductor, a third oxide over the second oxide, a fifth insulator over the third oxide, a third conductor that is positioned over the fifth insulator and overlaps with the third oxide, a sixth insulator covering the first to fifth insulators, the first oxide, the second oxide, and the first to third conductors, and a seventh insulator over the sixth insulator.

Abstract: Disclosed is a method of preparing a thin film transistor substrate, a thin film transistor substrate, and a display apparatus. The method includes forming a conductive material layer, forming a hydrophobic insulation layer on the conductive material layer, forming a photoresist layer on the hydrophobic insulation layer, patterning the photoresist layer to form a photoresist pattern, removing a segment in the hydrophobic insulation layer that is not covered by the photoresist pattern to form a hydrophobic insulation pattern, and removing a segment in the conductive material layer that is not covered by the hydrophobic insulation pattern to form a conductive pattern.

Abstract: Embodiments of the present disclosure provide a thin film transistor assembly, an array substrate and a display panel. The thin film transistor assembly includes a first thin film transistor and a second thin film transistor disposed on a substrate. The first thin film transistor includes a first source electrode, a first drain electrode, and a first active layer. The second thin film transistor includes a second source electrode. The first source electrode is disposed on a side of the first active layer facing towards the substrate. The first drain electrode is disposed on a side of the first active layer facing away from the substrate. An orthogonal projection of the first source electrode on the substrate overlaps an orthogonal projection of the second source electrode on the substrate.

Abstract: A display device includes: a first substrate; a second substrate on the first substrate; a pixel between the first substrate and the second substrate and including a pixel area and a non-pixel area around the pixel area; a color filter between the pixel and the second substrate and overlapping with the pixel area; and a plurality of protrusions between the second substrate and the color filter, and each of the protrusions has a width that decreases as a distance from the second substrate increases.

Abstract: A display device and a method of manufacturing the same. The display device includes a pixel connected to a scan line and a data line intersecting the scan line, and a driving transistor and a switching transistor disposed in the pixel. The driving transistor includes a substrate, a first active layer disposed on the substrate, a first gate electrode disposed on the first active layer, and a second insulating film contacting the first gate electrode and the first gate electrode. The switching transistor includes a second active layer disposed on the substrate, a second gate electrode disposed on the second active layer, a first insulating film contacting the second active layer and the second gate electrode, and a second insulating film covering the first insulating film. The first insulating film and the second insulating film are made of different materials from each other.

Abstract: A semiconductor device includes a gate electrode, a semiconductor film, and a conductive film. The semiconductor film includes an oxide semiconductor material. The semiconductor film includes a channel region, a low-resistance region, and an intermediate region. The channel region is opposed to the gate electrode. The low-resistance region has a lower electric resistance than the channel region. The intermediate region is provided between the low-resistance region and the channel region. The conductive film is provided selectively in contact with the low-resistance region of the semiconductor film.

Abstract: A semiconductor device including a first oxide semiconductor layer, a first gate electrode opposing the first oxide semiconductor layer, a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode, a first insulating layer covering the first oxide semiconductor layer and having a first opening, a first conductive layer above the first insulating layer and in the first opening, the first conductive layer being electrically connected to the first oxide semiconductor layer, and an oxide layer between an upper surface of the first insulating layer and the first conductive layer, wherein the first insulating layer is exposed from the oxide layer in a region not overlapping the first conductive layer in a plan view.

Abstract: A device assembly structure includes a first device and at least one second device. The first device has a first active surface and a first backside surface opposite to the first active surface, and includes a plurality of first electrical contacts disposed adjacent to the first active surface. The second device has a second active surface and a second backside surface opposite to the second active surface, and includes a plurality of second electrical contacts disposed adjacent to the second active surface. The second active surface of the second device faces the first active surface of the first device, the second electrical contacts of the second device are electrically connected to the first electrical contacts of the first device, and a thickness of the second device is less than or equal to one fifth of a thickness of the first device.

Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

Abstract: A process for manufacturing a 3-dimensional memory structure includes: (a) providing one or more active layers over a planar surface of a semiconductor substrate, each active layer comprising (i) first and second semiconductor layers of a first conductivity; (ii) a dielectric layer separating the first and second semiconductor layer; and (ii) one or more sacrificial layers, at least one of sacrificial layers being adjacent the first semiconductor layer; (b) etching the active layers to create a plurality of active stacks and a first set of trenches each separating and exposing sidewalls of adjacent active stacks; (c) filling the first set of trenches by a silicon oxide; (d) patterning and etching the silicon oxide to create silicon oxide columns each abutting adjacent active stacks and to expose portions of one or more sidewalls of the active stacks; (e) removing the sacrificial layers from exposed portions of the sidewalls by isotropic etching through the exposed portions of the sidewalls of the active stack

Abstract: The present application discloses a thin film transistor. The thin film transistor includes a first source electrode and a first drain electrode spaced apart from each other; an active layer on the first source electrode and the first drain electrode, the active layer having a channel part between the first source electrode and the first drain electrode, a source electrode contact part in contact with the first source electrode, and a drain electrode contact part in contact with the first drain electrode; a second source electrode on a side of the source electrode contact part distal to the first source electrode, the second source electrode being electrically connected to the first source electrode; and a second drain electrode on a side of the drain electrode contact part distal to the first drain electrode, the second drain electrode being electrically connected to the first drain electrode.

Abstract: An array substrate, a display device, a thin film transistor, and a method for manufacturing an array substrate are disclosed. The array substrate includes a base substrate, an active layer, and a cover layer. The active layer is on the base substrate, the cover layer is on a side, away from the base substrate, of the active layer and covers the array substrate, the cover layer includes a metal conductive portion and a transparent insulating metal oxide portion, the metal conductive portion and the transparent insulating metal oxide portion include an identical metal element, and the metal conductive portion is electrically connected to the active layer.

Abstract: The present disclosure provides a display backplane and a method for manufacturing the same, a display panel, and a display device. The display backplane includes: a substrate; a first thin film transistor located on one side of the substrate; and a second thin film transistor located on the one side of the substrate, wherein: the first thin film transistor comprises a first active layer, the second thin film transistor comprises a second active layer, wherein the first active layer and the second active layer are located in a same layer, and a material of the first active layer is different from that of the second active layer.

Abstract: A method of manufacturing a semiconductor device including the operations of defining a first metal pattern (MX-1) having a first metal pattern pitch (MX-1P); depositing an insulating layer over the first metal pattern; defining a core grid having a plurality of core locations having a coreX pitch (CoreXP) on the insulating layer; removing predetermined portions of the insulating layer to form a plurality of core openings through a predetermined set of the core locations; and elongating the core openings using a directional etch (DrE) to form expanded core openings that are used to form the next metal layer MX pattern.

Abstract: The present disclosure relates to a thin film transistor and a manufacturing method thereof, a flexible display screen and a display device. The thin film transistor is disposed on a substrate. The thin film transistor includes: an active layer, a source-drain conductive layer, and a gate conductive layer. The gate conductive layer includes a gate electrode, and the gate conductive layer is disposed on one side of the active layer away from the substrate and insulated from the active layer. The source-drain conductive layer includes a first electrode and a second electrode. The orthogonal projections of the first electrode, the gate electrode, and the second electrode on the substrate are sequentially nested from inside to outside and separately disposed. The reliability of image display may be improved.

Abstract: A selector device for a memory cell in a memory array includes a first electrode, a second electrode, and a separator between the first electrode and the second electrode. The separator includes a mixed ionic-electronic conduction material with first ions having a first charge such that the first ions respond to a voltage applied between the first electrode and the second electrode by moving away from the first electrode. The separator is doped near the second electrode with second ions having a second charge that opposes the first charge.

Abstract: The disclosure provides a method of manufacturing a display panel, including: sequentially forming a buffer layer, an oxide semiconductor layer, and a photoresist layer on a substrate; removing the photoresist layer corresponding to a gate defining region to obtain a photoresist section; forming a first metal layer on the photoresist layer and the oxide semiconductor layer which is not covered by the photoresist layer; and peeling off the photoresist section to remove the first metal layer on the photoresist section, wherein the first metal layer which corresponds to the gate defining region remains to obtain a gate.

Abstract: Disclosed are an electro-static discharge circuit, an array substrate, a display panel and a display apparatus. The electro-static discharge circuit includes a first transistor, a second transistor, a first switching device and a second switching device. A first end of the first transistor is electrically connected to a first level line, a second end of the first transistor is electrically connected to a signal line, a control end of the first transistor is electrically connected to a first end of the first switching device, a second end of the first switching device is electrically connected to the first level line, and a control end of the first switching device is electrically connected to the signal line.

Abstract: A semiconductor device with favorable electrical characteristics, a semiconductor device with stable electrical characteristics, or a highly reliable semiconductor device or display device is provided. A first insulating layer and a first conductive layer are stacked over a first region of a first metal oxide layer. A first layer is formed in contact with a second metal oxide layer and a second region of the first metal oxide layer that is not overlapped by the first insulating layer. Heat treatment is performed to lower the resistance of the second region and the second metal oxide layer. A second insulating layer is formed. A second conductive layer electrically connected to the second region is formed over the second insulating layer. Here, the first layer is formed to contain at least one of aluminum, titanium, tantalum, and tungsten.

Abstract: A semiconductor package structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a substrate and a circuit. The substrate has a first portion and a second portion. A first thickness of the first portion is greater than a second thickness of the second portion. The circuit is disposed on the second portion of the substrate. The second semiconductor device is disposed on the circuit of the first semiconductor device.