Abstract: A system and method for generating a control bifurcation signal in accordance with the Open Compute Project (OCP) Specification. An OCP device is provided that has a bifurcation function with an input to activate a bus bifurcation function. An input/output control circuit having an output coupled to a bifurcation control line coupled to the OCP device is provided. The input/output control circuit is operable to provide a bifurcation control signal to the OCP device over the bifurcation control line during an auxiliary power phase transition period of powering-on the OCP device.

Abstract: Examples described herein generally relate to a layered boundary interconnect in an integrated circuit (IC) and methods for operating such IC. In an example, an IC includes a programmable logic region, a plurality of input/output circuits, a plurality of hard block circuits, and a programmable native transmission network. The programmable native transmission network is connected to and between the plurality of input/output circuits and the plurality of hard block circuits. The plurality of hard block circuits is connected to and between the programmable native transmission network and the programmable logic region.

Abstract: A method for lighting a backplane lamp of multiple NVMe hard disks is provided. The method includes: transmitting a VPP address to the backplane in a cyclic manner by the controller, and analyzing the address transmitted by the controller by a programmable logic device of the backplane after a data stream transmitted by the controller is received; transmitting, by the controller, hard disk lamp lighting information of a corresponding disk position to the programmable logic device of the backplane, if a VPP address analyzed by the backplane is the same as the VPP address transmitted by the controller; and performing logical conversion on the hard disk lamp lighting information, to convert a serial data stream on the VPP signal wires into a parallel signal, lighting a backplane lamp at a corresponding port, and uploading information of a position of the hard disk to the controller.

Abstract: Subject matter disclosed herein may generally relate to docking systems, and more particularly, to docking systems for portable computing devices such as, for example, tablet computing devices. The docking system may include (1) an enclosure for the portable computing device and (2) a base, where the enclosure can be docked to the base. A communication channel can be established between the portable computing device and the base via the enclosure and an electrical connection that exists when the enclosure is docked with the base. Through the communication channel, data such as credential data can be passed from the portable computing device to the base. The base can control whether the enclosure is permitted to be undocked from the base based on this credential data.

Abstract: The present invention relates generally to a universal programmable voltage module that activates and deactivates an electrical component based on a programmed voltage or voltage change on a multiplexed input. The universal programmable voltage module may have input circuitry for conditioning the multiplex input for a processor configured to execute instructions from a computer-readable medium; at least one control switch; power conditioning circuitry receiving power from a battery; at least one visual indicator; and switched output circuitry. Methods of operating the universal voltage module in both a momentary and a latched mode are also provided.

Abstract: In accordance with embodiments disclosed herein, there is provided systems and methods for low latency statistical data bus inversion (DBI) for energy reduction. A transmitting component includes a transmitter and a statistical DBI circuit. The statistical DBI circuit is to receive current data to be transmitted on a data bus and is to store previous data transmitted on the data bus. The statistical DBI circuit includes inverting logic to invert bits of the current data before transmission in response to a control signal. The statistical DBI circuit includes adjacent pattern prediction logic to receive a difference vector including a comparison of the previous data and the current data, determine whether the difference vector includes a pattern predicting transmission of the current data with toggle is more efficient than without toggle, and output the control signal in the first state indicating the pattern was detected.

Abstract: A bus system is provided. The bus system includes a master device, an enhanced serial peripheral interface (eSPI) bus, a plurality of slave devices electrically connected to the master device via the eSPI bus, and a first resistor. Each slave device has an alert handshake pin. The alert handshake pins of the slave devices are electrically connected together via an alert handshake control line. The first resistor is coupled between the alert handshake control line and a power supply. Each slave device obtains the number of slave devices according to a first voltage of the alert handshake control line.

Abstract: An information processing device includes a processor; and an offload circuit coupled to the processor via links, the offload circuit including: a first circuit that computes processes of applications, a second circuit that collects values indicating performance information of the links for flows corresponding to the processes of the applications and maximum values indicated in performance information and usable by the links, and a third circuit that determines a flow not satisfying requested performance information based on the values indicating the performance information of the links for the flows, selects a link to which the flow is to be allocated, based on the maximum values indicated in the performance information and usable by the links and values indicated in performance information and currently used by the links, and allocates the flow to the selected link.

Abstract: A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage (Vbus_in) and a second voltage (Vbus_c) and to output second reference voltages. The power control analog subsystem further includes comparators, wherein each of the comparators is coupled to receive a corresponding reference voltage of the first reference voltages from the programmable reference generator and to receive a corresponding selected voltage from a corresponding multiplexer of the multiplexers. Each of the comparators is configured to output a corresponding system interrupt based on a corresponding voltage condition.

Abstract: An operation method of an electronic system includes the following steps. When a first communication module of the electronic device receives a call signal, a controller of an electronic device detects whether an expansion device is electrically connected to the electronic device. Based on a result of the controller detecting whether the expansion device is electrically connected to the electronic device, it is determined whether the electronic system performs sound amplification with a first speaker of the electronic device or performs playing with a second speaker of the expansion device.

Abstract: The first information processing apparatus is configured to detect the removal device attached to the removal device interface, and send, to the second information processing apparatus, a mount request to mount the removal device, the second information processing apparatus is configured to receive the mount request from the first information processing apparatus, mount, on the second information processing apparatus, the removal device attached to the removal device interface of the first information processing apparatus, and send a mount point identifier to the first information processing apparatus, the mount point identifier being an identifier indicating a mount point of the removal device mounted on the second information processing apparatus, and the first information processing apparatus is further configured to receive the mount point identifier from the second information processing apparatus, and mount the mount point of the second information processing apparatus indicated by the mount point ident

Abstract: According to one embodiment, a storage device includes a nonvolatile memory, controller and interface. The nonvolatile memory stores data. The controller controls the operation of the nonvolatile memory. The interface includes first and second input/output units that transmit and receive a signal with respect to a host device. The first and second input/output units are set on the first hierarchy having the same communication function. The interface issues a connection request to the first input/output unit and when the connection request to the first input/output unit is rejected, the interface issues the connection request to the second input/output unit.

Abstract: The present disclosure provides a swappable card module for a computer component. The swappable card module can be configured to positioned in either the front side or back side of a server system. Some examples of the present disclosure provide for a card module holding at least one computer card, an adapter board, and a module housing.

Abstract: A memory system memory system includes a first chip configured to perform a first operation, a second chip configured to perform a second operation, and a stacked memory device including a stacked structure of a plurality of memories. The stacked memory device being configured to be accessed by the first chip and the second chip through a shared bus.

Abstract: Various embodiments are directed to a USB hub configured for supporting multiple data transfer speed protocols. The USB hub comprises a plurality of protocol/LINK layer components; and a physical layer component shared among the plurality of protocol/LINK layer components and supporting at least two USB connection ports. The physical layer component is in communication with each of the plurality of protocol/LINK layer components. A buffer system (including RX/TX buffers) is shared among the plurality of protocol/LINK layer components and a USB host controller component is in communication with the buffer system. The physical layer component is configured for operating in a first mode to support one of the at least two USB ports in a first operating mode; and operating in a second mode to support the at least two USB ports in a second operating mode.

Abstract: A storage device includes a controller and a nonvolatile memory device. The controller includes a field programmable gate array (FPGA) and receives an FPGA image for updating the FPGA from an outside in response to a first command received from the outside. The nonvolatile memory device stores the FPGA image. The controller receives the FPGA image through a main interface or a sideband interface, and executes the FPGA image in response to a second command received from the outside.

Abstract: A method for enhancing an execution of AS5643 functions within AS5643 bus nodes. Also, at the same time, the method reduces overall software requirements and complexity of the AS5643 functions. The method includes attaching a AS5643 function block to the one or more interface layers of an IEEE-1394 serial bus. The AS5643 function block includes firmware or hardware. Further, the method provides the function block with a programmable code.

Abstract: An integrated circuit includes a combined serial data output and interrupt output terminal, a serial communication control circuit; an interrupt generation circuit, and an output circuit. The output circuit includes a serial data input, an interrupt input, and a combined serial data and interrupt output. The serial data input is coupled to a serial data output of the serial communication circuit. The interrupt input is coupled to an interrupt output of the interrupt generation circuit. The combined serial data and interrupt output is coupled to the combined serial data output and interrupt output terminal.

Abstract: Disclosed is an adapter. The adapter may include a first end, a second end, a housing, and a logic circuit. The first end may be operative to connect to a terminal device. The second end may be operative to connect to a peripheral device. The housing may connect the first end to the second end. The logic circuit may be located within the housing and electrically couple the first end to the send end. The logic circuit may be operative to perform a handshake operation between the terminal device and the peripheral device to determine compatibility between the terminal device and the peripheral device.

Abstract: An infant care station that includes multiple operational modules that communicate with each other to carry out the infant care station functions. The multiple modules form part of a micro-environmental platform that allows for communication and power connections between all of the operational components required within the infant care station. The multiple modules communicate with each other utilizing a universal interface bus that includes power connections, communication connections and control connections between the multiple modules. Sensor data obtained by various sensors is stored using a standard data format. A data repository is included in one of the modules and is used to store sensor data obtained from the infant patient, operational protocols and other information needed to operate the infant care station. The data repository provides a central location for both data producers and data subscribers that are part of the micro-environment platform.