Abstract: A test fixture for electrically connecting a limited-access test target on a loaded circuit board with an interface probe of a tester may comprise an elongate test probe having a first end and a second end and a wireless interface printed circuit board having a first side and a second side. The first end of the elongate test probe is substantially aligned with the limited-access target on the loaded circuit board when the test fixture is positioned adjacent the loaded circuit board. A contact pad on the first side of the wireless interface printed circuit board is substantially aligned with the elongate test probe so that the contact pad contacts the second end of the elongate test probe. A contact target on the second side of the wireless interface printed circuit board is electrically connected to the contact pad on the first side of the wireless interface printed circuit board. The contact target contacts the interface probe of the tester when the test fixture is mounted on the tester.

Abstract: Method for obtaining a difference in lengths among a plurality of signal traces formed on two different surfaces, includes dividing a propagation delay of a first surface into a propagation delay of a second surface to obtain a correction factor. The segment of the signal traces formed on the second surface is adjusted by multiplying the correction factor to this segment. Then, the adjusted segment is summed with the segment of the signal traces formed on the first surface to obtain a total length. The total length of each of the signal traces is subtracted from the longest total length of the signal traces.

Abstract: An external spring probe is provided having a first section and a second section which extend and compress relative to each other. The first section consists of a tip at one end and a first contact component opposite the tip. A flange extends radially outward between the tip and the first contact component. The second section consists of a tip at one end and a second contact component opposite the tip. The second contact component is in contact with the first contact component. A flange extends radially outward between the second section tip and the second contact component. A spring is sandwiched between the two flanges surrounding the two contact components. The first and second contact components remain in contact with each other during compression and extension of the two sections.

Abstract: A method of engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof includes: a) providing an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate; b) engaging the grouping of apexes with the single test pad on the semiconductor substrate; and c) sending an electric signal between the grouping of apexes and test pad to evaluate operability of integrated circuitry on the semiconductor substrate. Constructions and methods are disclosed for forming testing apparatus comprising an engagement probe having an outer surface comprising a grouping of a: plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate.

Abstract: A power sensing RF termination comprising a calibration means allows the user to correct for part-to-part variation, miss match loss and output offset. The power sensing RF termination comprises a first and second temperature sensitive resistors connected at a first common junction, a switching means for connecting either an RF input or a DC power reference to the first common junction, a first switch for connecting either a DC voltage source or a first current detecting resistor to the first temperature sensitive resistor, and a second current detecting resistor connected to the second temperature sensitive resistor. A first output terminal is connected to the junction between the first switch and the first temperature sensitive resistor. A second output terminal is connected to the first common junction. A third output terminal is connected to the junction between the second temperature sensitive resistor and the second current detecting resistor.

Abstract: A spring element used in a temporary package for testing semiconductors is provided. The spring element is compressed so as to press the semiconductor, either in the form of a bare semiconductor die or as part of a package, against an interconnect structure. The spring element is configured so that it provides sufficient pressure to keep the contacts on the semiconductor in electrical contact with the interconnect structure. Material is added and/or removed from the spring element so that it has the desired modulus of elasticity. The shape of the spring element may also be varied to change the modulus of elasticity, the spring constant, and the force transfer capabilities of the spring element.

Abstract: The present invention is directed to structures having a plurality of discrete insulated elongated electrical conductors projecting from a support surface which are useful as probes for testing of electrical interconnections to electronic devices and other electronic components and particularly for testing of integrated circuit devices with rigid interconnection pads and multi-chip module packages with high density interconnection pads and the apparatus for use thereof and to methods of fabrication thereof. Coaxial probe structures are fabricated by the methods described providing a high density coaxial probe.

Abstract: A system for testing integrated circuit devices is disclosed in which a tester communicates with a known good device through a channel. Tester-DUT interface circuitry is provided for monitoring the channel while the tester is writing data as part of a test sequence to locations in the known good device. In response, the interface circuitry writes the data to corresponding locations in each of a number of devices under test (DUTs). The interface circuitry monitors the channel while the tester is reading from the locations in the known good device (KGD), and in response performs a comparison between DUT data read from the corresponding locations in the DUTs and expected responses obtained form the KGD.

Abstract: A method of measuring total charge of an insulating layer on a semiconductor substrate includes applying corona charges to the insulating layer, and measuring a surface photovoltage of the insulating layer after applying each of the corona charges. The charge density of each of the corona charges is measured with a coulombmeter. A total corona charge required to obtain a surface photovoltage of a predetermined fixed value is determined and used to calculate the total charge of the insulating layer. The fixed value corresponds to either a flatband or midband condition.

Abstract: A method and structure are provided for an effective and efficient method and device for supporting a flip chip die undergoing analysis. The method and device provide added support and rigidity to flip chip dies. The method and device can facilitate multiple rounds of circuit testing and debugging. The result of the method and device is durable casing for flip chip device analysis.

Abstract: An interconnect for testing semiconductor components includes a substrate, and contacts on the substrate for making temporary electrical connections with bumped contacts on the components. Each contact includes a recess and a support member over the recess configured to electrically engage a bumped contact. The support member is suspended over the recess on spiral leads formed on a surface of the substrate. The spiral leads allow the support member to move in a z-direction within the recess to accommodate variations in the height and planarity of the bumped contacts. In addition, the spiral leads twist the support member relative to the bumped contact to facilitate penetration of oxide layers thereon. The spiral leads can be formed by attaching a polymer substrate with the leads thereon to the substrate, or by forming a patterned metal layer on the substrate. In an alternate embodiment contact, the support member is suspended over the surface of the substrate on raised spring segment leads.

Abstract: An electric device testing apparatus for carrying out a test by pushing a terminal of an IC against a contact portion of a test head, comprising a temperature calculation means for calculating an actual temperature of the IC based on a signal from a temperature sensing element provided on the IC.

Abstract: A load board adapter which is removably attachable to a load board and provides removable and replaceable sockets for individual integrated circuit packages to provide an electrical connection between the integrated circuits and the circuit tester to facilitate testing of relatively small quantities of electronic devices on high volume testers. The chip sockets can be configured to hold a variety of devices such as a DIP, an SOJ, a TSOP, a ZIF, a PLCC, etc. A first set of contacts are clamped to a main adapter base which is removably securable to a load board or similar test fixture. Each contact within the first set of contacts includes a load board engagement portion which is configured to frictionally engage pad sites on the test fixture. A second portion of each contact within the first set of contacts is configured to engage an individual contact within a second set of contacts. The second contacts are electrically connected to pin receptacles on a substrate such as a printed circuit board.

Abstract: A load board feeder is secured to the center portion of a test head. The load board feeder uses a lift mechanism to control the movement of a locator block in vertical directions. A load board rests on the locator block and a location device on the locator block ensures alignment of the load board with a test head. When the load board feeder lowers the load board, the load board is properly seated on the test head without damaging delicate pogo pins.

Abstract: An apparatus for monitoring and recording multiple gate dielectric leakage currents during a reliability characterization test. The large number of devices tested allows for longer testing at lower voltages thereby minimizing the need to rely on mathematical models. Solid-state multiplexers (MUX) at multiple levels of test apparatus assembly eliminate excess wiring and allow for constant scan monitoring of the devices under test (DUT) without concern for wearout of electromechanical switches. Data resolution is enhanced with fewer data readings per fixed time period during quiescent periods and multiple readings when the leakage current is changing more rapidly. Thus the resolution of the data is maximized during the critical phase of dielectric breakdown allowing for more precise characterizations of gate dielectrics without the need to increase data storage.

Abstract: An insert is provided for testing a chip-scale-packaged microelectronic device having an encapsulant-protrusion and a ballgrid-array of outwardly-projecting contacts. The insert comprises a substrate of mono-crystalline silicon. Walls of the substrate define a plurality of pockets that are configured to receive and contact the outwardly-projecting contacts of the microelectronic device. Additional walls of the substrate define a recess disposed amongst the plurality of pockets. The recess has a width greater than the widths of any of the pockets. Additionally, the recess comprises a perimeter greater than that of the encapsulant-protrusion of the chip-scale-packaged microelectronic device, and a depth operative to clear the encapsulant-protrusion when the chip-scale package is seated upon the insert.

Abstract: An enhanced probe apparatus is provided for facilitating pin contact on a multi-pin integrated circuit or other high density connector-pin environment. The probe includes, in one exemplary embodiment, a magnification lens and an LED lamp which are both are mounted in various arrangements to an oscilloscope probe device. Both the lens and the LED are adjustable independently and each is movable in a plurality of directions to optimize the magnification and illumination of a pin contact area on one edge of an integrated circuit chip in order to facilitate pin identification and probe-to-pin contact for signal acquisition.

Abstract: A device for testing flat panel displays includes an interface having compliant bumps mounted thereon, which make electrical contact with pads on the display panel. The interface may have a hole formed therein for allowing the passage of light therethrough when the interface is mounted on the display panel. The compliant bumps ensure that all of the bumps make sufficient electrical contact with the pads.

Abstract: A probe card transfer mechanism, in which a chuck top is used as a main transfer mechanism, comprises a passing and receiving mechanism for passing or receiving a probe card to or from the chuck top. The passing and receiving mechanism has an adapter for detachably holding the probe card having, for example, a card holder, a transfer tray for detachably holding the adapter, a pair of guide rails for guiding the transfer tray to a probe card passing and receiving position, an arm to which the guide rails are fixed, and a probe card supporting member for receiving the adapter conveyed together with the transfer tray along the arm. The probe card supporting member is provided around the chuck top. A distal end portion of the transfer tray is U-shaped. The transfer tray is mounted on the U-shaped portion.

Abstract: A test fixture for electrically connecting a plurality of limited-access test targets on a loaded circuit board with a plurality of interface probes of a tester may comprise a plurality of elongate test probes, a universal interface plate (UIP), and a wireless interface printed circuit board (WIPCB). A first end of each elongate test probe is substantially aligned with a limited-access target on the loaded circuit board when the test fixture is positioned adjacent the loaded circuit board. Each of a plurality of double-headed spring probes mounted to the UIP has a first spring loaded head located at its first end and a second spring loaded head located at its second end. Each double-headed spring probe is generally axially aligned with an elongate test probe so that its first spring loaded head contacts a second end of the corresponding elongate test probe.