Abstract: The holder for an electroconductive contact unit according to the present invention uses a silicon wafer having a laminated structure including a first silicon layer, second silicon layer and silicon oxide film which is disposed between the two silicon layers. A small hole is formed in the first silicon layer for coaxially and slidably guiding a head portion of an electroconductive needle member, and a large hole is formed in the second silicon layer for receiving a flange portion of the needle member and a compression coil spring so that the silicon oxide film serves as a stopper for the flange member. Thus, by finishing the surface of the first silicon layer by lapping, the projecting length of the electroconductive needle member can be defined at a high precision.

Abstract: A method of generating transistor scattering parameters employs a single circuit simulation with a self-correction scheme for the artificial DC voltage dropped across the 50-Ohm resistor representing transmission line impedance. A sub-circuit without 50-Ohm transmission line resistance is used to compute transistor bias current via a current-controlled voltage source to compensate for the DC voltage dropped across a 50-Ohm resistor contained in the network.

Abstract: A predetermined area of a photo-sensing surface of a solar cell is illuminated, and a voltage vs. current characteristic is measured. Note, the rest of the photo-sensing surface which is not illuminated is called a dark area. Next, in a dark state in which the photo-sensing surface is not illuminated, a dark characteristic of the solar cell is measured. The obtained dark characteristic is multiplied by a ratio of the area of the dark area to the area of the photo-sensing surface, thereby a dark characteristic of the dark area is calculated. Then, a difference characteristic between the measured voltage vs. current characteristic and the dark characteristic of the dark area is calculated. The difference characteristic is multiplied by a ratio of the area of the photo-sensing surface to the area of the illuminated portion, thereby a voltage vs. current characteristic of the solar cell in a state corresponding to that the entire area of the photo-sensing surface is illuminated at once is obtained.

Abstract: A semiconductor testing system includes a compliant layer formed on a testing surface. Projections from the compliant layer form an electrical path to an electrical ground from a testing surface to a plurality of recessed ball pads disposed on a surface of a substrate. Thus, a plurality of electrical connections between a semiconductor die on the substrate and the ball pads may be tested for proper ground during a wirebonding process.

Abstract: A connector assembly is disclosed and claimed. The connector assembly includes a connector and a cable attachable at one end to the connector. The cable includes a first conductive layer and a second conductive layer disposed over the first conductive layer. A layer of insulation material is disposed at least between the first conductive layer and the second conductive layer and a plurality of capacitors are connected between the first conductive layer and the second conductive layer.

Abstract: An integrated circuit device test arrangement includes a plurality of microcomputers. Each of the microcomputers is interconnected directly through a separate test socket to a separate integrated circuit device that is inserted into the test socket. A device tester is coupled to the plurality of microcomputers for transmitting information between the device tester and the plurality of microcomputers. Each microcomputer contains instructions and data for performing a test routine on the associated integrated circuit device and transmitting selected results of the test routine to the tester.

Abstract: A method and apparatus for generating a test pattern enabling the detection of malfunctions produced when a semiconductor device is loaded on actual equipment prior to marketing. Using a logical analyzer, signal waveform data collected during the period of signal malfunction is acquired. This signal waveform data is converted by a test pattern generating device into a test pattern for automatic testing equipment. This test pattern is used to change data at the time of malfunction into normal data to generate a pattern of expected values for an output signal of the semiconductor device. Then, it is determined whether the input signal setting required for an output signal of the semiconductor device is present in the signal waveform data. If not, a test pattern for setting the input signal is generated. If the malfunction is reproduced in the testing equipment, the test pattern is used as a mass production test.

Abstract: A method of engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof includes: a) providing an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate; b) engaging the grouping of apexes with the single test pad on the semiconductor substrate; and c) sending an electric signal between the grouping of apexes and test pad to evaluate operability of integrated circuitry on the semiconductor substrate. Constructions and methods are disclosed for forming testing apparatus comprising an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate.

Abstract: A metering assembly includes an FT-21 kWh analog meter enclosure having an opening and carrying a plurality of stabs. A frame includes four sides, with the bottom side carrying a plurality of electrical terminals. The stabs electrically engage the frame terminals. A mechanism secures the frame within the enclosure opening. A display module includes a display port and a metering display driven from the display port. A monitoring module includes a monitoring unit, a display port driven by the monitoring unit, and a module enclosure having four sides. The monitoring module top side is mounted to the frame top side. The monitoring module bottom side has a plurality of electrical connections to the frame bottom side electrical terminals. The monitoring module display port is electrically connected to the display module display port. A mechanism mounts the display module to the frame offset from the monitoring module front side.

Abstract: A probe card for testing a semiconductor wafer, a test method, and a test system employing the probe card are provided. The probe card includes: a substrate; an interconnect slidably mounted to the substrate; and a force applying mechanism for biasing contacts on the interconnect into electrical engagement with contacts on the wafer. The force applying mechanism includes spring loaded electrical connectors that provide electrical paths to the interconnect, and generate a biasing force. The biasing force is controlled by selecting a spring constant of the electrical connectors, and an amount of Z-direction overdrive between the probe card and wafer. The probe card also includes a leveling mechanism for leveling the interconnect with respect to the wafer.

Abstract: A novel cassette structure technique for enabling simultaneous burn-in of pluralities of LEDs plugged into the cassettes, and then, with the cassettes mounted within a light integrating sphere system, separately measuring the spectral flux emitted by each successive individual LED plugged into the cassette to determine optical and electrical characteristics of each LED separately from the others.

Abstract: The exciting current of a current transformer is calculated and added to the measured secondary current to produce a corrected signal. The exciting current is calculated by first calculating the current transformer induced voltage. The induced voltage is calculated from a parameter related to secondary current and known characteristics of loop impedances through which secondary current flows. The parameter related to secondary current may be the secondary current itself, or a voltage associated with secondary current flowing through an impedance. The calculated induced voltage is then applied across an inductor having similar magnetic properties as the current transformer. By scaling the applied voltage properly, the current flowing in the inductor is approximately proportional to the exciting current of the current transformer. The current in the inductor is measured, and, by applying an appropriate constant of proportionality, the exciting current of the current transformer is determined.

Abstract: Disclosed are a holding mechanism of a contactor and an automatic renewing mechanism of a contactor provided with the holding mechanism of the contactor. The contactor holding mechanism includes a frame (11) fixed to a performance board (P), a plurality of latch mechanisms (13) for holding the contactor inside the frame, and a suction fixing mechanism (14) for fixing the contactor held by the latch mechanisms inside the frame by a vacuum suction force. The automatic renewing mechanism of the contactor includes a holding mechanism (10) for detachably holding the contactor, and a delivery mechanism (16) for delivering the contactor (12) to and from the holding mechanism.

Abstract: A test apparatus and a method for testing an integrated circuit's data storage device's input/output signal pins for alternating current (AC) defects, by providing an interface that will couple each respective individual test contact, in a subset of said contacts, to a select plurality of the data storage input/output signal pins so that when a selected data string is introduced into the integrated circuit so that each input/output pin on a data storage device in the integrated circuit will be tested in sequence whereby the number of contacts required by the tester can be reduced.

Abstract: A test device suitable for testing a liquid crystal display (LCD) unit. The test device comprises a first supporting board and a plurality of first receptacles formed on one side of the first supporting board. A plurality of openings are arranged in such a way that interval spaces are in between the openings. A second supporting board is provided, wherein a plurality of second receptacles are formed on one side of the second supporting board. Two connecting boards are respectively connected to the first supporting boards and the second supporting boards. A plurality of adjustable partitions are located on the connecting boards, so that interval spaces between the first supporting board and the second supporting board can be adjusted. The test device further comprises a sole plate, a plurality of inverters and a plurality of conductive wires.

Abstract: An integrated circuit device test arrangement includes a plurality of microcomputers. Each of the microcomputers is interconnected directly through a separate test socket to a separate integrated circuit device that is inserted into the test socket. A device tester is coupled to the plurality of microcomputers for transmitting information between the device tester and the plurality of microcomputers. Each microcomputer contains instructions and data for performing a test routine on the associated integrated circuit device and transmitting selected results of the test routine to the tester.

Abstract: In order to obtain optimum irradiation conditions of an electron beam according to the material and structure of a circuit pattern to be inspected and the kind of a failure to be detected and inspect under the optimum conditions without delay of the inspection time, an inspection device for irradiating the electron beam 19 to the sample board 9 which is a sample, detecting generated secondary electrons by the detector 7, storing obtained signals sequentially in the storage, comparing the same pattern stored in the storage by the comparison calculation unit, and extracting a failure by comparing the predetermined threshold value with the comparison signal by the failure decision unit is provided, wherein the optimum value of the irradiation energy is stored in the data base inside the device beforehand according to the structure of a sample and a recommended value of the irradiation energy suited to inspection can be searched for by inputting or selecting the irradiation energy by a user or inputting informati

Abstract: Characterization of free-space electromagnetic energy pulses (15) using a chirped optical probe beam is provided. An electro-optic or magneto-optic crystal (14) is positioned such that the free-space radiation and chirped optical probe signal co-propagate, preferably in a co-linear common direction, through the crystal where a temporal waveform of the free-space radiation is linearly encoded onto a wavelength spectrum of the chirped optical probe signal. The temporal waveform of the free-space radiation is then reconstructed using, for example, a dynamic subtraction of the spectral distribution of the chirped optical probe signal without modulation from the spectral distribution of the chirped optical probe signal with modulation by the free-space radiation.

Abstract: A method of using bias-dependent S-parameter measurements as a form of microscopy. The microscopy can be used to resolve the details of the internal charge and electric field structure of a semiconductor device. Like other forms of microscopy, the S-parameter microscopy focuses on pseudo “images” and provides a contrast in the “images”. Essentially, the images are gathered in raw form as S-parameter measurements and extracted as small signal models. The models are used to form charge control maps, through a selective method analogous to focusing. Focusing is provided by an algorithm for the unique determination of small signal parameters with contrasts provided by utilizing measured bias dependent activity to discriminate boundaries between the electrical charge and fields. As such, the system is able to accurately forecast semiconductor performance.

Abstract: An apparatus for measuring high frequency currents includes a non-ferrous core current probe that is coupled to a wide-band transimpedance amplifier. The current probe has a secondary winding with a winding resistance that is substantially smaller than the reactance of the winding. The sensitivity of the current probe is substantially flat over a wide band of frequencies. The apparatus is particularly useful for measuring exposure of humans to radio frequency currents.