Abstract: In an electric or hybrid electric vehicle, a voltage monitor (102) is directly coupled to a traction motor (38) and/or generator motor (30) to detect a permanent magnet induced voltage within the motor at a predetermined speed and no load condition. A controller (100) compares the detected permanent magnet induced voltage with an expected reference voltage that represents an expected permanent magnet induced voltage at full magnetization and the predetermined speed. The comparison includes identifying points of synchronization and using those points to determine a difference in the detected permanent magnet induced voltage that is caused by a faulty component.

Abstract: A printed-circuit board (PCB) test jack comprises a body portion adapted for mounting on the top surface of a PCB and to provide mechanical support and signal and ground connections to an external test probe. At least one surface mount ground conductor is connected to and extends from the body portion to provide the ground connection; the ground conductors are arrayed for attaching to corresponding surface pads on the PCB's top surface. A single through-hole pin for insertion into a corresponding through-hole on the PCB is electrically isolated from the surface mount ground conductors and is connected to the body portion for providing the signal connection.

Abstract: A method for testing integrated circuits, including measuring a current signature delta value of a device under test and comparing the current signature delta value to a threshold current signature delta value to determine whether the current signature delta value is greater than the threshold current signature delta value. If the current signature delta value exceeds the threshold current signature delta value, the integrated circuit is rejected. Integrated circuits are also rejected if the post-stress current signature value exceeds a maximum current signature value, even though the current signature delta value is less than the threshold current signature delta value. In addition, an apparatus for testing integrated circuits is disclosed.

Abstract: A digital eddy current proximity system including a digital impedance measuring device for digitally measuring the proximity probes impedance correlative to displacement motion and position of a metallic target object being monitored. The system further including a cable-length calibration method, an automatic material identification and calibration method, a material insensitive method, an inductive ratio method and advanced sensing characteristics.

Abstract: In order to obtain optimum irradiation conditions of an electron beam according to the material and structure of a circuit pattern to be inspected and the kind of a failure to be detected and inspect under the optimum conditions without delay of the inspection time, an inspection device for irradiating the electron beam 19 to the sample board 9 which is a sample, detecting generated secondary electrons by the detector 7, storing obtained signals sequentially in the storage, comparing the same pattern stored in the storage by the comparison calculation unit, and extracting a failure by comparing the predetermined threshold value with the comparison signal by the failure decision unit is provided, wherein the optimum value of the irradiation energy is stored in the data base inside the device beforehand according to the structure of a sample and a recommended value of the irradiation energy suited to inspection can be searched for by inputting or selecting the irradiation energy by a user or inputting informati

Abstract: A method and apparatus for a micromachine relay is provided. A pin controller comprises at least one spring pin designed to movably couple the pin controller to a device under test (DUT) to provide signals to the DUT. The pin controller further includes a micromachine relay coupled to the at least one spring pin to control the movement of the at least one spring pin and an integrated circuit for controlling the micromachine relay.

Abstract: A load board adapter which is removably attachable to a load board and provides removable and replaceable sockets for individual integrated circuit packages to provide an electrical connection between the integrated circuits and the circuit tester to facilitate testing of relatively small quantities of electronic devices on high volume testers. The chip sockets can be configured to hold a variety of devices such as a DIP, an SOJ, a TSOP, a ZIF, a PLCC, etc. A first set of contacts are clamped to a main adapter base which is removably securable to a load board or similar test fixture. Each contact within the first set of contacts includes a load board engagement portion which is configured to frictionally engage pad sites on the test fixture. A second portion of each contact within the first set of contacts is configured to engage an individual contact within a second set of contacts. The second contacts are electrically connected to pin receptacles on a substrate such as a printed circuit board.

Abstract: A method of engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof includes: a) providing an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate; b) engaging the grouping of apexes with the single test pad on the semiconductor substrate; and c) sending an electric signal between the grouping of apexes and test pad to evaluate operability of integrated circuitry on the semiconductor substrate. Constructions and methods are disclosed for forming testing apparatus comprising an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate.

Abstract: A microwave and millimeter-wave electric-field mapping system based on electro-optic sampling has been developed using micromachined Gallium Arsenide crystals mounted on gradient index lenses and single-mode optical fibers. The probes are able to detect three orthogonal polarizations of electric fields and, due to the flexibility and size of the optical fiber, can be positioned not only from the extreme near-field to the far-field regions of microwave and millimeter-wave structures, but also inside of enclosures such as waveguides and packages. A microwave electric-field-mapping system based on micromachined GaAs electro-optic sampling probes mounted on gradient index lenses and single-mode optical fibers can extract field images from the interior of an enclosed microwave cavity.

Abstract: A method for improving the signal-to-noise ratio in an IDDQ defect test is disclosed. An integrated circuit is divided into a plurality of areas and each area is provided with and bounded by terminals. An IDDQ defect is activated to generate IDDQ defect current within the integrated circuit. An amount of IDDQ defect current generated within each area is measured at the terminals provided thereto. Based on the IDDQ current measurement on each area, an IDDQ current map is created. By analyzing the IDDQ current map, the presence and location of the defect is determined. Based on the determination, the IDDQ defect is isolated.

Abstract: Integrated circuits, in particular memory chips of the DDR SDRAM type, are tested in a parallel manner. In order to prevent the circuits from being driven relative to one another during a test operation, an input terminal that is already connected to a channel of an automatic test machine anyway is connected to a switching device, by which the output drivers can be turned off in a manner dependent on the control signal that can be fed in at the input terminal. The switching device preferably contains a demultiplexer and also a multiplexer. The demultiplexer can be driven by a test control signal that is additionally generated besides the test control signal. The input terminal is connected to a tester channel anyway during test operation, with the result that no additional external outlay arises.

Abstract: A method and apparatus for aligning and connecting objects, such as semiconductor components and substrates, are provided. The apparatus includes a hexapod with a moving platform for holding an object for movement in six degrees of freedom. The apparatus also includes a chuck assembly for holding a mating object in a stationary position. A camera and a height gauge are mounted on the moving platform to allow determination of the position and orientation of the object on the chuck assembly. Likewise, a camera and a height gauge are mounted on the chuck assembly to allow determination of the position and orientation of the object on the moving platform. The hexapod includes linear actuators operable by a controller upon signal input from the cameras and height gauges. The apparatus can be used to electrically connect semiconductor dice and chip scale packages to interconnects for testing.

Abstract: A method of engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof includes: a) providing an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate; b) engaging the grouping of apexes with the single test pad on the semiconductor substrate; and c) sending an electric signal between the grouping of apexes and test pad to evaluate operability of integrated circuitry on the semiconductor substrate. Constructions and methods are disclosed for forming testing apparatus comprising an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate.

Abstract: The probe card of the present invention permits testing of a semiconductor device-under-test under high temperatures and includes a plurality of printed circuit boards stacked together to form a probe interface board having a top surface and a lower testing face. A heat sink is mounted on the probe interface board at the top surface and extends to the lower testing face. A needle supporting module is carried by the heat sink at the lower testing face and has a plurality of probe needles for electrically connecting to electrical contacts of a semiconductor device-under-test.

Abstract: A digital eddy current proximity system including a digital impedance measuring device for digitally measuring the proximity probes impedance correlative to displacement motion and position of a metallic target object being monitored. The system further including a cable-length calibration method, an automatic material identification and calibration method, a material insensitive method, an inductive ratio method and advanced sensing characteristics.

Abstract: A semiconductor testing device is used for testing a semiconductor device which has at least one spherical connection terminal. The testing device includes an insulating substrate having an opening formed therein at a position corresponding to the position of the spherical connection terminal, and a contact member, formed on the insulating substrate, including a connection portion which is connected with the spherical connection terminal, at least the connection portion being deformable and extending into the opening.

Abstract: A method of engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof includes: a) providing an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate; b) engaging the grouping of apexes with the single test pad on the semiconductor substrate; and c) sending an electric signal between the grouping of apexes and test pad to evaluate operability of integrated circuitry on the semiconductor substrate. Constructions and methods are disclosed for forming testing apparatus comprising an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate.

Abstract: The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (&dgr;) which minimizes the standard deviation of the function F to be obtained (step ST1.

Abstract: The present invention is a test system for testing functionality of a manufactured component. The test system has a test fixture, a control unit and a marker assembly. The test fixture transmits tests signals to, and receives tests signals from, the manufactured component. The control unit produces test signals and transmits the test signals to, and receives tests signals from, the test fixture. The control unit also produces a result signal dependant on the received test signals. The control unit further produces an actuating signal in response to certain test signals. The marker assembly contains a marking material and is mounted in the test fixture. The marker assembly is configured to receive the actuating signal such that the marker assembly actuates in response to the actuating signal. Upon actuation, the marker assembly physically contacts the manufactured component leaving marking material on the manufactured component.

Abstract: Disclosed herein is a sensor assembly (10) for attachment to an electrical conductor (5), which includes a base (20) having a cavity (22) and a pair of detector housings (30) extending from the base (20). The detector housings (30) are laterally spaced and substantially parallel and are provided to receive a magnetic field detector. An electronic circuit card (70) is disposed within the base cavity (22) and is operatively coupled to the magnetic field detectors. Additionally, an auxiliary circuit card (90)) that contains logic for detecting an arc fault may be provided for communicating with the electronic circuit card (70).