Abstract: An apparatus is provided which comprises: a first magnet with perpendicular magnetic anisotropy (PMA); a stack of layers, a portion of which is adjacent to the first magnet, wherein the stack of layers is to provide an inverse Rashba-Bychkov effect; a second magnet with PMA; a magnetoelectric layer adjacent to the second magnet; and a conductor coupled to at least a portion of the stack of layers and the magnetoelectric layer.

Abstract: A manufacturing method of a device chip includes a die bonding resin providing step of supplying a die bonding resin in a liquid state to a back surface side of a wafer with device chips formed on a front surface thereof and solidifying the die bonding resin, a water-soluble resin providing step of covering the die bonding resin with a water-soluble resin, a laser processing step of applying a laser beam from the back surface side of the wafer to remove the die bonding resin and the water-soluble resin, an etching step of etching an exposed portion on the back surface side of the wafer to divide the wafer, and a water-soluble resin removing step of supplying water on the back surface side of the wafer to remove the water-soluble resin.

Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, an oxide semiconductor channel, an insulation layer, an oxide layer, and a gate electrode. The oxide semiconductor channel includes a portion extending along a first direction and connects the first electrode to the second electrode. The insulation layer surrounds the oxide semiconductor channel. The oxide layer covers the oxide semiconductor channel and the insulation layer, and includes an oxide of a metal element. The gate electrode covers the oxide semiconductor channel, the insulation layer, and the oxide layer, and includes the metal element.

Abstract: A memory device includes a conductive strip stack structure having conductive strips and insulating layers stacked in a staggered manner and a channel opening passing through the conductive strips and the insulating layer; a memory layer disposed in the channel opening and overlying the conductive strips; a channel layer overlying the memory layer; a semiconductor pad extending upwards from a bottom of the channel opening beyond an upper surface of a bottom conductive strip, in contact with the channel layer, and electrically isolated from the conductive strips; wherein the channel layer includes a first portion having a first doping concentration and a second portion having a second doping concentration disposed on the first portion.

Abstract: Methods of forming germanium channel structure are described. An embodiment includes forming a germanium fin on a substrate, wherein a portion of the germanium fin comprises a germanium channel region, forming a gate material on the germanium channel region, and forming a graded source/drain structure adjacent the germanium channel region. The graded source/drain structure comprises a germanium concentration that is higher adjacent the germanium channel region than at a source/drain contact region.

Abstract: A light emitting diode including a first light emitting region, and a second light emitting region spaced apart from and surrounding the first light emitting region, in which the first light emitting region and the second light emitting region are configured to be independently operated.

Abstract: In a micro-device integration process, a donor substrate is provided on which to conduct the initial manufacturing and pixelation steps to define the micro devices, including functional, e.g. light emitting layers, sandwiched between top and bottom conductive layers. The microdevices are then transferred to a system substrate for finalizing and electronic control integration. The transfer may be facilitated by various means, including providing a continuous light emitting functional layer, breakable anchors on the donor substrates, temporary intermediate substrates enabling a thermal transfer technique, or temporary intermediate substrates with a breakable substrate bonding layer.

Abstract: The present disclosure provide a semiconductor device and a method for preparing the semiconductor device. The semiconductor device includes a substrate having a memory cell region and a peripheral region, wherein the memory cell region has at least one first shallow trench isolation and the peripheral region has at least one second shallow trench isolation; a plurality of gates in the first shallow trench isolation; a first semiconductor layer in the peripheral region; a first insulating layer covering the substrate in the memory cell region; a crystalline overlayer in the memory cell region and a doped portion of the substrate below the crystalline overlayer; and a second semiconductor layer on a portion of the first insulating layer, wherein a top surface of the first semiconductor layer and a top surface of the second semiconductor layer are coplanar.

Abstract: Disclosed is a light emitting display device that can enhance light extraction efficiency of light which is emitted from a light emitting element. The light emitting display device includes: an uneven portion that is provided on a substrate and includes a plurality of concave portions separated from each other and protruding portions between the plurality of concave portions; and a light emitting element that is provided on the uneven portion. Each protruding portion includes a vertex portion that is provided between three neighboring concave portions and a connection portion that is connected to two neighboring vertex portions between two neighboring concave portions and has a height less than that of the vertex portions.

Abstract: A thermal conductive device includes a first conductive plate, a second conductive plate, a plurality of wicks and a fluid. The first conductive plate has a first portion adjacent to edges of the first conductive plate and a second portion far away from the edges. The second conductive plate has a first portion adjacent to edges of the first conductive plate and a second portion far away from the edges. The first portion and the second portion of the first conductive plate are respectively connected to the first portion and the second portion of the second conductive plate to define a chamber. The plurality of wicks are disposed within the chamber. The fluid is disposed within the chamber.

Abstract: A method of manufacturing a pixelated structure may be provided. The method may comprising providing a donor substrate comprising the plurality of pixelated microdevices, bonding a selective set of the pixelated microdevices from the donor substrate to a system substrate; and patterning a bottom conductive layer of the pixelated microdevices after separating the donor substrate from the system substrate. The patterning may be done by fully isolating the layers or leaving some thin layers between the patterns.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having an upper surface; a plurality of first bit line contacts contacting the upper surface of the substrate and a plurality of second bit line contacts contacting the upper surface of the substrate, wherein the plurality of first bit line contacts and the plurality of second bit line contacts are positioned at different levels along a first direction; an air gap disposed between the first bit line contact and the second bit line contact; a plurality of first bit lines respectively correspondingly positioned on the plurality of first bit line contacts; and a plurality of second bit lines respectively correspondingly positioned on the plurality of first bit line contacts.

Abstract: A wafer holding apparatus for holding a wafer having undulation. The wafer holding apparatus includes a holding portion having a holding surface for holding the wafer, the holding portion being composed of a plurality of piezoelectric elements having suction holes selectively connected to a vacuum source, the piezoelectric elements having front end surfaces collected to form the holding surface. The wafer holding apparatus further includes a frame member supporting the holding portion and a control unit controlling a voltage to be applied to each of the piezoelectric elements according to the undulation of the wafer, whereby the wafer is held on the holding surface in the condition where the undulation of the wafer is followed by undulation produced on the holding surface due to a change in a length of each of the piezoelectric elements.

Abstract: A semiconductor device includes a base substrate, a doped region at an upper surface of the base substrate, and a transistor over the upper surface of the base substrate and formed from a plurality of epitaxially-grown semiconductor layers. The doped region includes one or more ion species, and has a lower boundary above a lower surface of the base substrate. The base substrate may be a silicon substrate, and the transistor may be a GaN HEMT formed from a plurality of heteroepitaxial layers that include aluminum nitride and/or aluminum gallium nitride. The doped region may be a diffusion barrier region and/or an enhanced resistivity region. The ion species may be selected from phosphorus, arsenic, antimony, bismuth, argon, helium, nitrogen, and oxygen. When the ion species includes oxygen, the doped region may include a silicon dioxide layer formed from annealing the doped region after introduction of the oxygen.

Abstract: An electronic component including a thin-film shield layer includes a wiring substrate, surface mount devices mounted to a first principal surface of the wiring substrate, a metal thin-film shield layer, and a magnetic metal thin-film shield layer. The metal thin-film shield layer includes a nonmagnetic metal material and entirely covers the surface mount devices at the top surface side and lateral surface side thereof. The metal thin-film shield layer includes a top surface portion and a lateral surface portion. The magnetic metal thin-film shield layer includes a magnetic metal material and covers the top surface portion and the lateral surface portion of the metal thin-film shield layer, including an entire edge portion at which the top surface portion and the lateral surface portion are joined to each other.

Abstract: A semiconductor structure is provided. The semiconductor structure comprises a substrate, including isolation regions and a device region between adjacent isolation regions; a plurality of fin structures, formed on the device region of the substrate; and an isolation layer, formed on the substrate. A top surface of the isolation layer is lower than top surfaces of the fin structures. A height of each fin structure exposed by the isolation layer is identical.

Abstract: A semiconductor device and a fabrication method are provided. The method includes: providing a base substrate; forming a first gate structure and doped source/drain layers on the base substrate; forming a dielectric layer on a surface of the base substrate; forming a first trench on the doped source/drain layers through the dielectric layer, where the first trench includes a first region and a second region under the first region, and an angle between a sidewall of the first region and the surface of the base substrate is a first angle; forming a first conductive structure in the second region of the first trench; after forming the first conductive structure, forming an insulation layer in the first region of the first trench; forming a recess, exposing the first gate structure, in the dielectric layer using the insulation layer as a mask; and forming a second conductive structure in the recess.

Abstract: Electroluminescent laminar luminaire comprising a laminar substrate (2), at least one flexible electroluminescent lamp (1) printed on the substrate (2), and electric power supply means of the EL lamp (1) housed together inside an encapsulating casing (8). The latter contains at least one hot-melt adhesive (HMA), preferably EVA, and accurately matches the external shape of the EL lamp (1) and the relief, and the electric power supply means that protrude from the substrate (2), covering them fully without leaving any gaps, constituting a closed, flexible, compact and fluid-tight luminaire (100).

Abstract: Methods for forming silicide films are disclosed. Methods of selectively depositing metal-containing films on silicon surfaces which are further processed to form silicide films are disclosed. Specific embodiments of the disclosure relate to the formation of silicide films on FinFET structures without the formation of a metal layer on the dielectric.

Abstract: Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece that includes an inter-level dielectric layer. A first contact that includes a fill material is formed that extends through the inter-level dielectric layer. The inter-level dielectric layer is recessed such that the fill material extends above a top surface of the inter-level dielectric layer. An etch-stop layer is formed on the inter-level dielectric layer such that the fill material of the first contact extends into the etch-stop layer. A second contact is formed extending through the etch-stop layer to couple to the first contact. In some such examples, the second contact physically contacts a top surface and a side surface of the first contact.