Abstract: A sensor element is disclosed.

Abstract: Disclosed is a method of manufacturing a compound semiconductor solar cell including forming a compound semiconductor layer; and forming a defect-removed portion formed of an empty space through removing a portion of the compound semiconductor layer where a defect existed prior to removal. The forming of the defect-removed portion includes forming a mask material layer on the compound semiconductor layer; forming a mask layer through forming an opening at a portion of the mask material layer corresponding to the portion of the compound semiconductor layer where the defect exists; and etching the compound semiconductor layer for removing the portion of the compound semiconductor layer where the defect exists through the opening of the mask layer to form the defect-removed portion.

Abstract: A light emitting device including first, second, and third light emitting parts disposed one over another and each including an n-type semiconductor layer, an active layer, a p-type semiconductor layer, a first adhesion layer disposed between the first and second light emitting parts and including first coupling patterns that are adhesive and conductive, and a second adhesion layer disposed between the second and third light emitting parts and including second coupling patterns that are adhesive and conductive, in which the third light emitting part has a mesa structure exposing a portion of the second coupling patterns of the second adhesion layer.

Abstract: A method for manufacturing a display panel comprising light emitting device including micro LEDs includes providing multiple donor wafers having a surface region and forming an epitaxial material overlying the surface region. The epitaxial material includes an n-type region, an active region comprising at least one light emitting layer overlying the n-type region, and a p-type region overlying the active layer region. The multiple donor wafers are configured to emit different color emissions. The epitaxial material on the multiple donor wafers is patterned to form a plurality of dice, characterized by a first pitch between a pair of dice less than a design width. At least some of the dice are selectively transferred from the multiple donor wafers to a common carrier wafer such that the carrier wafer is configured with different color emitting LEDs. The different color LEDs could comprise red-green-blue LEDs to form a RGB display panel.

Abstract: A method for manufacturing a display panel comprising light emitting device including micro LEDs includes providing multiple donor wafers having a surface region and forming an epitaxial material overlying the surface region. The epitaxial material includes an n-type region, an active region comprising at least one light emitting layer overlying the n-type region, and a p-type region overlying the active layer region. The multiple donor wafers are configured to emit different color emissions. The epitaxial material on the multiple donor wafers is patterned to form a plurality of dice, characterized by a first pitch between a pair of dice less than a design width. At least some of the dice are selectively transferred from the multiple donor wafers to a common carrier wafer such that the carrier wafer is configured with different color emitting LEDs. The different color LEDs could comprise red-green-blue LEDs to form a RGB display panel.

Abstract: According to an embodiment, a semiconductor memory device comprises: a stacked body that includes a plurality of control gate electrodes stacked above a substrate; a memory columnar body that extends in a first direction above the substrate and configures a memory string along with the stacked body; and a source contact that extends in the first direction and is electrically connected to one end of the memory string. Moreover, this source contact is adjacent to the stacked body via a spacer insulating layer. Furthermore, a spacer protective layer including a nitride or a metal oxide is provided between these source contact and spacer insulating layer.

Abstract: A method for manufacturing a display panel comprising light emitting device including micro LEDs includes providing multiple donor wafers having a surface region and forming an epitaxial material overlying the surface region. The epitaxial material includes an n-type region, an active region comprising at least one light emitting layer overlying the n-type region, and a p-type region overlying the active layer region. The multiple donor wafers are configured to emit different color emissions. The epitaxial material on the multiple donor wafers is patterned to form a plurality of dice, characterized by a first pitch between a pair of dice less than a design width. At least some of the dice are selectively transferred from the multiple donor wafers to a common carrier wafer such that the carrier wafer is configured with different color emitting LEDs. The different color LEDs could comprise red-green-blue LEDs to form a RGB display panel.

Abstract: A four-terminal switch, and a switching lattice comprising four-terminal switches. The four-terminal switch operates and is fabricated according to the principles of complementary metal oxide semiconductor (CMOS) technology. The four-terminal switch includes a bulk layer; a single transistor channel located at a surface of the bulk layer; and four diffusion regions positioned around the single transistor channel. The single transistor channel is a single H shaped transistor channel and the four diffusion regions are positioned around the single H shaped transistor channel.

Abstract: A semiconductor package device includes a substrate having an upper surface; an antenna disposed on the upper surface of the substrate; a conductor disposed on the upper surface of the substrate and surrounding the antenna; and a package body covering the conductor and the upper surface of the substrate.

Abstract: Pixel devices and arrays of pixel devices are operable to demodulate modulated light incident on a photo-detection region of the pixel devices. The pixel devices can include floating diffusion implant layers and transfer gates. The floating diffusion implant layers and transfer gates are disposed such that photo-generated charge carriers can be conducted to the floating diffusion implant layers over minimal charge-carrier transport paths.

Abstract: A light-emitting device includes a light-emitting unit, a light-transmitting layer, a wavelength conversion structure, and a reflective layer. The light-emitting unit includes a top surface and a first side surface. The light-transmitting layer covers the top surface and the first side surface of the light-emitting unit. The wavelength conversion structure is located on the light-transmitting layer. The wavelength conversion structure includes a wavelength conversion layer, a first barrier layer located on the wavelength conversion layer, a second barrier layer located under the wavelength conversion layer, and a third barrier layer covering side surfaces of the wavelength conversion layer, the first barrier layer, and the second barrier layer. The reflective layer surrounds the light-transmitting layer and the wavelength conversion structure.

Abstract: Embodiments of the present invention are directed to forming a reliable wrap-around contact (WAC) without using a source/drain sacrificial region. In a non-limiting embodiment of the invention, an isolation structure is formed over a substrate. A source or drain (S/D) region is formed over the substrate and between sidewalls of the isolation structure. A liner is formed over the S/D region and a sacrificial region is formed over the liner. The sacrificial region can be recessed below a surface of the isolation structure and an interlayer dielectric can be formed over the recessed surface of the sacrificial region. The sacrificial region can be replaced with a wrap-around contact.

Abstract: The present disclosure, in some embodiments, relates to a bump structure. The bump structure includes a conductive layer and a solder layer. The solder layer is disposed vertically below and laterally between portions of the conductive layer along a cross-section. The conductive layer is continuous between the portions.

Abstract: Method of preparing a nonaqueous lithium power storage element, by providing a nonaqueous lithium power storage element comprising a positive electrode precursor containing a lithium compound other than an active material, a negative electrode, a separator, a nonaqueous electrolytic solution containing lithium ions, and a casing; and applying a voltage of 4.2V or more to the nonaqueous lithium power storage element to decompose the lithium compound in the positive electrode precursor and pre-dope the negative electrode with the lithium ions, while releasing a gas generated from decomposition of the lithium compound either out of an opening of the casing or through a degassing valve or gas permeable film.

Abstract: The present disclosure provides a packaging assembly and a preparation method thereof, and a display device. The packaging assembly may include at least one of packaging unit; the at least one of packaging unit including a first inorganic layer, a second inorganic layer, and an organic layer sequentially stacked, wherein a material of the first inorganic layer and a material of the second inorganic layer are different. Holes inside the layers may be reduced, and a density of the layers may be increased. An effect of blocking the water vapor may be higher than that of a single layer, and a packaging effect may be better.

Abstract: A method, FET structure and gate cut structure are disclosed. The method forms a gate cut opening in a dummy gate in a gate material layer, the gate cut opening extending into a space separating a semiconductor structures on a substrate under the gate material layer. A source/drain region is formed on the semiconductor structure(s), and a gate cut isolation is formed in the gate cut opening. The gate cut isolation may include an oxide body. During forming of a contact, a mask has a portion covering an upper end of the gate cut isolation to protect it. The gate cut structure includes a gate cut isolation including a nitride liner contacting the end of the first metal gate conductor and the end of the second metal gate conductor, and an oxide body inside the nitride liner.

Abstract: Implementations of methods of singulating a plurality of die included in a substrate may include exposing a substrate material of a substrate in a die street through removing a metal layer in the die street coupled to the substrate, wherein only a portion of the substrate material in the die street is removed, and singulating a plurality of die included in the substrate through plasma etching the exposed substrate material of the substrate in the die street.

Abstract: A flexible multilayer construction (1000) for mounting a plurality of light emitting semiconductor devices (LESDs 100, 110, 120) includes a flexible dielectric substrate (200) comprising top (210) and bottom (220) major surfaces, and pluralities of corresponding electrically conductive top (300, 310, 320, 330) and bottom (500, 510, 520, 530) pads disposed on the top and bottom major surfaces, respectively. An electrically conductive via (400, 410, 420, 430) connects each pair of corresponding top and bottom pads, a side of each top pad partially overlapping a side of the corresponding bottom pad and a side of the substrate, such that in a plan view, each top pad fully overlaps the corresponding bottom pad.

Abstract: Provided is a display device having a flexible substrate including an active region and a wiring region. The active region possesses a plurality of pixels each including a display element. The wiring region has a plurality of terminals, and a plurality of wirings extends from the active region to the plurality of terminals. An insulating film included in the active region and extending from the active region has a sidewall between an edge of the flexible substrate and the wiring adjacent to the edge in the wiring region. The sidewall has a curved portion on a plane in which the plurality of wirings is arranged, and a distance between the edge and the curved portion is curvedly varied.

Abstract: A semiconductor die assembly in accordance with an embodiment of the present technology includes first and second semiconductor dies and a package substrate carrying the first and second semiconductor dies. The second semiconductor die includes a first peripheral portion extending laterally outward beyond a first edge surface of the first semiconductor die. Similarly, the package substrate includes a second peripheral portion extending laterally outward beyond a second edge surface of the second semiconductor die. The semiconductor die assembly further includes a first volume of molded underfill material between the first and second semiconductor dies, a second volume of molded underfill material between the package substrate and the second semiconductor die, a first molded peripheral structure laterally adjacent to the first edge surface of the first semiconductor die, and a second molded peripheral structure laterally adjacent to the second edge surface of the second semiconductor die.