Patents Examined by Stephen E. Jones
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Patent number: 11476091Abstract: In one embodiment, a method of using an impedance matching network to determine a plasma chamber characteristic is disclosed. An impedance matching network is coupled between a radio frequency (RF) source and a plasma chamber. The matching network includes a variable reactance element (VRE) having different positions for providing different reactances. A characteristic of the plasma chamber is determined based on reference values for a parameter of the matching network and a current value. Based thereon, either a visual or audible indication of the determined characteristic of the plasma chamber is provided, or an action is taken to address the determined characteristic.Type: GrantFiled: December 4, 2020Date of Patent: October 18, 2022Inventor: Imran Ahmed Bhutta
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Patent number: 11476555Abstract: Disclosed are electrochemically tunable metamaterials which are capable of complete reversibility such that the metamaterial itself can physically disappear (out of the active region) and reappear later, in a controllable manner. Some variations provide an electrochemically tunable, solid-state metamaterial-based device comprising a plurality of metamaterial unit cells, wherein each of the metamaterial unit cells comprises: an ion conductor containing mobile metal ions; a first electrode in contact with the ion conductor, wherein the first electrode is contained in a metasurface negative space disposed on the ion conductor; a second electrode in contact with the ion conductor, wherein the second electrode is electrically isolated from the first electrode; and a metal-containing region containing one or more metals, wherein the metal-containing region is contained within a metasurface positive space disposed on the ion conductor.Type: GrantFiled: July 27, 2019Date of Patent: October 18, 2022Assignee: HRL Laboratories, LLCInventor: Christopher S. Roper
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Patent number: 11469483Abstract: The present invention provides a compact filter with excellent characteristics. This filter has a plurality of resonators, each of which having: via electrode parts formed inside a dielectric substrate; and a first strip line that faces a first shielding conductor of a plurality of shielding conductors formed so as to surround the via electrode parts, the first strip line being connected to one end of the via electrode parts. The positions of the via electrode parts of the first resonator of the plurality of resonators, and the positions of the via electrode parts of the second resonator, which is adjacent to the first resonator, are mutually offset in a first direction (X), which is the longitudinal direction of the first strip line.Type: GrantFiled: October 1, 2019Date of Patent: October 11, 2022Assignee: Soshin Electric Co., Ltd.Inventor: Keisuke Ogawa
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Patent number: 11462810Abstract: Embodiments of the invention include a mm-wave waveguide connector and methods of forming such devices. In an embodiment the mm-wave waveguide connector may include a plurality of mm-wave launcher portions, and a plurality of ridge based mm-wave filter portions each communicatively coupled to one of the mm-wave launcher portions. In an embodiment, the ridge based mm-wave filter portions each include a plurality of protrusions that define one or more resonant cavities. Additional embodiments may include a multiplexer portion communicatively coupled to the plurality of ridge based mm-wave filter portions and communicative coupled to a mm-wave waveguide bundle. In an embodiment the plurality of protrusions define resonant cavities with openings between 0.5 mm and 2.0 mm, the plurality of protrusions are spaced apart from each other by a spacing between 0.5 mm and 2.0 mm, and wherein the plurality of protrusions have a thickness between 200 ?m and 1,000 ?m.Type: GrantFiled: March 5, 2021Date of Patent: October 4, 2022Assignee: Intel CorporationInventors: Telesphor Kamgaing, Sasha Oster, Georgios Dogiamis, Johanna Swan
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Patent number: 11464103Abstract: A printed circuit board according to various embodiments of the present disclosure can include a first substrate layer, a dielectric layer stacked below the first substrate layer, and a second substrate layer stacked below the dielectric layer. The second substrate layer can include: a power line; a ground part disposed to have an isolated area along the power line; and a ground line which extends from the ground part so as to be disposed in the isolated area, and which separates the isolated area into a first area and a second area so as to generate electromagnetic waves for canceling the electromagnetic waves generated by a current flowing through the power line. Other embodiments are also possible.Type: GrantFiled: July 22, 2019Date of Patent: October 4, 2022Assignee: Samsung Electronics Co., Ltd.Inventor: Jaewoong Jeon
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Patent number: 11456516Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device can include an assembly having asymmetrically situated conductors. In selected examples, the assembly includes a ground plane, a central shield portion, a first side shield portion on a first side, a second side shield portion on a second side, a first conductor asymmetrically situated between the central shield portion and the first side shield portion, a second conductor asymmetrically situated between the central shield portion and the second side shield portion, and dielectric within the assembly.Type: GrantFiled: September 24, 2020Date of Patent: September 27, 2022Assignee: Intel CorporationInventors: Ling Li Ong, Kin Wai Lee, Bok Eng Cheah, Yang Liang Poh, Yean Ling Soon
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Patent number: 11451208Abstract: A first switch is connected in parallel with a circuit element. A second switch is connected in series with a parallel circuit constituted by the circuit element and the first switch. The first switch and the second switch alternately perform on-off operation.Type: GrantFiled: September 9, 2020Date of Patent: September 20, 2022Assignee: Mitsubishi Electric CorporationInventors: Kengo Kawasaki, Masaomi Tsuru, Mitsuhiro Shimozawa
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Patent number: 11450629Abstract: An interposer layer includes an integral waveguide to facilitate high speed (e.g., greater than 80 GHz) communication between semiconductor dies in a semiconductor package. An interposer layer may include a waveguide member and a dielectric layer disposed adjacent at least a portion of an exterior perimeter of the waveguide member. The waveguide member includes a material having a first relative permittivity. The dielectric member includes a material having a second relative permittivity that is less than the first relative permittivity. The waveguide member and the dielectric member form an interposer layer having an upper surface and a lower surface. A first conductive sheet may be disposed proximate the upper surface of the interposer layer and a second conductive sheet may be disposed proximate the lower surface of the interposer layer.Type: GrantFiled: September 29, 2017Date of Patent: September 20, 2022Assignee: Intel CorporationInventors: Kemal Aygun, Zhi Guo Qian, Jian Yong Xie
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Patent number: 11444593Abstract: The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.Type: GrantFiled: February 9, 2021Date of Patent: September 13, 2022Assignee: NXP USA, Inc.Inventors: Keith Manssen, Matthew Russell Greene
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Patent number: 11444594Abstract: A multiplexer includes an antenna terminal, first to third filters with different passbands, and first and second phase circuits that adjust the phase of a passing signal. The first filter is connected to the antenna terminal. The second filter is connected to the antenna terminal with the first phase circuit provided between the second filter and the antenna terminal. The third filter is connected to a connection node between the first phase circuit and the second filter with the second phase circuit provided between the third filter and the connection node. In the second filter, an unwanted wave is generated in the first passband of the first filter. The first phase circuit adjusts the phase to provide an impedance in an open state in the first passband at the antenna terminal. The second phase circuit adjusts the phase to provide the impedance in a short-circuited state in the first passband at the connection node.Type: GrantFiled: December 1, 2020Date of Patent: September 13, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Jin Yokoyama
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Patent number: 11437695Abstract: A surface mountable coupler may include a monolithic base substrate having a first surface, a second surface, a length in an X-direction, and a width in a Y-direction that is perpendicular to the X-direction. A plurality of ports may be formed over the first surface of the monolithic base substrate including a coupling port, an input port, and an output port. The coupler may include a first thin film inductor and a second thin film inductor that is inductively coupled with the first thin film inductor and electrically connected between the input and output ports. A thin film circuit may electrically connect the first thin film inductor with the coupling port. The thin film circuit may include at least one thin film component.Type: GrantFiled: March 6, 2020Date of Patent: September 6, 2022Assignee: KYOCERA AVX Components CorporationInventors: Michael Marek, Elinor O'Neill, Ronit Nissim
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Patent number: 11437691Abstract: A dielectric waveguide filter with a first solid block of dielectric material covered with a layer of conductive material and defining a plurality of resonators. A first RF signal input/output through-hole is defined in a first end resonator of the plurality of resonators of the first block of dielectric material. A second solid block of dielectric material is coupled to the first solid block of dielectric material. The second block of dielectric material is covered with a layer of conductive material and defines a plurality of resonators including first and second adjacent end resonators separated by an RF signal isolator for preventing the transmission of an RF signal between the first and second end resonators.Type: GrantFiled: June 23, 2020Date of Patent: September 6, 2022Assignee: CTS CORPORATIONInventors: Dong Jing, Reddy Vangala
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Patent number: 11437698Abstract: A magnet-less multi-port ring combiner comprises a set of ports extending from the circumference of the magnet-less multi-port ring combiner. The set of ports are positioned at ¼ increments around the circumference of the magnet-less multi-port ring combiner. The set of ports comprise a first input port configured to receive a first input signal and a second input port configured to receive a second input signal, wherein the first input signal is 180° out-of-phase with the second input signal. The N-way magnet-less multi-port combiner comprises more than four ports.Type: GrantFiled: June 5, 2018Date of Patent: September 6, 2022Assignee: L3HARRIS TECHNOLOGIES, INC.Inventors: Kyle David Holzer, Jeffrey Walling
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Patent number: 11437972Abstract: A multicomponent network may be added to a transmission line in a high-frequency circuit to transform a first impedance of a downstream circuit element to second impedance that better matches the impedance of an upstream circuit element. The multicomponent network may be added at a distance more than one-quarter wavelength from the downstream circuit element, and can tighten a frequency response of the impedance-transforming circuit to maintain low Q values and low VSWR values over a broad range of frequencies.Type: GrantFiled: October 30, 2020Date of Patent: September 6, 2022Assignee: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.Inventors: Robert Sadler, David Runton
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Patent number: 11437700Abstract: The present application describes a method of tuning a printed device. The method includes measuring a frequency response of a target device and a device under tune (DUT). The method includes computing, based on the measured frequency response, a coupling matrix for the target device and a coupling matrix for the DUT. The method also includes extracting eigenvalues for the coupling matrix of the target device and a first set of eigenvalues for the coupling matrix of the DUT. The eigenvalues of the target device are different than the first set of eigenvalues of the DUT. The method further includes tuning the DUT with a material removal source. The method even further includes measuring a second set of eigenvalues of the DUT. The second set of eigenvalues is different from the first set of eigenvalues of the DUT. The method yet even further includes calculating a tune path for iterative convergence of the second or a subsequent set of eigenvalues of the DUT with the eigenvalues of the target device.Type: GrantFiled: July 12, 2019Date of Patent: September 6, 2022Assignee: CACI, Inc.—FederalInventors: Ryan David Montoya, Alan Scott Brannon
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Patent number: 11437692Abstract: A coaxial cable is composed of a conductor, an electrical insulating member covering a periphery of the conductor, a shield layer covering a periphery of the electrical insulating member, and a sheath covering a periphery of the shield layer. The shield layer is configured to include a lateral winding shielding portion with a plurality of metal wires being helically wrapped around the periphery of the electrical insulating member, and a batch plating portion made of a hot-dip plating covering respective peripheries of the lateral winding shielding portion. The shield layer includes an outer peripheral portion, in which the metal wires are covered with the batch plating portion, and an inner peripheral portion, in which the metal wires are not covered with the batch plating portion. The outer peripheral portion of the shield layer includes intermetallic compounds between the metal wires and the batch plating portion.Type: GrantFiled: April 21, 2021Date of Patent: September 6, 2022Assignee: HITACHI METALS, LTD.Inventors: Detian Huang, Takanobu Watanabe, Hideki Nonen, Masashi Arai, Hiromitsu Kuroda, Ryohei Okada, Tamotsu Sakurai
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Patent number: 11431067Abstract: A band stop filter can include a circuit board having a first surface and an opposing second surface. The circuit board can have a transmission line on the first surface. The band stop filter can include a dielectric cavity resonator physically coupled to the second surface of the circuit board. The dielectric cavity resonator can have a coupling aperture configured to magnetically couple the dielectric cavity resonator to the transmission line, and to cause excitation of the dielectric cavity resonator in a second order transverse electric (TE) mode.Type: GrantFiled: June 17, 2020Date of Patent: August 30, 2022Assignee: Knowles Cazenovia, Inc.Inventor: Jared Parker Burdick
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Patent number: 11431068Abstract: A frequency variable filter includes variable resonators aligned in a predetermined direction, a coupling part configured to couple the adjacent variable resonators, and a coupling variable dielectric. The variable resonator includes a resonator and a frequency variable dielectric disposed in a movable state relative to the resonator, and is configured to be able to change a resonance frequency according to a position of the frequency variable dielectric with respect to the resonator. This applies to aligned variable resonators other than this variable resonator. The coupling variable dielectric is disposed in a movable state with respect to the coupling part and configured to adjust a coupling coefficient according to an amount of insertion into the coupling part. The coupling variable dielectric is disposed so that a movable surface of the coupling variable dielectric is on the same plane as a movable surface of the frequency variable dielectric.Type: GrantFiled: May 20, 2021Date of Patent: August 30, 2022Assignee: NEC CORPORATIONInventors: Daisuke Iwanaka, Tomoya Kaneko
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Patent number: 11430587Abstract: A high frequency termination for converting a high frequency electrical signal of a circuit into heat. The high frequency termination includes a substrate. The high frequency termination also includes a spiral resistor formed on the substrate and having a first end and a second end. The high frequency termination also includes a conductive pad electrically coupled to the first end of the spiral resistor. The high frequency termination also includes a contact electrically coupled to the conductive pad and configured to connect to the circuit.Type: GrantFiled: January 14, 2020Date of Patent: August 30, 2022Assignee: SMITHS INTERCONNECT AMERICAS, INC.Inventors: Moamer Hasanovic, Michael J. Kettner, Conrad W. Jordan
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Patent number: 11428771Abstract: A load-pull test system uses controller, interface, calibration method and at least one low profile, two-probe, slide screw impedance tuner; the tuner probes share the same slabline; they are inserted anti-diametrical at fixed depth (distance from the center conductor) from both sides into the channel and move only horizontally along the slabline. The tuner does not have adjustable high precision vertical axes controlling the penetration of the probes and its low profile is optimized for on-wafer operations. The carriages holding the probes are moved at high speed along the slabline using linear electric actuators. An efficient de-embedding calibration method serves speeding up additionally the measurement procedure.Type: GrantFiled: April 30, 2020Date of Patent: August 30, 2022Inventor: Christos Tsironis