Abstract: A circuit arrangement and method in one aspect utilize thermal-only through vias, extending between the opposing faces of stacked semiconductor dies, to increase the thermal conductivity of a multi-layer semiconductor stack. The thermal vias are provided in addition to data-carrying through vias, which communicate data signals between circuit layers, and power-carrying through vias, which are coupled to a power distribution network for the circuit layers, such that the thermal conductivity is increased above that which may be provided by the data-carrying and power-carrying through vias in the stack. A circuit arrangement and method in another aspect organize the circuit layers in a multi-layer semiconductor stack based upon current density so as to reduce power distribution losses in the stack.

Abstract: Light emitting LEDs devices comprised of LED chips that emit light at a first wavelength, and a thin film layer over the LED chip that changes the color of the emitted light. For example, a blue LED chip can be used to produce white light. The thin film layer beneficially consists of a florescent material, such as a phosphor, and/or includes tin. The thin film layer is beneficially deposited using chemical vapor deposition.

Abstract: A display panel is disclosed. The display panel includes a data line, a scan line, a first switch connected to a first voltage, a second switch connected to a second voltage, and a pixel.

Abstract: An object of the present invention is to provide a new light emitting element with little initial deterioration, and a display device in which initial deterioration is reduced and variation in deterioration over time is reduced by a new method for driving a display device having the light emitting element. One feature of the invention is that a display device comprising a light emitting element including a first electrode, a second electrode opposed to the first electrode, and a mixed layer of metal oxide and an organic compound provided between the first electrode and the second electrode is subjected to aging drive.

Abstract: A backside-illuminated image sensor is disclosed having improved quantum efficiency (QE) in the near infrared wavelengths (NIR: 750-1100 nm) with minimal optical interference fringes produced by multiple reflected rays within the photosensitive Si region of the sensor, which may be a charge-coupled device, a complementary metal oxide sensor or an electron-multiplication sensor. The invention comprises a fringe suppression layer applied to the backside surface of the photosensitive Si region of a detector (Si substrate) whereby the fringe suppression layer functions in concert with the Si substrate to reduce the occurrence of interference fringes in the NIR while maintaining a high QE over a broad range of wavelengths (300-1100 nm). The combination of a fringe suppression layer applied to a Si substrate provides a new class of back illuminated solid state detectors for imaging.

Abstract: Embodiments of the present invention are directed to a heterocyclic compound and an organic light-emitting device including the heterocyclic compound. The organic light-emitting devices using the heterocyclic compounds have high-efficiency, low driving voltages, high brightness and long lifespans.

Abstract: A low temperature polycrystalline silicon device and techniques to manufacture thereof with excellent performance. Employing doped poly-Si lines which we called a bridged-grain structure (BG), the intrinsic or lightly doped channel is separated into multiple regions. A single gate covering the entire active channel including the doped lines is still used to control the current flow. Using this BG poly-Si as an active layer and making sure the TFT is designed so that the current flows perpendicularly to the parallel lines of grains, grain boundary effects can be reduced.

Abstract: The present invention provides a semiconductor device including a semiconductor substrate having a first conductive type, at least one high-side transistor device and at least one low-side transistor device. The high-side transistor device includes a doped high-side base region having a second conductive type, a doped high-side source region having the first conductive type and a doped drain region having the first conductive type. The doped high-side base region is disposed within the semiconductor substrate, and the doped high-side source region and the doped drain region are disposed within the doped high-side base region. The doped high-side source region is electrically connected to the semiconductor substrate, and the semiconductor substrate is regarded as a drain of the low-side transistor device.

Abstract: Disclosed are embodiments of a field effect transistor (FET) having decreased drive current temperature sensitivity. Specifically, any temperature-dependent carrier mobility change in the FET channel region is simultaneously counteracted by an opposite strain-dependent carrier mobility change to ensure that drive current remains approximately constant or at least within a predetermined range in response to temperature variations. This opposite strain-dependent carrier mobility change is provided by a straining structure that is configured to impart a temperature-dependent amount of a pre-selected strain type on the channel region. Also disclosed are embodiments of an associated method of forming the field effect transistor.

Abstract: A method and structure for fabricating a monolithic integrated CMOS and MEMS device. The method includes providing a first semiconductor substrate having a first surface region and forming one or more CMOS IC devices on a CMOS IC device region overlying the first surface region. The CMOS IC device region can also have a CMOS surface region. A bonding material can be formed overlying the CMOS surface region to form an interface by which a second semiconductor substrate can be joined to the CMOS surface region. The second semiconductor substrate having a second surface region to the CMOS surface region by bonding the second surface region to the bonding material, the second semiconductor substrate comprising one or more first air dielectric regions. One or more free standing MEMS structures can be formed within one or more portions of the processed first substrate.

Abstract: P type semiconductor well regions 8 and 9 for device separation are provided in an upper and lower two layer structure in conformity with the position of a high sensitivity type photodiode PD, and the first P type semiconductor well region 8 at the upper layer is provided in the state of being closer to the pixel side than an end portion of a LOCOS layer 1A, for limiting a dark current generated at the end portion of the LOCOS layer 1A. In addition, the second P type semiconductor well region 9 at the lower layer is formed in a narrow region receding from the photodiode PD, so that the depletion layer of the photodiode PD is prevented from being obstructed, and the depletion is secured in a sufficiently broad region, whereby enhancement of the sensitivity of the photodiode PD can be achieved.

Abstract: A power device with trenched gate structure, includes: a substrate having a first face and a second face opposing to the first face, a body region of a first conductivity type disposed in the substrate, a base region of a second conductivity type disposed in the body region, a cathode region of the first conductivity type disposed in the base region, an anode region of the second conductivity type disposed in the substrate at the second face a trench disposed in the substrate and extending from the first face into the body region, and the cathode region encompassing the trench, wherein the trench has a wavelike sidewall, a gate structure disposed in the trench and an accumulation region disposed in the body region and along the wavelike sidewall. The wavelike sidewall can increase the base current of the bipolar transistor and increase the performance of the IGBT.

Abstract: A semiconductor light emitting device and a fabrication method for the semiconductor light emitting device whose outward luminous efficiency improved are provided and the semiconductor light emitting device includes a substrate; a protective film placed on the substrate; an n-type semiconductor layer which is placed on the substrate pinched by a protective film and on the protective film, and is doped with an n-type impurity; an active layer placed on the n-type semiconductor layer, and a p-type semiconductor layer placed on the active layer and is doped with a p-type impurity.

Abstract: Provided is an epitaxial substrate capable of achieving a semiconductor device that has excellent schottky contact characteristics as well as satisfactory device characteristics. On a base substrate, a channel layer formed of a first group III nitride that contains at least Al and Ga and has a composition of Inx1Aly1Gaz1N (x1+y1+z1=1) is formed. On the channel layer, a barrier layer formed of a second group III nitride that contains at least In and Al and has a composition of Inx2Aly2Gaz2N (x2+y2+z2=1) is formed such that an In composition ratio of a near-surface portion is smaller than an In composition ratio of a portion other than the near-surface portion.

Abstract: A pixel structure including a scan line, a data line intersecting the scan line, a first gate, a second gate, a third gate, a semiconductor layer, a source, a first drain, a second drain, a first pixel electrode, and a second pixel electrode is provided. The dataline and the scan line are interlaced disposed. The semiconductor layer is disposed on the scan line to define the first gate and the second gate. The source is directly connected to the data line and located between the first gate and the second gate. The first gate is located between the first drain and the source. The second gate is located between the second drain and the source. The third gate is electrically connected to the scan line. The first pixel electrode and the second pixel electrode are respectively electrically connected to the first drain and the second drain.

Abstract: Disclosed is a CMOS image sensor, which can minimize a reflectance of light at an interface between a photodiode and an insulating film, thereby enhancing image sensitivity. Such a CMOS image sensor includes a substrate provided with a photodiode consisting of Si, an insulating film consisting of SiO2 and formed on the substrate, a semi-reflection film interposed between the substrate and the insulating film, and metal interconnections, color filters and micro lenses constituting individual unit pixels. The semi-reflection film has a refraction index value between those of the Si photodiode and the SiO2 insulating film.

Abstract: Disclosed are new compounds and an organic light emitting diode using the same. The organic light emitting diode using the new compound according to the present invention exhibits excellent characteristics in terms of actuating voltage, light efficiency, and lifespan.

Abstract: Provided are a driving device for a unit pixel of an organic light emitting display having an improved structure and a method of manufacturing the same.

Abstract: Provided are a vertical nonvolatile memory device and a method for fabricating the vertical nonvolatile memory device. The vertical nonvolatile memory device can be integrated more highly as compared with a nonvolatile memory device of the related art. In addition, since the vertical nonvolatile memory device includes a selective diode, reading errors can be prevented.

Abstract: A semiconductor device has a substrate that includes a cell array region and a dummy pattern region surrounding the cell array region. The cell array region includes a cell structure having a plurality of cell active pillars extending in a vertical direction from the cell array region of the substrate and includes cell gate patterns and cell gate interlayer insulating patterns alternately stacked on the substrate. The cell gate patterns and cell gate interlayer insulating patterns have sides facing the cell active pillars. The dummy pattern region includes a damp-proof structure.