Patents Examined by Terry L. Englund
  • Patent number: 7944286
    Abstract: A filter tuning system for quickly compensating a time constant using a binary search algorithm is disclosed. The filter tuning system includes a time constant detector, a comparator and a calibration unit. The time constant detector detects a time constant of a filter based on an integral value of a reference input signal using an integrator when the time constant of the filter changes according to a variation of a manufacturing process or a temperature. The integrator includes a capacitor changing according to a variation of the time constant of the filter. The comparator compares the detected time constant with a reference value. The calibration unit compensates the time constant of the filter using the binary search algorithm based on the comparison result until an error between the time constant and the reference value is reduced within an acceptable range.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: May 17, 2011
    Assignee: XRONET Corporation
    Inventor: Jung-Hoon Yoo
  • Patent number: 7940115
    Abstract: A fuse circuit for a semiconductor integrated circuit includes a control unit configured to activate a fuse set control signal in response to an external command signal, and a plurality of fuse sets, each configured so that power is supplied to internal fuses in response to the activation of the fuse set control signal.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: May 10, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sun-Mo An, Shin-Ho Chu
  • Patent number: 7940117
    Abstract: A voltage generation circuit includes a high voltage detector (HVD), a clock signal control unit (CSCU), an oscillator, a pumping clock control unit (PCCU), and a charge pump. The HVD compares a high voltage applied to a memory cell array with at least one reference voltage to provide at least one comparison signal. The CSCU provides a clock control signal for changing a frequency of a clock signal in response to the at least one comparison signal. The oscillator generates the clock signal having a frequency according to the clock control signal. The PCCU passes or intercepts the clock signal to provide a pumping clock signal, in response to a control signal. The charge pump consecutively performs charge pumping operations to provide the high voltage while the pumping clock signal is applied to the charge pump.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: May 10, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hong-Soo Jeon
  • Patent number: 7936204
    Abstract: A temperature sensing circuit includes a temperature-dependent voltage generating block configured to generate a plurality temperature-dependent voltages having voltage levels that are changed according to temperature; and a comparing block configured to compare each voltage level of the temperature-dependent voltages with a voltage level of a predetermined voltage to output thermal codes.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: May 3, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jong-Man Im
  • Patent number: 7936207
    Abstract: An internal voltage generating circuit includes an internal voltage generating unit configured to generate an internal voltage that corresponds to a target voltage level by driving an internal voltage terminal with an external power supply voltage, and current sinking unit configured to adjust leakage current introduced to the internal voltage terminal in response to the external power supply voltage.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: May 3, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jae-Hyuk Im
  • Patent number: 7932770
    Abstract: Each of a plurality of pump stages has an input node and an output node and performs a charge pump operation in response to any one of the first and second clock signals. The plurality of pump stages include a first pump stage, in which a charge transfer transistor is connected between the input node and the output node. One end of a pump capacitor is connected to the output node, and the other end is supplied with one of the first and second clock signals corresponding to the first pump stage. A connection switcher connects to the gate of the charge transfer transistor any one of the output node of a pump stage which is supplied with one of the clock signals corresponding to the first pump stage and the input node of a pump stage which is supplied with the other clock signal not corresponding to the first pump stage and which is included in a pump stage row not including the first pump stage.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: April 26, 2011
    Assignee: Panasonic Corporation
    Inventors: Seiji Yamahira, Yasuhiro Tomita
  • Patent number: 7928796
    Abstract: A constant voltage boost power supply according to an aspect of the invention includes a voltage-controlled variable frequency oscillator that produces and supplies a clock signal and changes an oscillating frequency of the supplied clock signal according to an input control voltage; a charge pump into which the clock signal is fed, the charge pump performing a pumping operation in synchronization with the clock signal to boost an input voltage and supply an output voltage in which the input voltage is boosted; a voltage dividing circuit that divides the output voltage of the charge pump to supply a monitor voltage; and a differential amplifier into which the monitor voltage and a reference voltage are fed, the differential amplifier amplifying a potential difference between the monitor voltage and the reference voltage to supply the control voltage.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: April 19, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshimasa Namekawa
  • Patent number: 7920015
    Abstract: In a traditional, fully-isolated bandgap reference circuits, it was difficult to detect currents that are proportional to absolute temperature (PTAT). Here, a PTAT reference in a fully isolated NPN-based bandgap references are disclosed. These circuits in particular are able to make detections using various current without the need for stand-along operational amplifiers.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: April 5, 2011
    Assignee: Texas Instruments Incorporated
    Inventor: Ananthasayanam Chellappa
  • Patent number: 7920019
    Abstract: A microprocessor including a substrate bias rail providing a bias voltage during a first operating mode, a supply node providing a core voltage, a clamp device coupled between the bias rail and the supply node, and control logic. The control logic turns on the clamp device to clamp the bias rail to the supply node during a second operating mode and turns off the clamp device during the first operating mode. The clamp devices may be implemented with P-channel and N-channel devices. Level shift and buffer circuits may be provided to control the clamp devices based on substrate bias voltage levels. The microprocessor may include a substrate with first and second areas each including separate substrate bias rails. The control logic separately turns on and off clamp devices to selectively clamp the substrate bias rails in the first and second areas based on various power modes.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: April 5, 2011
    Assignee: VIA Technologies, Inc.
    Inventors: Raymond A. Bertram, Mark J. Brazell, Vanessa S. Canac, Darius D. Gaskins, James R. Lundberg, Matthew Russell Nixon
  • Patent number: 7911259
    Abstract: A voltage switching circuit selects a voltage from among a plurality of input voltages in response to a selection signal and outputs the selected voltage from an output terminal. The voltage switching circuit includes a first PMOS transistor that outputs a power supply voltage for operating a logic circuit of an output terminal. A second PMOS transistor outputs a first voltage higher than the power supply voltage to the output terminal. A third PMOS transistor outputs a second voltage lower than the power supply voltage to the output terminal. A well potential control section controls well voltages of the first and third transistors to be the power supply voltage where the power supply voltage and the second voltage are output to the output terminal, and controls the well voltages of the first and third transistors to be the first voltage where the first voltage is output to the output terminal.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: March 22, 2011
    Assignee: Seiko Instruments Inc.
    Inventor: Tomohiro Oka
  • Patent number: 7911258
    Abstract: A semiconductor integrated circuit device including a fuse latch circuit including a fuse and a latch circuit for latching fuse data held in the fuse, a fuse counter circuit for counting the number of transfers of the fuse data, and a control circuit including a transmitter circuit for transmitting the fuse data to a memory macro connected to the control circuit, and a detour data path circuit which when the fuse data is not transferred, does not transfer the fuse data to the memory macro, and forms a detour data path for detouring the fuse data in the detour data path circuit itself.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: March 22, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Atsushi Suzuki
  • Patent number: 7911249
    Abstract: A combinational circuit is connected to a flip-flop circuit. A clock buffer supplies a clock to the flip-flop circuit. A control circuit controls a delay time of the flip-flop circuit and a delay time of the combinational circuit independently.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: March 22, 2011
    Assignee: Panasonic Corporation
    Inventor: Toru Wada
  • Patent number: 7902903
    Abstract: A circuit for electric fuses includes circuits for sensing status and programming that have separate paths for each operation. The circuit includes a plurality of electrically programmable fuses and, associated with each fuse, a switch for coupling a first terminal of the fuse to a ground supply for programming or to a comparator for sensing. The circuit uses a switched current source to supply current to the fuses for programming. The comparator senses a fuse status when a current source is switched through the fuse. The comparator compares a voltage across the fuse and associated switches to a comparison voltage across a comparison resistor and switches included for matching.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: March 8, 2011
    Assignee: Raytheon Company
    Inventors: Nick Rosik, Richard D Young, Mark E Stading, Denpol Thammanukultorn
  • Patent number: 7893755
    Abstract: An internal voltage generation circuit includes a signal generation unit which generates first and second level signals and first and second control signals from a reference voltage generated by voltage-dividing an internal power and generates first and second driving signals by comparing levels of the internal power and the reference voltage, a driving control unit which receives the first and second level signals and drives the internal voltage in response to an active signal, and a driving unit which receives the first and second driving signals and drives the internal voltage.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: February 22, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jae Hoon Kim
  • Patent number: 7888988
    Abstract: A fuse circuit includes a first power supply line, a second power supply line, a first current source connected between the first power supply line and an output terminal, a second current source connected between the second power supply line and the output terminal, the second current source having higher current supply capacity or current draw-out capacity than the first current source, and a fuse connected in series with the second current source between the second power supply line and the output terminal.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: February 15, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Kenji Mori, Masayuki Takori
  • Patent number: 7888987
    Abstract: A temperature compensation circuit according to an embodiment includes a bias circuit configured to output a bias current, the bias current having a current value increasing in proportion to absolute temperature, in a low temperature region in which a temperature is lower than a predetermined temperature, and having another current value increasing at a faster rate than the current value increasing in proportion to absolute temperature, in a high temperature region in which the temperature is equal to or greater than the predetermined temperature, and a transistor having a collector connected to a power supply terminal, an emitter which is grounded, and a base supplied with the bias current.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: February 15, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koji Horie
  • Patent number: 7880534
    Abstract: A reference circuit for providing a precision voltage and a precision current includes a bandgap voltage reference circuit, a positive temperature coefficient calibrating circuit, a threshold voltage superposing circuit and precision current generator interconnected in cascade. From the bandgap voltage reference circuit, a bandgap voltage is outputted as the precision voltage, and a PTAT current is outputted to the positive temperature coefficient calibrating circuit along with the bandgap voltage for generating a PTAT voltage. In response to the PTAT voltage from the positive temperature coefficient calibrating circuit, the threshold voltage superposing circuit generates a first voltage which is equal to the PTAT voltage plus a threshold voltage. Then the precision current generator outputs a reference current as the precision current in response to the first voltage.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: February 1, 2011
    Assignee: Faraday Technology Corp.
    Inventors: Din-Jiun Huang, Kuan-Yu Chen, Yuan-Hsun Chang
  • Patent number: 7876148
    Abstract: A low pass filter includes a driver unit configured to output a voltage proportional to an input pulse width, a charge/discharge unit configured to charge the output voltage of the driver unit, a comparator unit configured to compare an output voltage of the charge/discharge unit with a reference value to output a square wave signal, and a switching unit configured to switch the charge/discharge unit to an operation state, based on a bandwidth expansion signal.
    Type: Grant
    Filed: December 28, 2008
    Date of Patent: January 25, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Taek-Sang Song, Kyung-Hoon Kim, Dae-Han Kwon, Dae-Kun Yoon
  • Patent number: 7863969
    Abstract: A device includes an N-channel transistor for output, a voltage raising circuit, a voltage dropping circuit, and an amplifier. A power supply voltage that is a first voltage is supplied to one end of the output N-channel transistor, and the other end of the output N-channel transistor functions as an output terminal. The voltage raising circuit raises the first voltage to generate a second voltage higher than the first voltage. The voltage dropping circuit reduces the second voltage to generate a third voltage that is higher than the first voltage and is lower than the second voltage. The amplifier amplifies the difference between a reference voltage and a voltage generated at the output terminal, using the third voltage as a power supply voltage, to generate a fourth voltage, and supplies the fourth voltage to the gate of the N-channel transistor for output.
    Type: Grant
    Filed: May 5, 2009
    Date of Patent: January 4, 2011
    Assignee: Elpida Memory, Inc.
    Inventors: Ryohei Furuya, Yoji Idei
  • Patent number: 7863967
    Abstract: A multistage circuit for regulating the charge voltage or the discharge current of a capacitance of an integrated device at a certain charge-pump generated boosted voltage is implemented without integrating high voltage transistor structures having a type of conductivity corresponding to the same sign of the boosted voltage (high-side transistors). The multistage circuit current includes at least a first stage, and an output stage in cascade to the first stage and coupled to the capacitance. The first stage is supplied at an unboosted power supply voltage of the integrated device, and the output stage is supplied at an unregulated charge-pump generated boosted voltage. The first stage includes a transistor having a type of conductivity corresponding to an opposite sign of the boosted voltage and of the power supply voltage. The drain of the output stage transistor is coupled to the boosted voltage either through a resistive pull-up or a voltage limiter.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: January 4, 2011
    Inventors: Luca Crippa, Miriam Sangalli, Giancarlo Ragone, Rino Micheloni