Patents Examined by Terry L. Englund
  • Patent number: 8145160
    Abstract: A Tx module includes a plurality of power amplification units, a plurality of matching circuit units configured as transformers having input ports connected to output ports of the plurality of power amplification units, respectively, and a plurality of harmonic filter units having input ports connected to output ports of the plurality of matching circuit units, respectively. At least one of the matching circuit units includes a plurality of primary windings connected to output ports of corresponding power amplifiers of the power amplification units and a secondary winding inductively coupled in common to the plurality of primary windings.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: March 27, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ki Joong Kim, Shinichi Iizuka, Hyo Keun Bae, Sang Hee Kim, Joong Jin Nam, Youn Suk Kim
  • Patent number: 8138823
    Abstract: A voltage generating circuit generates a voltage for driving an ultrasonic oscillator, and includes a multi-stage connected power supply circuit without a transformer.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: March 20, 2012
    Assignee: GE Medical Systems Global Technology Company, LLC
    Inventors: Xinping Zang, Shinichi Amemiya
  • Patent number: 8126409
    Abstract: A polar transmitter includes a power amplifier (PA), an amplitude modulation (AM) path including an AM path adjustable delay, an AM path delay measurement circuit, a phase modulation (PM) path including a PM path adjustable delay, and a PM path delay measurement circuit. The AM path delay measurement circuit is configured to measure an AM path delay using waveform correlation, e.g., using peak magnitude events (PMEs) in signals transmitted along the AM path to a power supply port of the PA. The PM path delay measurement circuit is configured to measure a PM path delay using waveform correlation, e.g., using PMEs in signals transmitted along the PM path to a phase-modulated input of the PA. The measured AM and PM path delays are used to adjust the AM and PM path adjustable delays, to reduce the delay mismatch between signals appearing at the power supply and phase-modulated input ports of the polar transmitter's PA.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: February 28, 2012
    Assignee: Panasonic Corporation
    Inventors: Saleh Osman, Earl W. McCune, Jr.
  • Patent number: 8125266
    Abstract: A boosting circuit includes a charge pump circuit; and a power supply circuit configured to supply a power supply voltage to the charge pump circuit. The power supply circuit includes an N-channel transistor connected with a power supply terminal of the charge pump circuit; and a current control circuit configured to control current flowing between the N-channel transistor and the charge pump circuit through the power supply terminal.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: February 28, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Akiko Furuya, Yasuhiro Tonda
  • Patent number: 8126417
    Abstract: A data processing device for processing signals received via a wireless link. The data processing device including a first beam steering and/or forming antenna arranged on the data processing device that receives data via the wireless link, a second beam steering and/or forming antenna arranged on the data processing device perpendicular to the first beam steering and/or forming antenna, the second beam steering and/or forming antenna receiving data via the wireless link. The data processing device also includes a processor that processes signals received by the first and second beam steering and/or forming antennas.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: February 28, 2012
    Assignee: Sony Corporation
    Inventor: Shin Saito
  • Patent number: 8120413
    Abstract: A charge pump circuit includes a switch unit adapted to transmit charges from the input of the charge pump to the output of the charge pump; a transmission unit adapted to control turn-on or cut-off of an MOS transistor in the switch unit; and a charging unit in one-to-one correspondence with a PMOS transistor in the switch unit and adapted to store charges to boost the transmission voltage. A first NMOS transistor and at least two PMOS transistor are used as the switch unit during transmission of the charges, so that normal work can be enabled with high transmission efficiency in the case of a low source voltage.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: February 21, 2012
    Assignee: Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Ming Li, Qingyang Wu, Liwu Yang, Yangyuan Wang
  • Patent number: 8120411
    Abstract: A charge pump circuit is provided that has a controllable ramp rate. The charge pump circuit may receive a control signal from a control circuit. The control signal may be asserted by the control circuit to turn on the charge pump circuit. When the charge pump circuit is turned on, the charge pump circuit produces an output voltage. The output voltage ramps up from an initial value to a desired target value. During the ramp up process, a ramp rate regulation circuit monitors the output voltage and ensures that the ramp rate does not exceed a desired maximum value. A capacitor may be charged at a desired ramp rate to use as a time-varying reference voltage. A feedback circuit may be used to maintain the output voltage at the desired target value once the ramp-up process is complete.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: February 21, 2012
    Assignee: Altera Corporation
    Inventors: Ping-Chen Liu, Thien Le
  • Patent number: 8106705
    Abstract: The electronic circuit comprises a functional module (10), a condition signaling module (20), a reference module (30) and a control circuit (40). The condition signaling module (20) generates an indication signal (Imeas) indicative for PVT conditions local to the functional module. The PVT conditions comprise a set of conditions relevant for a module comprising at least one of a voltage supplied to said module, a temperature within an area occupied by said module and the process conditions relevant for said area The reference module (30) generates a reference signal (Iref) having a value that is substantially independent of said PVT-conditions. The control circuit (40) compares the indication signal (Imeas) and the reference signal (Iref), and for generating a control signal (pvt<1>, . . . , pvt<n>) for the functional module.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: January 31, 2012
    Assignee: Synopsys, Inc.
    Inventor: Andy C. Negoi
  • Patent number: 8103217
    Abstract: An apparatus and a method of performing radio communication are provided. The radio communication apparatus may determine a channel capacity of a radio channel based on a sensing duration to sense the radio channel and a false alarm probability, determine a sensing duration value and a false alarm probability value that maximize the channel capacity, and sense the radio channel based on the determined sensing duration value and the false alarm probability value.
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: January 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae Soo Kwon, Hee Jung Yu, Kyung Hun Jang, Young Chul Sung, Hyo Sun Hwang, Yong Hoon Lee, Young Seok Oh
  • Patent number: 8102201
    Abstract: A reference circuit configured to provide a reference value. The circuit includes a first circuit unit which is configured to provide a first electrical representation that varies linearly with temperature and has a crossover point where its polarity relative to zero changes from a negative value to a positive value. A second circuit unit is configured to provide a second electrical representation that varies linearly with temperature. The first and second circuit units are operable for facilitating combining the first and second electrical representations such that the combination has a value corresponding to the value of the second electrical representation at a reference temperature.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: January 24, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Stefan Marinca
  • Patent number: 8095102
    Abstract: In one implementation an output signal of an oscillator is varied to be within a desired frequency band with respect to a reference signal, the output signal having a plurality of phases. The implementation may include comparing the output signal with the reference signal, counting falling edges about each phase of the number of phases in a predetermined time period and summing to define a count output; comparing the count output with a product of the number of phases of the output signal and the factor to define a comparison, generating a control signal based upon the comparison, and inputting the control signal to the oscillator to alter the output signal thereof.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: January 10, 2012
    Assignee: Infineon Technologies AG
    Inventors: Chin Yeong Koh, Kar Ming Yong
  • Patent number: 8093937
    Abstract: A clock synchronization system and method avoids output clock jitter at high frequencies and also achieves a smooth phase transition at a boundary of coarse and fine delays. The system may use a single coarse delay line configured to generate two intermediate clocks from an input reference clock and having a fixed phase difference therebetween. The coarse delay line may have a hierarchical or a non-hierarchical structure. A phase mixer receives these two intermediate clocks and generates a final output clock having a phase between phases of the intermediate clocks. The coarse shifting in the delay line at high clock frequencies does not affect the phase relationship between the intermediate clocks fed into the phase mixer. The output clock from the phase mixer is time synchronized with the input reference clock and does not exhibit any jitter or noise even at high clock frequency inputs.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: January 10, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Jongtae Kwak, Kang Yong Kim
  • Patent number: 8085079
    Abstract: According to one embodiment of the invention, a summing circuit comprises a first transmitter, a second transmitter, a first current offset circuit and a first transconductance amplifier. The first current offset circuit is coupled to the emitters of the first and second transistors. The first transconductance amplifier is coupled to the first current offset circuit.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: December 27, 2011
    Assignee: Menara Networks
    Inventors: Kelvin Tran, Matthias Bussmann, Lloyd Linder, Salam Elahmadi, Harry Tan
  • Patent number: 8081025
    Abstract: A biasing device can supply a bias voltage to bias-able element by coupling a bias circuit to the bias-able element, coupling a state adjusting device to the biasing circuit, configuring the state adjusting device to 1) increase an initial biasing voltage by a first amount when an intermediate voltage threshold exceeds a voltage drop across the bias-able element and 2) increment the increased initial bias voltage by a second amount, where the second amount is a fraction of the first amount, until the voltage drop across the bias-able element substantially equals a predetermined bias voltage. The bias circuit of the biasing device can include a variable resistance, which is controlled by the state adjusting device and configured to vary the biasing voltage, in series with the bias-able element.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: December 20, 2011
    Assignee: Marvell International Ltd.
    Inventor: Kan Li
  • Patent number: 8078119
    Abstract: A front end circuit for coupling an antenna to a first radio frequency (RF) transceiver and a second RF transceiver is contemplated. The RF transceivers have a signal input, a signal output, a receive enable line and a transmit enable line. In addition to an antenna port, the front end circuit has a first power amplifier and a first low noise amplifier both coupled to first RF transceiver, and a second power amplifier and a second low noise amplifier both coupled to the second RF transceiver. The front end circuit includes a matching network that couples the power amplifiers and the low noise amplifiers, the various outputs and inputs thereof being common.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: December 13, 2011
    Assignee: RFAXIS, Inc.
    Inventor: Oleksandr Gorbachov
  • Patent number: 8073400
    Abstract: A front end circuit for coupling an antenna to a first radio frequency (RF) transceiver and a second RF transceiver is contemplated. The RF transceivers have a signal input, a signal output, a receive enable line and a transmit enable line. In addition to an antenna port, the front end circuit has a first power amplifier and a first low noise amplifier both coupled to first RF transceiver, and a second power amplifier and a second low noise amplifier both coupled to the second RF transceiver. The front end circuit includes a matching network that couples the power amplifiers and the low noise amplifiers, the various outputs and inputs thereof being common.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: December 6, 2011
    Assignee: Rfaxis, Inc.
    Inventor: Oleksandr Gorbachov
  • Patent number: 8073401
    Abstract: A front end circuit for coupling an antenna to a first radio frequency (RF) transceiver and a second RF transceiver is contemplated. The RF transceivers have a signal input, a signal output, a receive enable line and a transmit enable line. In addition to an antenna port, the front end circuit has a first power amplifier and a first low noise amplifier both coupled to first RF transceiver, and a second power amplifier and a second low noise amplifier both coupled to the second RF transceiver. The front end circuit includes a matching network that couples the power amplifiers and the low noise amplifiers, the various outputs and inputs thereof being common.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: December 6, 2011
    Assignee: RFaxis, Inc.
    Inventor: Oleksandr Gorbachov
  • Patent number: 8067978
    Abstract: A pump system that can dynamically increase its current capability includes: a pump circuit, for producing an output voltage; an oscillator, for driving the pump circuit to pump at a particular frequency according to a pump enable signal; a limiter, coupled to both the oscillator and the output voltage fed back from the pump circuit, for generating the pump enable signal to the oscillator according to the output voltage feedback signal; and an edge timer, coupled to both the oscillator and the pump enable signal, for driving the oscillator to operate at an increased frequency according to a threshold parameter of the pump enable signal.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: November 29, 2011
    Assignee: Nanya Technology Corp.
    Inventor: Ryan Andrew Jurasek
  • Patent number: 8054120
    Abstract: An integrated circuit, comprises a wakeup terminal; a supply voltage terminal configured to receive a supply voltage; and a power control circuit. The power control circuit comprises an enable circuit coupled to the wakeup terminal and configured to generate a voltage monitoring enable signal as a response to a wakeup signal received at the wakeup terminal, and a voltage monitoring circuit for generating a supply voltage level indication signal. The voltage monitoring circuit is coupled to the supply voltage terminal and comprises an operation switch controlled by the voltage monitoring enable signal. The voltage monitoring circuit is configured to determine if the supply voltage is above a threshold voltage and set the supply voltage level indication signal accordingly. The integrated circuit further comprises processing circuitry, with the supply voltage level indication signal controlling the switching between a normal operation state and a standby state of the processing circuitry.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: November 8, 2011
    Assignee: STMicroelectronics Design & Application GmbH
    Inventors: Manfred Huber, Peter Heinrich
  • Patent number: 8049556
    Abstract: A mobile telephone is provided that includes a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The mobile telephone also includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: November 1, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama