Abstract: Solar cell arrangement of a thin film solar cell array on a substrate; each solar cell being layered with a bottom electrode, a photovoltaic active layer, a top electrode and an insulating layer. A first trench and a second trench parallel to the first trench at a first side, separate a first solar cell and an adjacent second solar cell. The first and second trenches are filled with insulating material. The first trench extends to the substrate. The second trench extends into the photovoltaic active layer below the top electrode. A third trench extending to the bottom electrode is between the first and second trench. A fourth trench extending to the top electrode is at a second side of the first trench. The third and fourth trench are filled with conductive material. A conductive bridge connects the third trench and the fourth trench across the first trench.

Abstract: A sump system includes a flow restrictor for a drain line into a sump pit. The flow restrictor limits the water discharge capacity through the drain line into the sump pit. The flow restrictor is preferably sized and arranged to restrict the total maximum flow capacity of the drain line into the sump pit to match the maximum capacity output flow rate of the sump pump.

Abstract: A display device including a substrate including a first display region having a first width, a second display region having a second width smaller than the first width, a peripheral region at a periphery of the first and second display regions, and a dummy region in the peripheral region, a first pixel in the first display region, a second pixel in the second display region, a first control line connected to the first pixel and extending in the first display region, a second control line connected to the second pixel and extending in the second display region, and a dummy line connected to the second control line in the dummy region, wherein the second control line is at a first conductive layer on a first insulating layer, the dummy line is at a second conductive layer on a second insulating layer on the first conductive layer.

Abstract: Various embodiments determine a remaining battery capacity of a battery in an energy storage battery support system. In one embodiment, a battery is operated at a state of charge which may include being charged, being discharged, and being idle. A change in the state of charge is detected after a duration of time. The amount of remaining battery capacity is calculated based upon the duration of time and the state of charge of the battery during the duration of time. The operating, detecting and calculating are repeated until the amount of remaining battery capacity reaches a predetermined value. The remaining battery capacity after the duration of time is calculated using the battery capacity at the beginning of the duration of time. The battery may be used as an energy source in an electric power distribution grid. The battery is replaced when the remaining battery capacity reaches an end-of-useful-life value.

Abstract: A method includes oxidizing a semiconductor fin to form an oxide layer on opposite sidewalls of the semiconductor fin. The semiconductor fin is over a top surface of an isolation region. After the oxidizing, a tilt implantation is performed to implant an impurity into the semiconductor fin. The oxide layer is removed after the tilt implantation.

Abstract: A method for manufacturing the OLED includes: forming an anode, a cathode layer and an intermediate layer; forming a patterned first organic material layer on the cathode layer; forming a patterned second organic material layer on the first organic material layer using a material different from that of the first organic material layer, wherein a projection of the first organic material layer in a direction perpendicular to a major plane of the OLED overlaps with a projection of the second organic material layer in the direction; and forming an auxiliary electrode on the cathode layer, wherein a projection of the auxiliary electrode in the direction perpendicular to the major plane of the OLED does not overlap with the projections of the first organic material layer and the second organic material layer in the direction.

Abstract: A gallium nitride (GaN) transistor which includes two or more insulator semiconductor interface regions (insulators). A first insulator disposed between the gate and drain (near the gate) minimizes the gate leakage and fields near the gate that cause high gate-drain charge (Qgd). A second insulator (or multiple insulators), disposed between the first insulator and the drain, minimizes electric fields at the drain contact and provides a high density of charge in the channel for low on-resistance.

Abstract: After forming a gate structure over a semiconductor fin that extends upwards from a semiconductor substrate portion, a sigma cavity is formed within the semiconductor fin on each side of the gate structure. A semiconductor buffer region composed of an un-doped stress-generating semiconductor material is epitaxially growing from faceted surfaces of the sigma cavity. Finally, a doped semiconductor region composed of a doped stress-generating semiconductor material is formed on the semiconductor buffer region to completely fill the sigma cavity. The doped semiconductor region is formed to have substantially vertical sidewalls for formation of a uniform source/drain junction profile.

Abstract: A semiconductor device having a fast recovery diode (FRD) is provided. The semiconductor device includes a substrate, a first well region disposed in the substrate, a base region disposed in the first well region, a first impurity region of a first conductivity type disposed in the base region, a second impurity region of a second conductivity type disposed in the first well region and separated from the base region, a first electrode electrically connected to the base region and the first impurity region, and a second electrode electrically connected to the second impurity region.

Abstract: A device includes a metal pad at a surface of an image sensor chip, wherein the image sensor chip includes an image sensor. A stud bump is disposed over, and electrically connected to, the metal pad. The stud bump includes a bump region, and a tail region connected to the bump region. The tail region includes a metal wire portion substantially perpendicular to a top surface of the metal pad. The tail region is short enough to support itself against gravity.

Abstract: The disclosure is directed to an integrated circuit structure and methods of forming the same. The integrated circuit structure may include: a set of fins within an ILD layer on a substrate; a first gate dielectric over the substrate and extending along opposing sidewalls of each fin in the set of fins, a metal stack adjacent to the first gate dielectric and on the opposing sidewalls of each fin, the metal stack having a first portion over the substrate and a second portion contacting the first gate dielectric and extending along the opposing sidewalls of each fin, wherein at least the first portion of the metal stack and a portion of the first gate dielectric above the substrate is replaced by another dielectric material; a set of epitaxial regions within the ILD layer; and a conductor within the ILD layer and extending over each epitaxial region.

Abstract: A device for controlling an air conditioner has a remote controller which receives an alternating current voltage from a secondary side of a first transformer, a full-wave rectifier connected to a secondary side of a second transformer, and a processor which receives a current rectified by the full-wave rectifier. One of output nodes of the full-wave rectifier is connected to one terminal of the secondary side of the first transformer. The remote controller has a switch connected to the secondary side of the first transformer, and transmits information that indicates a state of the switch to the processor as the amplitude of an AC voltage on a signal line connecting the remote controller and the processor together.

Abstract: A method for presenting both content based video signals and secondary video signals over a multi-layer touch screen display using a multiple display manager system is disclosed. First and second display managers are configured to receive primary content video signals from a controller and secondary video signals from a secondary video source. The first display manager is in communication with a front layer of the touch screen display and the second display manager is in communication with a back layer of the touch screen display. The screen may be split between multiple signals, or one or more signals may overlay one or more background signals. The overlaid signals may completely obscure the background signals, or they may provide a level of transparency. A touch router device interprets touches at a touch screen shared display to transform coordinates to enable interpretation of the player's touch inputs.

Abstract: According to an aspect of the present invention, there is provided a nonvolatile semiconductor storage device including: a semiconductor substrate; a source region and a drain region that are formed in the semiconductor substrate so as to be separated from each other and so as to define a channel region therebetween; a tunnel insulating film that is formed on the channel region; an insulative charge storage film that is formed on the tunnel insulating film; a conductive charge storage film that is formed on the insulative charge storage film so as to be shorter than the insulative charge storage film in a channel direction; an interlayer insulating film that is formed on the conductive charge storage film; and a gate electrode that is formed on the interlayer insulating film.

Abstract: A structure for arresting the propagation of cracks during the dicing of a semiconductor wafer into individual chips includes a monolithic metallic plate that traverses multiple dielectric layers peripheral to an active region of a chip. One or more metallic plates may be formed using lithography and electroplating techniques between the active device region and a peripheral kerf region, where each metallic plate includes a concave feature that faces the kerf region of the wafer.

Abstract: An integrated circuit apparatus includes a substrate, an IC chip disposed above the substrate, and an electromagnetic shielding layer disposed on a surface of the substrate. The IC chip includes an electromagnetic coupling device. The electromagnetic shielding layer and the electromagnetic coupling device partially overlap in a vertical projection direction of the surface of the substrate.

Abstract: A multilayer semiconductor device structure having different circuit functions on different semiconductor device layers is provided. The semiconductor structure comprises a first semiconductor device layer fabricated on a bulk substrate. The first semiconductor device layer comprises a first semiconductor device for performing a first circuit function. The first semiconductor device layer includes a patterned top surface of different materials. The semiconductor structure further comprises a second semiconductor device layer fabricated on a semiconductor-on-insulator (“SOI”) substrate. The second semiconductor device layer comprises a second semiconductor device for performing a second circuit function. The second circuit function is different from the first circuit function. A bonding surface coupled between the patterned top surface of the first semiconductor device layer and a bottom surface of the SOT substrate is included.

Abstract: Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, a method for producing an integrated circuit includes forming a memory cell with a memory cell upper surface. A capping layer is formed overlying the memory cell, and a portion of the capping layer is removed to expose the memory cell upper surface. A memory cell etch stop is formed overlying the memory cell upper surface after the portion of the capping layer is removed to expose the memory cell upper surface. The memory cell etch stop is removed from overlying the memory cell upper surface, and an interconnect is formed in electrical communication with the memory cell.

Abstract: According to one embodiment, a method of manufacturing an electronic device, includes preparing a first substrate including a first basement and a first conductive layer, and a second substrate includes a second basement and a second conductive layer, opposing the first conductive layer and spaced from the first conductive layer, providing a protection layer on the second substrate, forming a first hole penetrating the second substrate by irradiating the second substrate with a laser beam in a position overlapping the protection layer, removing the protection layer and forming a connecting material electrically connecting the first conductive layer and the second conductive layer to each other via the first hole after removing the protection layer.

Abstract: A numerical control device of the present invention includes a control unit that controls a machining tool including a main axis having a screw-hole inspection gauge attached thereto in such a way that a feed-axis motor and a main-axis motor for the main axis perform operations for screw-hole inspection based on a machining program and a determining unit that determines acceptance/defect of inspection of a screw hole machined on a workpiece based on a condition of the feed-axis motor or the main-axis motor during control by the control unit.