Patents Examined by Thomas L Dickey
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Patent number: 10417391Abstract: System, method, and computer program product to select a desired portion of a subject to receive a radiation dose, including: determining a plurality of Pareto points on a Pareto surface (PS); selecting a first reference point (p1) on a back side of an assumed Pareto surface (PS?) and first direction (q1) emerging therefrom towards PS? from behind; selecting a first starting adjustment (x10) and iteratively developing forward a minimum criterion in steps until a final adjustment (x11) is reached that still is implementable in the radiation apparatus; stopping the forward development, thereby determining x11 represented by a final front point (y11) as a real Pareto point of PS?; and along q1, dismissing undetermined portions of the objective space in front of and behind y11 as not containing parts of the PS, and continuing with other remaining more determined portions that are assumed to each contain a part of PS?.Type: GrantFiled: September 9, 2016Date of Patent: September 17, 2019Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.Inventor: Katrin Teichert
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Patent number: 10408896Abstract: A monolithic reusable microwire assembly can include a substrate and an electrically conductive thin-film wire formed on the substrate. The conductive thin-film wire can include a narrow segment forming an active area. A thermally and electrically insulating barrier can be formed on the electrically conductive thin-film wire. A roughness-reducing layer can be formed on the thermally and electrically insulating barrier and can have minimal surface roughness.Type: GrantFiled: March 13, 2018Date of Patent: September 10, 2019Assignee: University of Utah Research FoundationInventors: Shirin Jamali, Christoph Boehme
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Patent number: 10410722Abstract: A semiconductor device includes: a first memory section, a first peripheral circuit section, and a second peripheral circuit section that are disposed on a substrate; and a second memory section and a wiring section that are stacked on the second peripheral circuit section, wherein the first memory section includes a plurality of first memory cells, each of the first memory cells including a cell transistor and a capacitor connected to the cell transistor, the second memory section includes a plurality of second memory cells, each of the second memory cells including a variable resistance element and a select element coupled in series to each other, and the wiring section includes a plurality of line patterns, wherein the line patterns and the second memory cells are higher than the capacitor with respect to the substrate.Type: GrantFiled: May 23, 2018Date of Patent: September 10, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sungwoo Kim, Bong-Soo Kim, Youngbae Kim, Kijae Hur, Gwanhyeob Koh, Hyeongsun Hong, Yoosang Hwang
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Patent number: 10410978Abstract: A semiconductor wafer and a method for forming a semiconductor. The semiconductor wafer includes: a first semiconductor component having a first device; a second semiconductor component having a second device; an insulation layer laterally extending to the first semiconductor component and the second semiconductor component; and a grind layer configured on or adjacent to a backside of the semiconductor wafer. Therefore, chipping or cracking can be decreased or avoided when the grind layer is exposed during the thinning process (such as backside grinding).Type: GrantFiled: January 24, 2018Date of Patent: September 10, 2019Assignee: Sanken Electric Co., Ltd.Inventors: Hiroshi Shikauchi, Tomonori Hotate, Yuki Tanaka, Shinji Kudoh
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Patent number: 10411068Abstract: Disclosed herein are electrical contacts for magnetoresistive random access memory (MRAM) devices and related memory structures, devices, and methods. For example, and electrical contact for an MRAM device may include: a tantalum region; a barrier region formed of a first material; and a passivation region formed of a second material and disposed between the tantalum region and the barrier region, wherein the second material includes tantalum nitride and is different from the first material.Type: GrantFiled: November 23, 2015Date of Patent: September 10, 2019Assignee: Intel CorporationInventors: Christopher J. Wiegand, Oleg Golonzka, Kaan Oguz, Kevin P. O'Brien, Tofizur Rahman, Brian S. Doyle, Tahir Ghani, Mark L. Doczy
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Patent number: 10401844Abstract: A structure allows more efficient simulation using preliminary obtained image data for a target such as a workpiece. A simulator includes a creating unit that virtually creates a simulation target system in a three-dimensional virtual space, a measurement unit that performs image measurement of preliminary obtained image data using a visual sensor and outputs a measurement result, a reception unit that receives a setting of an imaging area defined for the visual sensor in a manner associated with the created system, a calculation unit that calculates a transform parameter based on a relative positional relationship between the created system and the set imaging area, and an execution unit that receives an input of a result obtained by transforming the measurement result generated by the measurement unit using the transform parameter, and executes a control operation in accordance with a control program associated with the system.Type: GrantFiled: November 3, 2016Date of Patent: September 3, 2019Assignee: OMRON CorporationInventors: Yasunori Sakaguchi, Haruna Shimakawa, Katsushige Ohnuki, Yuichi Doi
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Patent number: 10399891Abstract: The present disclosure provides a wavelength conversion glass, a method for manufacturing the wavelength conversion glass, and a light emitting device including the wavelength conversion glass. The wavelength conversion glass includes a TeO2—B2O3—ZnO—BaO-based transparent glass containing tellurium dioxide (TeO2), boric oxide (B2O3), zinc oxide (ZnO), and barium oxide (BaO); and phosphor micro-particles dispersed in the transparent glass.Type: GrantFiled: January 5, 2017Date of Patent: September 3, 2019Assignee: Pukyong National University Industry-University Cooperation FoundationInventors: Hyun Kyoung Yang, Jung Sik Joo
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Patent number: 10403710Abstract: A 3D-capacitor structure that is based on a trench network etched from a top face of a substrate to form an array of separated pillars. The 3D-capacitor structure includes a double capacitor layer stack that extends continuously on top faces of the pillars at the substrate top face, on trench sidewalls and also on a trench bottom. The trench network is modified locally for contacting a second electrode of the double capacitor layer stack while ensuring that no unwanted short-circuit may occur between the second electrode and a third electrode of the double capacitor layer stack. The 3D-capacitor structure provides an improved trade-off between high capacitor density and certainty of no unwanted short-circuit.Type: GrantFiled: October 2, 2018Date of Patent: September 3, 2019Assignee: Murata Integrated Passive SolutionsInventors: Frédéric Voiron, Jean-René Tenailleau
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Patent number: 10397235Abstract: Systems and methods are presented for receiving, at a server computer associated with an industrial asset cloud computing system, a command representing an event, from a mobile device of a plurality of mobile devices, the command comprising instructions for changing a data object in a data domain, determining, a command processor responsible for processing the command, and routing the command to the command processor responsible for processing the command, wherein the command processor accesses the data domain associated with the command to change the data object in the data domain according to the instructions of the command. Systems and methods are further presented for detecting, by the server computer, a state change in the data domain indicating that the data object has been changed, and preparing the changed data object to be consumed by mobile devices operated by users authorized to access the data object.Type: GrantFiled: December 7, 2016Date of Patent: August 27, 2019Assignee: General Electric CompanyInventors: Michael Hart, Milton Waid, Andy Johns, Jeremy Osterhoudt
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Patent number: 10395922Abstract: A semiconductor device including a gate structure present on at least two suspended channel structures, and a composite spacer present on sidewalls of the gate structure. The composite spacer may include a cladding spacer present along a cap portion of the gate structure, and an inner spacer along the channel portion of the gate structure between adjacent channel semiconductor layers of the suspended channel structures. The inner spacer may include a crescent shape with a substantially central seam.Type: GrantFiled: December 5, 2017Date of Patent: August 27, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce B. Doris, Michael A. Guillorn, Isaac Lauer, Xin Miao
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Patent number: 10388709Abstract: A pixel defining layer and a production method thereof, a display panel and a production method thereof, and a display apparatus are all provided. The pixel defining layer has a first lyophilic layer, a first lyophobic layer on the first lyophilic layer, a second lyophilic layer on the first lyophobic layer, and a second lyophobic layer on the second lyophilic layer.Type: GrantFiled: May 23, 2018Date of Patent: August 20, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Wenbin Jia, HuiFeng Wang, Xiang Wan, Changjun Jiang, Li Sun
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Patent number: 10388692Abstract: A display panel and a manufacturing method thereof and a display device are provided. The display panel includes a semiconductor base substrate, a display array and a thermal imagination array. The display array is formed on the semiconductor base substrate, and includes a plurality of display pixels arranged in an array, and each of the display pixels includes at least one display sub-pixel, and each display sub-pixel includes a light-emitting component. The thermal imagination array is formed on the semiconductor base substrate and includes a plurality of thermal imagination pixels, and each of the thermal imagination pixels includes at least one thermal imagination sub-pixel, and display sub-pixels and thermal imagination sub-pixels are arranged in a blending way.Type: GrantFiled: June 21, 2017Date of Patent: August 20, 2019Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Xiaochuan Chen, Shengji Yang, Can Zhang
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Patent number: 10381446Abstract: A memory cell and a non-volatile semiconductor memory device are disclosed. Nitride sidewall layers are respectively disposed in a first sidewall spacer and a second sidewall spacer, to separate a memory gate electrode and a first select gate electrode from each other and the memory gate electrode and a second select gate electrode from each other. Hence, a breakdown voltage is improved around the memory gate electrode as compared with a conventional case in which the first sidewall spacer and the second sidewall spacer are simply made of insulating oxide films. The nitride sidewall layers are disposed farther from a memory well than a charge storage layer. Hence, charge is unlikely to be injected into the nitride sidewall layers at charge injection from the memory well into the charge storage layer, thereby preventing an operation failure due to charge storage in a region other than the charge storage layer.Type: GrantFiled: May 27, 2016Date of Patent: August 13, 2019Assignee: FLOADIA CORPORATIONInventors: Yasuhiro Taniguchi, Fukuo Owada, Yasuhiko Kawashima, Shinji Yoshida, Kosuke Okuyama
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Patent number: 10380952Abstract: A light emitting assembly is described. In one embodiment, one or more light emitting diode (LED) devices and one or more microcontrollers are bonded to a same side of a substrate, with the one or more microcontrollers to switch and drive the one or more LED devices.Type: GrantFiled: February 28, 2018Date of Patent: August 13, 2019Assignee: Apple Inc.Inventors: Kapil V. Sakariya, Andreas Bibl, Kelly McGroddy
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Patent number: 10381464Abstract: This disclosure relates to the technical field of semiconductors, and discloses a method for manufacturing semiconductor FinFET devices. The method particularly includes pre-removal of a predetermined thickness of a first region of an isolation region on sides of a fin that is not covered by a pseudo gate such that when a layer of second region of the isolation region covered by the pseudo gate is sacrificially removed during a removal of the pseudo gate, the upper surfaces of the remaining first region and the remaining second region of the isolation region are approximately leveled. By using such a method, DC and AC performances of a resulting FinFET device is improved.Type: GrantFiled: May 8, 2018Date of Patent: August 13, 2019Assignees: SEMICONDUCTOR MANUFACTURING INTL. (SHANGHAI) Corp., SEMICONDUCTOR MANUFACTURING INTL. (Beijing) Corp.Inventor: Xinyun Xie
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Patent number: 10373914Abstract: The present disclosure provides methods for fabricating multi-layered electronic architectures in silicon and/or germanium. In particular the disclosure provides an advanced marker design and a methodology for aligning devices on multiple layers of a multi-layered electronic architecture. The disclosure also provides a process for growing a semiconductor material with high quality surfaces.Type: GrantFiled: June 12, 2017Date of Patent: August 6, 2019Assignee: NewSouth Innovations Pty LimitedInventors: Joris Gerhard Keizer, Matthias Koch, Michelle Yvonne Simmons
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Patent number: 10372104Abstract: Techniques to facilitate protection of control system content used in an industrial automation environment are disclosed herein. In at least one implementation, the control system content for use in the industrial automation environment is received, wherein the control system content comprises controller program code that directs an industrial controller to drive a machine system. Content protection instructions for the control system content are also received, wherein the content protection instructions comprise restrictions on execution of the control system content. An execution license that includes process-related constraints for the control system content is generated based on the content protection instructions. The execution license is applied to the control system content to generate protected content, wherein use of the control system content is granted subject to the process-related constraints of the execution license.Type: GrantFiled: February 24, 2016Date of Patent: August 6, 2019Assignee: Rockwell Automation Technologies, Inc.Inventors: Clark Case, Taryl Jasper, Michael Bush
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Patent number: 10366976Abstract: A semiconductor switch SW that includes a collector electrode C, an emitter electrode E and a gate electrode G, a Zener diode 5A configured to include one end electrically connected to the collector electrode C, the other end electrically connected to the gate electrode G, and n-type semiconductor layers and p-type semiconductor layers alternately arranged adjacent to each other, a Zener diode 5B configured to include one end electrically connected to the gate electrode G, the other end electrically connected to the emitter electrode E, and n-type semiconductor layers and p-type semiconductor layers alternately arranged adjacent to each other, are provided. The Zener diode 5A and the Zener diode 5B are configured so as not to allow the voltage of the gate electrode G to be increased to an on-threshold voltage of the semiconductor switch SW in the reverse bias application state.Type: GrantFiled: December 22, 2016Date of Patent: July 30, 2019Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.Inventors: Ryohei Kotani, Toshiki Matsubara, Nobutaka Ishizuka, Masato Mikawa, Hiroshi Oshino
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Patent number: 10356990Abstract: A water conservation apparatus is connectable to a legacy irrigation controller to provide access to the irrigation controller to enable a remote user to selectively disable watering irrespective of the watering schedule programmed in the irrigation controller. The apparatus is connectable to the rain sensor of irrigation controllers having rain sensor connections. In irrigation controllers not having rain sensor connections, the apparatus is connectable to the common line of the valve control lines to selectively interrupt current to the valves. The apparatus is connectable to a Wi-Fi router to enable communications to a cloud-based server such that the apparatus is able to receive control signals from the server to selectively disable watering based on current and predicted weather conditions.Type: GrantFiled: November 30, 2016Date of Patent: July 23, 2019Assignee: Sprinkl.IO LLCInventors: Noel Lee Geren, Daniel Morgan Pruessner
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Patent number: 10354958Abstract: A method and apparatus are provided for manufacturing a packaged electronic device (3) having pre-formed and placed through package circuit devices (35) which include an embedded circuit component (39) and conductor terminals (37A, 37B) extending from a molded package (38) embedding the circuit component (39). The through package circuit devices (35) are placed on end with integrated circuit die (34) and encapsulated in a molded device package (32) which leaves exposed the one or more conductor terminals (37A, 37B) positioned on first and second surfaces of the through package circuit device, where the conductor terminals (37A, 37B) and embedded circuit component (39) form a circuit path through the molded device package.Type: GrantFiled: October 1, 2014Date of Patent: July 16, 2019Assignee: NXP USA, INC.Inventor: Michael B. Vincent