Patents Examined by Thomas L Dickey
  • Patent number: 10347792
    Abstract: An optoelectronic component is disclosed. In an embodiment the component includes a semiconductor layer sequence with a first layer, a second layer and an active layer arranged between the first and second layer, wherein the active layer directly borders the first and second layer, a radiation surface directly bordering the second layer, one or more contact isles for electrically contacting the first layer and one or more through-connections for electrically contacting of the second layer, wherein the through-connections are formed through the first layer and the active layer and open into the second layer, wherein the contact isles are located laterally next to one another directly on a rear side of the first layer facing away from the radiation surface, wherein the through-connections are arranged in regions between the contact isles in a top view of the rear side.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: July 9, 2019
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Philipp Kreuter, Tansen Varghese, Wolfgang Schmid, Markus Bröll
  • Patent number: 10336000
    Abstract: A method of operating a Continuous Liquid Interface Printing (CLIP) printer can include receiving a set of objectives for fabrication of an object using a CLIP printer and determining an orientation for fabrication of the object based on fulfillment of the set of objectives by simulated fabrication of the object.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: July 2, 2019
    Assignee: Carbon, Inc.
    Inventors: Roy Goldman, Craig B. Carlson, Abhishek Parmar
  • Patent number: 10340312
    Abstract: A re-writeable non-volatile memory device including a re-writeable non-volatile two-terminal memory element (ME) having tantalum. The ME including a first terminal, a second terminal, a first layer of a conductive metal oxide (CMO), and a second layer in direct contact with the first layer. The second layer and the first layer being operative to store at least one-bit of data as a plurality of resistive states, and the first and second layer are electrically in series with each other and with the first and second terminals.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: July 2, 2019
    Assignee: Hefei Reliance Memory Limited
    Inventors: Christophe J. Chevallier, Steve Kuo-Ren Hsia, Wayne Kinney, Steven Longcor, Darrell Rinerson, John Sanchez, Philip F. S. Swab, Edmond R. Ward
  • Patent number: 10333104
    Abstract: A substrate includes a plurality of OLED, each having a conductor layer. A coating is formed over the OLEDs, the coating comprises a first inorganic layer formed over the OLED structures and at least partially over each of the contact layers, a buffer layer over the first inorganic layer, a second inorganic layer over the buffer layer, wherein the buffer layer comprises a first inorganic interface layer in contact with the first inorganic layer, a second inorganic interface layer in contact with the second inorganic layer, and an organic layer sandwiched between the first and second inorganic interface layers.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: June 25, 2019
    Assignee: ORBOTECH LT SOLAR, LLC.
    Inventors: Kam S. Law, Craig L. Stevens, Masato Toshima
  • Patent number: 10332747
    Abstract: In an exemplary method, a dielectric layer is deposited on a substrate. A masking layer is formed over a first region and a second region of the dielectric layer. The masking layer is made of an oxide of lanthanum. The masking layer is removed from the second region of the dielectric layer. A work function layer is formed directly on only the second region of the dielectric layer. The work function layer is made of titanium nitride that is formed by using a combination of titanium tetrachloride and ammonia (TiCl4/NH3).
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: June 25, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Koji Watanabe, Meng Zhu, Brian A. Cohen, Matthew T. Whitman, Balaji Kannan
  • Patent number: 10332708
    Abstract: A system and method provide seamless control switchover through an input coupled to a power line and a safety apparatus that actuates if the input remains de-energized for a first time interval. Each of a plurality of subsystems has a control unit that controls a power source to energize the power line and is capable of transitioning between master and slave states. A first switch or second and third switches in series couple the power source to the power line. The first switch is closed during master state operation. The second switch is closed during slave operation and the third switch is open if any subsystem control unit is in master state. The system is configured to open or close the first switch, the second switch, or the third switch responsive to a transition of a control unit to or from master state within the first time interval.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: June 25, 2019
    Assignee: THALES CANADA INC
    Inventors: Abe Kanner, Mihai Lungu, Janice Zhao
  • Patent number: 10333105
    Abstract: An OLED packaging method and an OLED package structure are disclosed. The OLED packaging method combines a dam packaging technology and a thin film encapsulation technology. A dam is used to coffer an organic layer and limit a size thereof to ensure that each organic layer is completely covered an inorganic layer disposed thereon to improve a packaging effect. One mask can be used to produce multiple inorganic layers so an amount of masks is decreased to save costs. The OLED packaging structure combines a dam packaging structure and a thin film encapsulation structure. A dam is used to coffer an organic layer and limit a size thereof to ensure that each organic layer is completely covered an inorganic layer disposed thereon to improve a packaging effect. One mask can be used to produce multiple inorganic layers so an amount of masks is decreased to save costs.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: June 25, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Wenjie Li, Jiajia Qian
  • Patent number: 10325815
    Abstract: A method of forming multiple vertical transport fin field effect transistors (VT FinFETs) having different channel lengths, including, forming a vertical fin on a first region of a substrate and a vertical fin on a second region of the substrate, forming a cover block on the vertical fin on the second region of the substrate, forming a first bottom source/drain on the first region of the substrate, wherein the first bottom source/drain covers a lower portion of the vertical fin on the first region, removing the cover block, and forming a second bottom source/drain in the second region of the substrate, wherein the second bottom source/drain is below the surface of the substrate, wherein the second bottom source/drain does not cover a lower portion of the vertical fin on the second region.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: June 18, 2019
    Assignee: International Business Machines Corporation
    Inventors: Ruqiang Bao, Choonghyun Lee, Shogo Mochizuki, Chun W. Yeung
  • Patent number: 10317863
    Abstract: A building management system includes a database and a controller. The database stores data points, and the controller receives a selection of a control group defining a process variable. The controller further identifies a plurality of components of the building management system that operate to affect the process variable, and identifies a temporal order in which the identified components affect the process variable. The controller obtains data points associated with each of the identified components, and generates a graphical user interface that displays the obtained data points arranged in the temporal order.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: June 11, 2019
    Assignee: Johnson Controls Technology Company
    Inventor: Dimitrios S. Papadopoulos
  • Patent number: 10319777
    Abstract: A pixel circuit includes a floating diffusion layer of a first conductivity-type between a drain/source of a second conductivity-type and a source/drain of the second conductivity-type. The source/drain and the drain/source touch the floating diffusion layer. A cathode of a photoelectric converter is electrically connected to the floating diffusion layer. An anode of the photoelectric converter touches the cathode. The cathode is of the first conductivity-type and the anode is of the second conductivity-type.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: June 11, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Yorito Sakano
  • Patent number: 10312308
    Abstract: A light emitting device includes: a base substrate; banks extending in a direction along a surface of the base substrate; and light emitting elements extending along the direction in groove regions defined by the banks. Each light emitting element includes one or more functional layers between a pair of electrodes. Within at least one of the groove regions: a sub-bank extends along the one direction and has a height equal to or smaller than a height of the banks; for each of the one or more functional layers in the groove regions, portions of each of the one or more functional layers on each side of the sub-bank are made of a same material; and a thickness of the one or more functional layers is smaller than a height of the sub-bank.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: June 4, 2019
    Assignee: JOLED, INC.
    Inventor: Masakazu Takata
  • Patent number: 10312477
    Abstract: A light emitting structure includes a first hole injection layer, a first organic light emitting layer, a charge generation layer, a second hole injection layer, a second organic light emitting layer, an electron transfer layer, and a blocking member. The light emitting structure has first, second, and third sub-pixel regions. The first organic light emitting layer may be on the first hole injection layer. The charge generation layer may be on the first organic light emitting layer. The second hole injection layer may be on the charge generation layer. The second organic light emitting layer may be on the second hole injection layer. The electron transfer layer may be on the second organic light emitting layer. The blocking member may be at at least one of the first to the third sub-pixel regions.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: June 4, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung-Soo Lee, Ok-Keun Song, Se-Il Kim
  • Patent number: 10304966
    Abstract: The present invention provides a metal oxide TFT device and a manufacturing method thereof. An active layer (7) of the metal oxide TFT device applies a structure like sandwich, which comprises a lower indium gallium zinc oxide thin film (71), an upper indium gallium oxide thin film (73) disposed opposite to the lower indium gallium zinc oxide thin film (71), and an intermediate conducting layer (75) interposed between the lower indium gallium oxide thin film (71) and the upper indium gallium oxide thin film (73). The intermediate conducting layer (75) is selected from the group consisting of high indium-containing metal oxide and high zinc-containing metal oxide, which is capable of further improving electron mobility, reducing interface defects between an active layer (7) and a gate insulating layer (5), and improving the electrical properties of a TFT device.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: May 28, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Yuhao Zhai
  • Patent number: 10304854
    Abstract: A three dimensional semiconductor device, comprising: a substrate including a plurality of circuits; a plurality of pads, each pad coupled to a circuit; and a memory array positioned above or below the substrate and coupled to a circuit to program the memory array.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: May 28, 2019
    Assignee: CALLAHAN CELLULAR L.L.C.
    Inventor: Raminda Udaya Madurawe
  • Patent number: 10305039
    Abstract: A material property testing device and a manufacturing method are disclosed. The device includes: a substrate; a metal gate electrode; an auxiliary layer disposed on the metal gate electrode, and the metal gate electrode is located between the substrate and the auxiliary layer; a function layer disposed on the substrate. In the formation process of the function layer, an organic photoresist is attached on the auxiliary layer for a period of time, and the function layer is used for cooperating with a light-emitting device to test the property of the material. A film of the organic photoresist being disposed is even such that after exposing and developing, the function layer having an ideal pattern is obtained so as to ensure the testing effect of the material property testing device.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: May 28, 2019
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Songshan Li
  • Patent number: 10304959
    Abstract: The present invention discloses an array substrate, a display device, and a method of manufacturing the same. Wherein, the array substrate comprises a substrate; a source electrode layer formed on the substrate; a support layer formed on the source electrode layer; a drain electrode layer formed on the support layer; a barrier layer covering the drain electrode layer; an active layer formed on the barrier layer; the barrier layer isolating the support layer and the active layer. By the above-mentioned structure, the fluorine atoms in the support layer can be prevented from entering the active layer, thereby improving the reliability of the array substrate.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: May 28, 2019
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd
    Inventor: Longqiang Shi
  • Patent number: 10304866
    Abstract: The present invention provides an FFS type TFT array substrate and a manufacturing method thereof. The manufacturing method for an FFS type TFT array substrate of the present invention comprises that a gate electrode, a scanning line, a common electrode, and a common electrode line are formed in one photomask process. Comparing with the conventional art, the present invention simplifies the manufacturing process, with fewer photomasks, and a shorter processing time, therefore, the production cost is low. The fabrication process of the FFS type TFT array substrate of the present invention is simple, has low production cost and excellent electrical performance.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: May 28, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Zhichao Zhou, Hui Xia, Meng Chen
  • Patent number: 10304754
    Abstract: A heat dissipation structure of a semiconductor device is provided, the semiconductor device including: an electrical bonding surface electrically connected to a substrate; and a heat dissipation surface as an opposite side of the electrical bonding surface. The heat dissipation surface makes contact with a heat spreader via a conductive TIM while the heat spreader makes contact with a heat sink via an insulating TIM. A surface of the heat spreader facing the semiconductor device includes a recess part formed in at least one part in a vicinity of an outer periphery of the semiconductor device.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: May 28, 2019
    Assignee: OMRON Corporation
    Inventors: Takeo Nishikawa, Takayoshi Tawaragi, Eiichi Omura
  • Patent number: 10304901
    Abstract: The present invention discloses a micro light-emitting diode display device comprising a substrate, micro light-emitting diodes arrayed on an upper surface of a substrate for emitting blue light, a yellow phosphor layer disposed on a light-emitting side of the micro light-emitting diodes, and a color filter layer disposed on a light-emitting side of the yellow phosphor layer. The color filter layer comprises a red filter area, a green filter area, and a light-transmitting area. The yellow phosphor layer is provided with light-transmitting holes opened to its surface at intervals, and the light-transmitting holes are directly opposite to the light-transmitting area. The present invention further provides a method of manufacturing a micro light emitting diode display device. A color display purpose is achieved, which reduces the times of transferring the light-emitting diodes, simplifies the manufacturing process, and reduces technical difficulty for transferring micro LED.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: May 28, 2019
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Haile Xu, Shunjie Shen, Jiangjiang Song, Fenli Zhao
  • Patent number: 10285784
    Abstract: Method for determining a patient's open-position occlusal plane comprising: obtaining a global model of the patient's jaw including a model of the mandible and maxilla in articulation; determining a natural occlusal plane of the patient from a global model of the patient's jaw in a centric occlusion position; determining a necessary opening to enable the advancement of the patient's mandible; determining a mandibular virtual plane from the global model of the patient's jaw in an open position based on the necessary opening determined; and determining the open-position occlusal plane from the mandibular virtual plane, the natural occlusal plane and the global model of the jaw in the open position based on the necessary opening determined. A method of designing a mandibular advancement device for a patient based on the open-position occlusal plane is also described as well as the resulting mandibular advancement device.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: May 14, 2019
    Assignee: Panthera Dental Inc.
    Inventor: Jean Robichaud