Patents Examined by Tuan Dinh
  • Patent number: 6950316
    Abstract: An electronic device includes a main body, a slidable cover member disposed movably on the main body, and a magnetic member is sandwiched between the main body and the cover member to enable the user to move the cover member relative to the main body by a finger while gripping the main body in the palm of the user's hand.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: September 27, 2005
    Assignee: Benq Corporation
    Inventors: Long-Jyh Pan, Yung-Tsun Hsieh
  • Patent number: 6950314
    Abstract: An arrangement including an optoelectronic component having terminal contacts, an electrical component having first electrical contacts and second electrical contacts, a printed circuit board, to which the second electrical contacts of the electrical component are connected, and a flexible conductor arrangement of a planar form having several conductor tracks. The conductor arrangement provides an electrical connection between the terminal contacts of the optoelectronic component and the first electrical contacts of the electrical component. The conductor arrangement has a first region with first contact regions and a second region with second contact regions. The optoelectronic component is mounted directly on the first region and its terminal contacts are connected to the first contact regions, and/or the electrical component is mounted directly on the second region and its first electrical contacts are connected to the second contact regions.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: September 27, 2005
    Assignee: Infineon Technologies AG
    Inventors: Daniel Reznik, Volker Plickert, Lutz Melchior
  • Patent number: 6950315
    Abstract: In a high-frequency module mounting structure according to the present invention, a circuit board includes a reinforcing electrode on the lower surface thereof for increasing a mounting strength of the first and second electrode groups in a state of being in close proximity, a motherboard includes a reinforcing lands corresponding to the reinforcing electrodes in a state of being in close proximity to the lands, and the electrodes and the lands, and the reinforcing electrodes and the reinforcing lands are soldered. Therefore, soldering of the high-frequency module with respect to the motherboard is enhanced, and thus a reliable high-frequency module mounting structure is provided.
    Type: Grant
    Filed: May 19, 2003
    Date of Patent: September 27, 2005
    Assignee: Alps Electric Co., Ltd.
    Inventors: Masanobu Ujiie, Atsushi Murata, Daijo Shibata, Kiminori Terashima
  • Patent number: 6947292
    Abstract: A primary functional circuit board with the capability to verify the chip function by an alternative manner and a simplified design for reducing the fabrication cost includes circuit board, chip, verifying apparatus, and extending connection terminals distributed on periphery of the chip. The chip is disposed on the circuit board to execute a functional instruction of the primary functional circuit board. The extending connection terminals are the extension of connection pins of the chip. The verifying apparatus is implemented with a programmable chip having a firmware program needed for controlling the circuit under control. After the verifying apparatus is connected to the extending connection terminals, the switching device is used to select the chip or the programmable chip to control the circuit under control. The engineer can easily compare the difference between the two without a power interruption.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: September 20, 2005
    Assignee: Via Technologies Inc.
    Inventors: I-Ming Lin, Kuei-Chang Huang
  • Patent number: 6947293
    Abstract: A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: September 20, 2005
    Assignee: Incep Technologies
    Inventors: Joseph Ted DiBene, II, David H. Hartke
  • Patent number: 6944032
    Abstract: An interconnect for use with a pixel layer of a pixel web is provided, the interconnect including an interconnect substrate having a plurality of conductive leads and a plurality of contact vias formed on and extending from the interconnect substrate. The contact vias are formed in a predetermined pattern on the interconnect substrate and are in electrical communication with the conductive leads. The interconnect includes a patterned spacer of a thickness substantially equal to a height of the contact vias. The patterned spacer includes a plurality of through-holes also formed according to the predetermined pattern and having a dimension substantially equal to a dimension of the contact vias. The interconnect substrate and the patterned spacer are capable of being assembled onto the pixel layer, with the patterned spacer being in a middle position and the contact vias extending through the through-holes to contact corresponding cathode portions on the pixel layer.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: September 13, 2005
    Assignee: Rockwell Collins
    Inventors: Martin J. Steffensmeier, John K. Hagge
  • Patent number: 6944030
    Abstract: A substrate has an electrical wiring pattern formed thereon, one or a plurality of electrical parts provided thereon, a first contacting part and a second contacting part provided thereon and electrically connected to the electronic parts, and one or a plurality of electrical connecting bodies. The electrical connecting bodies are different from the electrical wiring pattern, and electrically connect the first contacting part and the second contacting part.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: September 13, 2005
    Assignee: Fujitsu Limited
    Inventor: Hiroshige Nakayabu
  • Patent number: 6940729
    Abstract: The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The invention provides techniques and structures for aggregating chip scale-packaged integrated circuits (CSPs) or leaded packages with other CSPs or with monolithic or stacked leaded packages into modules that conserve PWB or other board surface area. The present invention can be used to advantage with CSP or leaded packages of a variety of sizes and configurations ranging from larger packaged base elements having many dozens of contacts to smaller packages such as, for example, die-sized packages such as DSBGA. In a preferred embodiment devised in accordance with the present invention, a base element IC and a support element IC are aggregated through a flex circuit having at least two conductive layers that are patterned to selectively connect the two IC elements.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: September 6, 2005
    Assignee: Staktek Group L.P.
    Inventors: James W. Cady, James Wilder, David L. Roper, Russell Rapport, James Douglas Wehrly, Jr., Jeffrey Alan Buchle
  • Patent number: 6940730
    Abstract: A chassis and associated telecommunication circuit card are disclosed. The chassis has heat dissipation and flame containment features while accommodating a high density of the circuitry cards. Embodiments include an inner housing with a double-layer middle floor dividing the chassis into top and bottom chambers. Each layer has partially aligned slots, and an air gap is provided between the two layers. Embodiments also include a double-layer mesh cover with an air gap existing between the two mesh layers. Projections and grooves are provided on the inner surfaces of the inner housing to receive circuit cards having a guide on one edge and a fin on another. The circuit card includes conductor structures such as multiple board layers with paired and segregated conductors. The circuit card also includes some components positioned to cooperate with the ventilation features of the chassis and includes some components chosen for low-power consumption or reduced flammability.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: September 6, 2005
    Assignee: ADC Telecommunications, Inc.
    Inventors: Robin Berg, Jr., Todd Husom, Derek Sayres
  • Patent number: 6940728
    Abstract: A mother board retaining bracket is mounted to an outer circuit board housing and supports an edge of a mother board. The mother board retaining bracket prevents the mother board from moving, e.g., during transportation, and prevents the associated failure of the computer system. The computer system further includes single and double locker belt retaining brackets. The single locker belt retaining bracket extends across a retaining clip on one side of a circuit board and locks the retaining clip in place. The double locker belt retaining bracket extends across retaining clips on both sides of a circuit board and locks the retaining clips in place. In this manner, the single and double locker belt retaining brackets prevent the retaining clips from becoming shook loose.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: September 6, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Peter Cuong Dac Ta
  • Patent number: 6940022
    Abstract: An electronic device includes a surface and a conductive termination on the surface. A protective conformal coating on the surface of the electronic device includes a window formed in the protective coating to expose a portion of the conductive termination. The exposed portion of the conductive termination is recessed in the conformal coating.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: September 6, 2005
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Jeffrey A. Curhan
  • Patent number: 6936771
    Abstract: Disclosed is a termination that connects high temperature superconducting (HTS) cable immersed in pressurized liquid nitrogen to high voltage and neutral (shield) external bushings at ambient temperature and pressure. The termination consists of a splice between the HTS power (inner) and shield (outer) conductors and concentric copper pipes which are the conductors in the termination. There is also a transition from the dielectric tape insulator used in the HTS cable to the insulators used between and around the copper pipe conductors in the termination. At the warm end of the termination the copper pipes are connected via copper braided straps to the conventional warm external bushings which have low thermal stresses. This termination allows for a natural temperature gradient in the copper pipe conductors inside the termination which enables the controlled flashing of the pressurized liquid coolant (nitrogen) to the gaseous state.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: August 30, 2005
    Assignee: Southwire Company
    Inventors: Uday K. Sinha, Jerry Tolbert
  • Patent number: 6937478
    Abstract: A low profile circuit device for the LCD module comprises a printed circuit board and an electronic device. The printed circuit board has a through hole and a plurality of pads surrounding the through hole. The electronic device is disposed within the through hole and has a plurality of leads electrically connected to and mounted on the plurality of pads of the printed circuit board.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: August 30, 2005
    Assignee: Hannstar Display Corp.
    Inventors: Chi Tien Lee, Jiunn Yau Huang
  • Patent number: 6934160
    Abstract: A printed circuit board arrangement with a flexible layer arrangement of at least one electrically conductive layer with a large number of conductor tracks lying next to one another and surrounded by electrically isolating layers has at least one printed circuit board firmly connected to a portion of the flexible layer arrangement and accommodating a component. To form a connection between the component and the conductor tracks of the flexible layer, an opening through the printed circuit board to the conductor tracks is provided, which opening may be stepped, so that different conductor tracks and different layers can be reached.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: August 23, 2005
    Assignee: Siemens Aktiengesellschaft
    Inventors: Björn Heismann, Quirin Spreiter, Helmut Winkelmann
  • Patent number: 6933448
    Abstract: A printed circuit board having a permanent solder mask includes a substrate made of a glassfiber reinforced epoxy resin material. The top and bottom surfaces of the substrate are disposed thereon a conductive pattern respectively. An epoxy resin solder mask is coated on each surface of the substrate in such a way that the conductive pattern is divided into a sheltered portion covered by the solder mask and an unsheltered portion exposed outside. The solder mask also has an even and smooth outer surface with a micro-roughness ranging between 0.5 ?m˜10 ?m and an optimum thickness ranging between 2 ?m˜200 ?m.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: August 23, 2005
    Assignee: S & S Technology Corporation
    Inventors: Chong-Ren Maa, Wan-Kuo Chih, Ming-Sung Tsai
  • Patent number: 6930890
    Abstract: The present invention provides a network device with multiple modules or printed circuit boards where certain of the modules are reverse orientated with respect to the other modules. Reverse orientating certain modules better utilizes routing resources and enables a high switching capacity network device, including both physical layer switch/router subsystems and upper layer switch/router subsystems, to be fit in one telco rack. Providing a multi-layer network device in one telco rack allows for intelligent layer 1 switching (for example, dynamic network connection set up), allows for one network management system to control both layer 1 and upper layer networks and eliminates grooming fees. Compared with separate layer 1 and upper layer network devices or a multi-layer network device occupying multiple telco racks, a single network device saves valuable telco site space and reduces expenses by sharing overhead such as the chassis, power and cooling.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: August 16, 2005
    Assignee: Ciena Corporation
    Inventor: Brian Branscomb
  • Patent number: 6927982
    Abstract: In a method of connecting a device to a support, in which method the device comprises at least a first terminal region, and in which method the support comprises at least a second terminal region, electrically conductive, flexible microparticles are initially produced on the first terminal region and/or on the second terminal region. Subsequently the terminal regions are connected via the electrically conductive, flexible microparticles.
    Type: Grant
    Filed: September 11, 2002
    Date of Patent: August 9, 2005
    Assignee: Infineon Technologies AG
    Inventor: Egon Mergenthaler
  • Patent number: 6924987
    Abstract: A wiring board with microstrip structure has: a first conductor layer that is provided with conductor wirings to be connected to a semiconductor chip in its external terminal (bonding pad); a second conductor layer that is provided with a conductor pattern connected through a via to a ground wiring, for supplying a power supply of ground potential to the semiconductor chip; and a third conductor layer that is provided with a power supply terminal connected through a via to a power supply wiring for supplying an operation power supply of a potential other than the ground potential to the semiconductor chip, a signal terminal connected through a via to a signal wiring for transmitting an electric signal, and a ground terminal connected through a via to the conductor pattern in the second conductor layer.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: August 2, 2005
    Assignee: Hitachi Cable, Ltd.
    Inventors: Hiroshi Sugimoto, Tatsuya Ohtaka, Shigeharu Takahagi
  • Patent number: 6920051
    Abstract: A hybrid capacitor associated with an integrated circuit package provides multiple levels of excess, off-chip capacitance to die loads. The hybrid capacitor includes a low inductance, parallel plate capacitor embedded within the package, and electrically connected to a second source of off-chip capacitance. The parallel plate capacitor is disposed underneath a die, and includes a top conductive layer, a bottom conductive layer, and a thin dielectric layer that electrically isolates the top and bottom layers. The second source of off-chip capacitance is a set of self-aligned via capacitors, and/or one or more discrete capacitors, and/or an additional parallel plate capacitor. Each of the self-aligned via capacitors is embedded within the package, and has an inner conductor and an outer conductor. The inner conductor is electrically connected to either the top or bottom conductive layer, and the outer conductor is electrically connected to the other conductive layer.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: July 19, 2005
    Assignee: Intel Corporation
    Inventors: David G. Figueroa, Yuan-Liang Li, Huong T. Do
  • Patent number: 6912780
    Abstract: A method to replace an electrical interface on a printed circuit board having a plurality of contact pads on a top surface, the contact pads being connected to conducting material extending through said circuit board. For the contact pad being replaced, drilling a hole through said printed circuit board at that location, and removing any remaining conductor material attached to the contact pad on the top board surface. Providing a replacement conductor/contact pad structure having a generally T-configuration with a stem and a head that completely surrounds the stem, wherein said head has a diameter greater than the diameter of the drilled hole. Inserting the replacement conductor/contact pad into the hole with said stem extending beyond the second surface of the board with the bottom surface of the head being in contact with the first surface of said board. A replacement conductor/contact pad on repaired board is also described.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: July 5, 2005
    Assignee: International Business Machines Corporation
    Inventors: Bruce John Chamberlin, Mark Kenneth Hoffmeyer, Wai Mon Ma, Arch Nuttall, James R. Stack