Abstract: The invention efficiently mounts substrates to back planes and accomplishes high quality signal transfer. Connectors to which N adaptor substrates are fitted and connectors to which M bus switch substrates are fitted are provided to a multi-layered back plane. Signal pin groups of the connector on the adaptor substrate side are grouped into M data paths. Signal pins of the connector on the adaptor substrate side and corresponding signal pins of the connector on the bus switch substrate side are arranged horizontally in such a fashion as to exist on the same plane (with positions in a Z direction being substantially equal). Therefore, wiring patterns for connecting corresponding signal pins can be formed substantially linearly and a large number of substrates can be efficiently mounted to a limited area.

Abstract: According to some embodiments, a system includes a holder to hold an electrical module, the module having an electrical circuit and a conductive module pad electrically coupled to the electrical circuit. A system may also include a flexible circuit coupled to the holder and having a conductive pad to contact the conductive module pad.

Abstract: For a drawer, equipped with electronics cards and inserted into a drawer-receiving structure through an opening provided in the front face of the drawer-receiving structure, a device for electromagnetically protecting the cards is formed by the front face of the drawer, and by the side faces, the top face, the bottom face, and the back face of the drawer-receiving structure, the faces being electrically conductive.

Abstract: A DC bus for use in a power module has a positive DC conductor bus plate parallel with a negative DC conductor bus plate. One or more positive leads are connected to the positive bus and are connectable to a positive terminal of a power source. One or more negative leads are connected to the negative bus and are connectable to a negative terminal of a power source. The DC bus has one or more positive connections fastenable from the positive bus to the high side of a power module. The DC bus also has one or more negative connections fastenable from the negative bus to the low side of the power module. The positive bus and negative bus permit counter-flow of currents, thereby canceling magnetic fields and their associated inductances, and the positive and negative bus are connectable to the center portion of a power module.

Abstract: One or more semiconductor devices are packaged inside a stack-type semiconductor package. The stack-type semiconductor package has a printed circuit board having a circuit pattern. A first semiconductor memory device (first device) is stacked on the PCB and is electrically connected to the PCB circuit pattern. A conductive frame has first terminals and second terminals, and the first terminals are electrically connected to the PCB circuit pattern. A second semiconductor memory device (second device) is stacked on the conductive frame over the first device and is electrically connected to second terminals of the conductive frame. The second device is electrically connected to the PCB circuit pattern and the first device via the conductive frame. Each of the first device may be either a ball grid array type stack package (BGA package) or a thin-small-outline-package-type package. The second device may be a BGA package.

Abstract: A multi-layer printed circuit board includes at least a ground plane for providing a ground level, at least a signal plane having a plurality of trace regions for transmitting signals, at least a power plane region having a plurality of power blocks for individually providing a plurality of voltage levels, and at least a via for electrically connecting the trace regions with the power plane region or the ground plane. Two adjacent power blocks with different voltage levels are separated by an insulating line. The insulating line has a plurality of first insulating sectors, and a plurality of second insulating sectors for connecting two adjacent first insulating sectors when an included angle of the adjacent first insulating sectors is greater than a predetermined value.

Abstract: A method and associated structure for forming a conductive path within a laminate. A conductive element is presses into an opening in the laminate such that portion of at least one end of the conductive element extends beyond a surface of the laminate. A compressive pressure is applied to the portion of the at least one end of the conductive element. The compressive pressure applied to the at least one end of the conductive element forms a contact pad extending beyond the surface of the laminate. The conductive element may include an inner element covered by an outer element.

Abstract: A foldaway electronic device includes a base unit having opposing lateral surfaces and an end portion, a cover unit having opposing lateral surfaces, each of which corresponds to one of the lateral surfaces of the base unit, and an end portion that is rotatably attached to the end portion of the base unit, whereby the cover unit may be rotated between a folded position relative to the base unit and an unfolded position relative to the base unit, a locking mechanism in the base unit and cover unit that locks the cover unit in the folded position, a lock release mechanism in the base unit that releases the locking mechanism when the cover unit is in the folded position, and impelling means in the base unit for impelling the cover unit from the folded position to an unfolded position after the lock release mechanism has been actuated, wherein either lateral surface of the base unit has a guard portion that extends over and prevents contact by a user's thumb and fingers with a portion of the corresponding lateral

Abstract: Exemplary techniques for providing an embedded preemphasis circuit and/or a deemphasis circuit in a printed circuit board (PCB) or other circuit device are disclosed. In particular, a technique for preemphasizing and/or deemphasizing transmitted signals in a PCB-based circuit is provided. The technique may be realized as a preemphasis circuit for preemphasizing a signal being transmitted from a signal source to a signal destination. The preemphasis circuit comprises a printed circuit board (PCB), a resistor embedded in the PCB and having a first terminal electrically connected to the signal source and a second terminal electrically connected to the signal destination, and a capacitor embedded in the PCB and having a first terminal electrically connected to the signal source and a second terminal electrically connected to the signal destination.

Abstract: A module board has embedded chips and components. A substrate has at least one large cavity and at least one small cavity, in which the large cavity passes through the substrate and a passive component is set in the small cavity. A heat-dissipation sheet is set at the bottom of the substrate. A first adhesion layer bonds the bottom of the substrate to the heat-dissipation sheet. At least one IC chip is fixed in the large cavity of the substrate by a second adhesion layer. A dielectric filling layer covers the entire surface of the module board and fills all gaps, in which the dielectric filling layer has a plurality of micro vias to expose partial areas of the IC chip, the passive component and the substrate. At least one wiring pattern layer is formed on the dielectric filling layer and provide electrical connection among the IC chip, the passive component, and the substrate.

Abstract: To reduce switching noise, the power supply terminals of an integrated circuit die are coupled to the respective terminals of at least one capacitor embedded in an interposer that lies between the die and a substrate. In an embodiment, the interposer is a multilayer ceramic structure that couples power and signal conductors on the die to corresponding conductors on the substrate. The capacitor is formed of at least one high permittivity layer and in an embodiment comprises several high permittivity layers interleaved with conductive layers. Alternatively, the capacitor can comprise at least one embedded discrete capacitor. Also described are an electronic system, a data processing system, and various methods of manufacture.

Abstract: A lockable retractable locating frame of a BGA on-top test socket includes a push-and-lock mechanism that further comprises an accommodation room, a slider, and a sliding slot for riding the slider. The slider further includes a driving portion for receiving foreign input, a tongue portion nested in the accommodation room for protruding into a stroke space formed between the retractable locating frame and a base of the test socket, and a connection portion bridging the driving portion and the tongue portion for forming a slide pair with the sliding slot. By protruding the tongue portion into the stroke space to form a stop for avoiding movement of the retractable locating frame with respect to the base, the spacing between the base and the retractable locating frame can be thus kept and the electronic device mounted on the test socket can be secured.

Abstract: Disclosed are novel methods and apparatus for efficiently providing power buses and bump patterns with reduced inductance and/or resistance. In an embodiment, an apparatus is disclosed. The apparatus includes a plurality of power and ground bus pairs. Each power and ground bus pair may have a power bus and a ground bus. The apparatus further includes a first power bus from a first pair of the plurality of power and ground bus pairs. The first power bus may include a plurality of power bumps. The apparatus also includes a first ground bus from the first pair of the plurality of power and ground bus pairs. The first ground bus may include a plurality of ground bumps. Each of the plurality of power/ground bumps may be substantially equidistance from any immediately neighboring ground bump of the first ground bus.

Abstract: A contact unit described includes a contact plate and a connection plug 4 for an adjusting device. A position sensor is disposed on the contact plate whose electrical contact results over conductor tracks 13 molded into the contact plate. The contact plate 8 further includes contact flags 12 for contacting an electromotor, wherein the contact flags 12 are led outside to a plug 4 over conductor tracks that are injected into the contact plate 8. All conductor tracks are led in a fixed position with respect to one another in a plug inner portion 14, wherein this plug inner portion is produced in one injection process with the contact plate 8, and connection between the contact plate 8 and the plug inner portion results only through the conductor tracks 13.

Abstract: There is disclosed a semiconductor device comprising at least one first pad being formed above a substrate and given a first potential, at least one first conductive layer being formed between the first pad and the substrate so as to be electrically connected to the first pad, at least one second pad being formed above the substrate so as to sandwich the at least one first conductive layer between the second pad and the substrate, and given a second potential different from the first potential, at least one second conductive layer being formed between the first and second pads and the substrate so as to be electrically connected to the second pad, and a plurality of insulating layers being stacked on the substrate and at least one of the insulating layers being as an inter-electrode insulator of a capacitance element.

Abstract: In order to provide a wiring board comprising a magnetic material effective in suppressing spurious radiation in semiconductor devices and electronic circuits and the like that operate at high speeds, a wiring board (15) comprises an insulative base material (17), conductor patterns (19a to 19f) formed thereon, and magnetic thin films (21a to 21f) formed on the conductor patterns (19a to 19f).

Abstract: An electrical connector (1) includes an insulative housing (2), a number of signal and power contacts (3, 4), a first and a second shell-halves (51, 52), and a grounding strip (6). The grounding strip includes a bar portion (60), a plurality of claws (61) and a pair of contacting portions (62). The insulative housing includes a shroud wall formed by a pair of longitudinal walls (22, 23) and defining a receiving cavity (200), and a tongue portion (21) extending into the receiving cavity. The tongue portion defines a plurality of passages (211, 212) to receive the contacts, a receiving groove (210) to receive the bar portion and a plurality of engaging grooves (213) located beside the receiving groove symmetrically and engagingly receiving the claws. Each shell-half includes a plate portion (50) enclosing the longitudinal wall and a side portion (511) vertically extending from the plate portion and enclosing the lateral wall.

Abstract: In order to provide a wiring board comprising a magnetic material effective in suppressing spurious radiation in semiconductor devices and electronic circuits and the like that operate at high speeds, a wiring board (15) comprises an insulative base material (17), conductor patterns (19a to 19f) formed thereon, and magnetic thin films (21a to 21f) formed on the conductor patterns (19a to 19f.

Abstract: A system and method for reducing an apparent height of a board system are provided. The board system may include, for example, a carrier, a component, a printed circuit board and/or a solder material. The component is mounted on a first side of the carrier. The printed circuit board has a hole that is structured to accommodate the component. The solder material solders the carrier to the printed circuit board and provides a structural bond between the carrier and the printed circuit board. At least one portion of the solder material provides an electrical coupling between the carrier and the printed circuit board and at least one portion of the component is maintained in the hole after the carrier is soldered to the printed circuit board.

Abstract: A formable wiring structure, an interposer with the formable wiring structure, a multichip module including the interposer and in particular a microprocessor and L2, L3 cache memory mounted on the interposer. The formable wiring structure includes wiring layers separated by dielectric layers. Attachment locations for attaching to module substrates, printed circuit cards or for mounting chips (microprocessor and cache) are provided on at least one interposer surface. The microprocessor is centrally located opposite a module attach location and the cache chips are on portions that are bent away from the module attach location to reduce and minimize module real estate required.