Patents Examined by Tuan Dinh
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Patent number: 7183495Abstract: A cable connection structure includes an insulation holding body (3); a connection section (2) supported by the insulation holding body (3); a core wire (6) provided at a position corresponding to that of the connection section (2); a bonding agent (4) provided on at least the insulation holding body (3); and an insulation member (5) provided on the core wire (6) and the bonding agent (4) to press the bonding agent (4) between the insulation member (5) and the insulation holding body (3), thereby bonding the insulation member (5) to the insulation holding body (3).Type: GrantFiled: February 24, 2005Date of Patent: February 27, 2007Assignee: Hirose Electric Co., Ltd.Inventors: Satoshi Yoshida, Takashi Nagawatari
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Patent number: 7184276Abstract: A semiconductor device includes a plurality of semiconductor chips; and a plurality of substrates, each of the substrates having one of the semiconductor chips mounted thereon. The substrates are stacked each other. The upper and lower ones of the semiconductor chips mounted on a pair of the stacked substrates are electrically connected through first terminals provided in a region outside the region in which one of the semiconductor chips is mounted in each of the substrates. The lowest one of the substrates has second terminals provided in its region closer to its center than its region in which the first terminals are provided, the second terminals electrically connected to one of the semiconductor chips. A pitch of adjacent two of the second terminals is wider than a pitch of adjacent two of the first terminals.Type: GrantFiled: July 21, 2004Date of Patent: February 27, 2007Assignee: Seiko Epson CorporationInventor: Nobuaki Hashimoto
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Patent number: 7184278Abstract: An electrical apparatus includes a housing, a shielding plate, a first elastic element, and a second elastic element. In this case, the housing has at least one heat dissipation opening. The shielding plate has at least one first hole, a first sidewall and a second sidewall. The shielding plate is disposed parallel to at least one part of the housing. When the shielding plate is moved, the first hole and the heat dissipation opening are aligned. At least one part of the first elastic element contacts the first sidewall. The first elastic element is made of a shape memory alloy. At least one part of the second elastic element contacts the second sidewall. The shielding plate is movable between the first elastic element and the second elastic element.Type: GrantFiled: June 23, 2005Date of Patent: February 27, 2007Assignee: ASUSTek Computer Inc.Inventor: Chih Sheng Tsai
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Patent number: 7184274Abstract: A flash memory encryption device that enables different types of flash memory cards to be conveniently inserted into or removed from, which comprising: a housing, having an upper housing and a lower cover that can be mutually engaged together for forming a room, wherein the housing further comprises a opening; a printed circuit board, disposed in the room; a first connector, disposed on the printed circuit board and exposed outward the opening for providing at least one memory card being inserted or removed; a controller, disposed on the printed circuit board and coupled to the first connector for receiving data from the first connector and executing encryption or decryption operation then output; and a second connector, disposed on the printed circuit board and coupled to the controller for connecting the flash memory encryption device to a host computer.Type: GrantFiled: April 6, 2005Date of Patent: February 27, 2007Inventors: Victor Chuan-Chen Wu, Bill Kwong
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Patent number: 7180750Abstract: A structure is disclosed for preventing stacking connectors on a first and a second boards from coming apart that are fitted to each other. The first and second boards connected by said stacking connectors being fitted to each other are clamped by a clamping member. The clamping member is connected to surfaces on the first and second boards that connect to ground.Type: GrantFiled: September 16, 2005Date of Patent: February 20, 2007Assignee: NEC CorporationInventor: Masahito Shimizu
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Patent number: 7177162Abstract: An electronic device that includes a housing that defines an envelope and that defines a horizontal routing channel within the envelope. A plurality of boards is arranged horizontally within the housing and at least one board includes input-output ports. At least one communication conduit is coupled to an input-output port. The boards that include input-output ports are recessed with respect to the envelope and are arranged such that the input-output ports are adjacent to the routing channel. Communication conduits are routed through the routing channel.Type: GrantFiled: November 8, 2005Date of Patent: February 13, 2007Assignee: Network Equipment Technologies, Inc.Inventors: Tom Yonenaka, Phil Cole
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Patent number: 7173817Abstract: A modular platform is provided. The modular platform includes a chassis having a front side and a back side, and configured to receive modular platform boards, a plenum associated with the chassis and at least one chassis management module removably disposed in the at least one plenum in a substantially parallel relationship with a flow of a cooling medium passing through the plenum.Type: GrantFiled: December 29, 2003Date of Patent: February 6, 2007Assignee: Intel CorporationInventor: Wen Wei
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Patent number: 7173827Abstract: A printed board has a board, an electrically insulative membrane, formed on the board, and an electrically conductive membrane, formed on the electrically insulative membrane, in its area where a control circuit, including a CPU and etc., is installed. The electrically conductive membrane is electrically connected with ground patterns of a wiring pattern. Accordingly, ground connections at the control circuit are sufficiently performed. Therefore, even though ground connections in an area other than the control circuit are not sufficiently performed, a magnetic noise is prevented from being generated in a loop-shaped electricity supply line passing through a CPU and etc. Consequently, noises in printed board can be effectively reduced.Type: GrantFiled: November 26, 2003Date of Patent: February 6, 2007Assignees: Nippon Soken, Inc., Denso CorporationInventors: Yuji Sugimoto, Syuichi Kouno, Tomoyuki Miyagawa
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Patent number: 7170755Abstract: An electronics card, such as a backplane, is precisely aligned with a structure, such as a card cage, via alignment tabs by forming the electronics card to have alignment openings that extend through the electronics card and snuggly accept the tabs. The alignment opening has a width, while the tabs have a thickness that is greater than zero and less than the width. Further, the alignment openings have lengths that are the same size as the lengths of the alignment tabs.Type: GrantFiled: December 9, 2003Date of Patent: January 30, 2007Assignee: Tellabs Petaluma, Inc.Inventor: G. James Keller
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Patent number: 7170754Abstract: The specification describes SDIO devices and SDIO cards wherein the SDIO devices are provided with enhanced functionality, and the SDIO cards are provided with enhanced IC capacity. A variety of multi-chip-module (MCM) approaches are used to increase the IC capacity of the SDIO card.Type: GrantFiled: May 6, 2004Date of Patent: January 30, 2007Assignee: Sychip Inc.Inventors: Moses Asom, Yinon Degani, Joe Ryan, Kunquan Sun, Yanbing Yu, Meng Zhao
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Patent number: 7170756Abstract: Electrical circuit trimming methods. In one aspect of the invention, a trimming method includes assembling one or more components of an electrical circuit onto a printed circuit board having one or more electrical connections coupled to the said one or more components. An electrical parameter of the electrical circuit is then trimmed. The trimming of the electrical parameter of the electrical circuit includes removing a portion of the printed circuit board to break the electrical connection on the printed circuit board. In another aspect of the invention, the trimming the electrical parameter of the electrical circuit includes electrical programming of the electrical circuit.Type: GrantFiled: September 4, 2003Date of Patent: January 30, 2007Assignee: Power Integrations, Inc.Inventor: Balu Balakrishnan
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Patent number: 7167374Abstract: A circuit substrate comprises a first substrate on a first surface of which circuit elements are loaded, a second substrate on which the first substrate is loaded, and noise reduction elements. Each of the noise reduction elements is sandwiched between an area of a second surface of the first substrate over against the first surface of the first substrate and a surface of the second substrate facing the second surface of the first substrate. The noise reduction element is connected between a power source terminal of the second surface of the first substrate and a power source terminal of the surface of the second substrate, and/or between a ground terminal of the second surface of the first substrate and a ground terminal of the surface of the second substrate.Type: GrantFiled: September 24, 2003Date of Patent: January 23, 2007Assignee: Fujitsu LimitedInventor: Osamu Aizawa
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Patent number: 7167377Abstract: A circuit-constituting unit forming a distribution circuit or the like in a vehicle. The circuit-constituting unit includes a plurality of bus bars for constituting a power circuit; a semiconductor switching device provided in the power circuit; and a control circuit board. The bus bars are bonded to a surface of the control circuit board such that the bus bars are arranged to be generally coplanar with each other. The semiconductor switching device is mounted on both of the corresponding bus bars and the control circuit board. An opening may be formed through the control circuit board. In this case, one of terminals of the semiconductor switching device may be connected to a surface of the control circuit board facing away from the surface to which the bus bars are bonded. The other terminals may be connected respectively to the bus bar through the opening.Type: GrantFiled: November 25, 2002Date of Patent: January 23, 2007Assignees: Sumitoo Wiring Systems, Ltd., Autonetworks Technologies, Ltd., Sumitomo Electric Industries, Ltd.Inventors: Takahiro Onizuka, Isao Isshiki, Ryuji Nakanishi, Kouichi Takagi, Tou Chin, Shigeki Yamane
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Patent number: 7158387Abstract: A film carrier tape for mounting electronic part comprises an insulating film, a wiring pattern formed on a surface of the insulating film, and a solder resist layer formed by moving a squeegee using a screen mask of a prescribed pattern that is formed in such a manner that connecting terminal portions of the wiring pattern should be exposed. The edge of the solder resist layer is formed almost in parallel or almost at right angles to the moving direction of the squeegee used in the application of the solder resist. The solder resist layer can be formed by the use of a screen mask for solder resist coating in which the edge of the screen that is unmasked to apply the solder resist is formed almost in parallel or almost at right angles to the moving direction of the squeegee used in the application of the solder resist. According to the present invention, the fraction defective of the solder resist coating can be decreased.Type: GrantFiled: September 17, 2003Date of Patent: January 2, 2007Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Akihiro Terada, Keisuke Yamashita
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Patent number: 7158385Abstract: A securing device includes a central rod extending from the driving press to be movably mounted on a top board of the computer main frame and a base having an engaging plate movably attached to the base via a first spring which is sandwiched between the base and the engaging plate and a lateral rod securely extending away from the engaging plate to selectively engage with a free end of the central rod. When the central rod is longitudinally moved, the longitudinal movement of the central rod drives the lateral rod to move laterally and thus a hook which is formed on a side face of the engaging plate for extending through the first side board and the second side board to secure engagement between the first side board and the second side board is away from the first side board and the second side board and the second side board is free from engagement with the first side board.Type: GrantFiled: July 12, 2005Date of Patent: January 2, 2007Assignee: San Hawk Technic Co., Ltd.Inventor: Chia-Chin Wang
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Patent number: 7158384Abstract: A vibration reducing structure of an electronic device includes first and second housings, a printed circuit board, a first post and a second post. The first and second housings define a closed space therebetween. The printed circuit board is disposed within the space and having a heavy component mounted on a first surface thereof. The first post is arranged on the first housing and under the heavy component. The second post is arranged on the second housing and above the heavy component.Type: GrantFiled: May 9, 2005Date of Patent: January 2, 2007Assignees: Delta Electronics, Inc., Delta Electronics (Thailand) Public Company, LimitedInventor: Jui Ching Huang
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Patent number: 7154760Abstract: The present invention realizes strengthening of a ground of a lower-surface ground electrode of an upper semiconductor chip and miniaturization in a semiconductor module on which two semiconductor chips are mounted in a stacked manner. A lower semiconductor chip is fixed to a bottom of a recess formed in an upper surface of a module board, and an upper semiconductor chip is fixed to an upper surface of a support body made of conductor which is formed over the upper surface of the module board around the recess. External electrode terminals and a heat radiation pad are formed over a lower surface of the module board.Type: GrantFiled: December 12, 2003Date of Patent: December 26, 2006Assignee: Renesas Technology Corp.Inventors: Satoru Konishi, Tsuneo Endoh, Masaaki Tsuchiya, Hirokazu Nakajima
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Patent number: 7154046Abstract: A molecularly flexible dielectric electronic substrate for receiving an electronic device has a modulus of elasticity less tan about 500,000 psi. The molecularly flexible dielectric substrate comprises one or more sheets or layers of a molecularly flexible dielectric adhesive having a modulus of elasticity less than about 500,000 psi and having patterned metal foil electrical conductors thereon. The molecularly flexible dielectric adhesive may have a low glass transition temperature and the ability to withstand soldering.Type: GrantFiled: February 9, 2004Date of Patent: December 26, 2006Assignee: Amerasia International Technology, Inc.Inventor: Kevin Kwong-Tai Chung
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Patent number: 7154761Abstract: A backplane assembly includes a main backplane having a first power conductor, a backplane strip having a second power conductor, and connecting members disposed between the main backplane and the backplane strip. The connecting members hold the backplane strip in a fixed position relative to the main backplane and electrically connect the first power conductor and the second power conductor. In one arrangement, the connecting members include source standoffs which extend from a source area of the main backplane to the backplane strip, and target standoffs which extend from a target area of the main backplane to the backplane strip. The source and target standoffs and the second power conductor provide a current path which increases current carrying capacity from the source area to the target area above that provided by the first power conductor alone. Thus, the backplane assembly is well-provisioned for distributing high currents to circuit boards.Type: GrantFiled: February 13, 2004Date of Patent: December 26, 2006Assignee: Cisco Technology, Inc.Inventors: Sergio Camerlo, Irfan Elahi
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Patent number: 7151228Abstract: The present invention comprises a plurality of laminating double-side circuit boards and a plurality sheets of prepreg for interlayer connection that are placed one on another. Via holes extend from the circuit on one side of each laminating double-side circuit board to the circuit on the other side thereof. Each via hole is filled with electro-conductive material to connect the circuits on both sides of the laminating double-side circuit board. The pad on a laminating double-side circuit board and the pad on another laminating double-side circuit board are laminated via a sheet of prepreg for interlayer connection so that the respective pads are opposed to each other via the through hole filled with electro-conductive material formed through the sheet of prepreg for interlayer connection. Thereby, the respective pads on the laminating double-side wiring circuit boards are electrically connected with one another.Type: GrantFiled: January 29, 2002Date of Patent: December 19, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihisa Takase, Tsuneshi Nakamura