Abstract: Disposing the light absorption layer formed in contact with a polycrystal silicon layer of a bottom gate type polycrystal silicon TFT allows a depletion layer formed between drain and channel forming regions to extend further into the inside of the light absorption layer, resulting in collection of photo carriers produced in the depletion layer into the channel forming region. The photo carriers collected into the channel forming region are subsequently collected into the source region to be output as large photocurrents by high mobility of the polycrystal silicon.

Abstract: In the present invention, an interfacial layer is added to a light-emitting diode or laser diode structure to perform the role of strain engineering and impurity gettering. A layer of GaN or AlxInyGal1-x-yN (0≦x≦1, 0≦y≦1) doped with Mg, Zn, Cd can be used for this layer. Alternatively, when using AlxInyGa1-x-yN (x>0), the layer may be undoped. The interfacial layer is deposited directly on top of the buffer layer prior to the growth of the n-type (GaN:Si) layer and the remainder of the device structure. The thickness of the interfacial layer varies from 0.01-10.0 &mgr;m.

Abstract: An n-type layer (3) and a p-type layer (5) which are made of a gallium nitride based compound semiconductor are provided on a substrate (1) so that a light emitting layer forming portion (10) for forming a light emitting layer is provided. A gallium nitride based compound semiconductor layer containing oxygen is used for at least one layer of the light emitting layer forming portion (10). In the case where a buffer layer (2) made of the gallium nitride based compound semiconductor or aluminum nitride is provided between the substrate (1) and the light emitting layer forming portion (10), the buffer layer (2) and/or at least one layer of the light emitting layer forming portion (10) may contain oxygen. By such a structure, crystal defects of the semiconductor layer of the light emitting layer forming portion (10) can be decreased and a luminance can highly be enhanced. Thus, it is possible to obtain a blue color type semiconductor light emitting device having a high luminance.

Abstract: A rear light entry photodetector chip is secured face-down with solder on to the front face of a ceramic submount provided with a pair of electrically conductive vias. A frame-shaped mass of solder seals the chip to the submount to provide a hermetic enclosure protecting sensitive semiconductor surface areas of the photodetector chip where electric fields are liable to be present in the vicinity of a pn or metal/semiconductor junction.

Abstract: A CMOS image sensor according to the present invention has a low-voltage photodiode which is fully depleted at a bias of 1.2-4.5V. The photodiode comprises: a P-epi layer; a field oxide layer dividing the P-epi layer into a field region and an active region; a N− region formed within the P-epi layer, wherein the first impurity region is apart from the isolation layer; and a P0 region of the conductive type formed beneath a surface of the P-epi layer and on the N− region, wherein a width of the P0 region is wider than that of the N− region so that a portion of the P0 region is formed on the P-epi layer, whereby the P0 region has the same potential as the P-epi layer.

Abstract: A dual-band planar infrared detector with space-time coherence, with a stack of semiconductor layers (16, 18, 20, 21) forming first and second photodiodes. The detector has a planar structure in which each layer has a part showing on a surface (22) substantially perpendicular to the stack.

Abstract: A structure and method for creating an integrated circuit passivation structure comprising, a circuit, a dielectric, and metal plates over which an insulating layer is disposed that electrically isolates the circuit, and a discharge layer that is deposited to form the passivation structure that protects the circuit from electrostatic discharges caused by, e.g., a finger, is disclosed. The discharge layer additionally contains dopants selectively deposited to increase electrostatic discharge carrying capacity while maintaining overall sensing resolution.

Abstract: A high-performance thin-film semiconductor device and a simple fabrication method is provided. After a silicon film is deposited at approximately or less 580° C. and at a deposition rate of at least approximately 6 Å/minute, thermal oxidation is performed. This ensures an easy and simple fabrication of a high-performance thin-film semiconductor device. A thin-film semiconductor device capable of low-voltage and high-speed drive is provided. The short-channel type of a TFT circuit with an LDD structure reduces a threshold voltage, increases speed, restrains the power consumption and increases a breakdown voltage. The operational speeds of the thin-film semiconductor device is further increased by optimizing the maximum impurity concentration of an LDD portion, a source portion a drain portion, as well as optimizing the LDD length and the channel length. A display system is provided using these TFTs having drive signals at or below approximately the TTL level.

Abstract: The present invention is a method of utilizing microwave energy for annealing of ion implanted wafers. By controlling the time, power density and temperature regime, it is possible to substantially fully anneal the wafer while limiting (and substantially preventing) the diffusion of dopant into the silicon, thereby producing higher performance scaled semiconductor devices. It is also possible, using different conditions, to allow and control the dopant profile (diffusion) into the silicon. Another aspect of the present invention is a method of forming a PN junction in a semiconductor wafer having a profile depth less than about 50 nm and a profile wherein the net doping concentration at said PN junction changes by greater than about one order of magnitude over 6 nm wherein the surface concentration of said dopant is greater than about 1×1020/cm3.

Abstract: A semiconductor material having more excellent electric characteristics than polycrystalline semiconductor materials and readily formed on various kinds of substrates is provided. The semiconductor material is made of substantially single crystalline semiconductor crystal grains 3a. These crystal grains 3a are preferentially oriented in a common surface orientation, such as {100}, {111} or {110}-orientation, and grain boundaries 3b of adjacent ones of the crystal grains 3a are in substantial lattice matching with each other at least in a part thereof. In case of {100} orientation, each crystal grain 3a has an approximately square shape, and they are regularly aligned in rows and columns. In case of {111} orientation, each crystal grain 3a has an approximately equilateral hexagonal shape, and they are aligned in an equilateral turtle shell pattern.

Abstract: An IR transceiver module includes a lead frame, a sensor, an emitter, and a body encapsulating the sensor and emitter, where the body has an integrally formed lens aligned with both the sensor and with the emitter. The sensor is supported proximate to a support surface of the lead frame and has a sensing area which is generally parallel to the support surface. The emitter is supported proximate to the sensor and within a vertical projection of the sensing area, i.e. it is vertically aligned with the sensor. In embodiments of the invention, a recess is formed into the sensing surface of the sensor that is provided with a reflective material to form a reflective cup for the emitter. In other embodiments, a transceiver is also supported proximate to the lead frame and is electrically coupled to both the sensor and the emitter. By providing a module having both the emitter and sensor aligned with a single lens, a very small form factor can be achieved.

Abstract: The light-emitting diode device of the present invention includes an active layer, a p-type contact layer, a Schottky electrode and an ohmic electrode. The active layer is formed over an n-type semiconductor substrate. The contact layer is formed over the active layer. The Schottky electrode is selectively formed on the contact layer and makes Schottky contact with the contact layer. The ohmic electrode is formed to surround the Schottky electrode on the contact layer and to be electrically connected to the Schottky electrode and transmits the light emitted from the active layer.

Abstract: In this invention, a new, simple and small-size hydrogen-sensitive palladium (Pd) membrane/semiconductor Schottky diode sensor has been developed and fabricated. First, a high quality undoped GaAs buffer layer and an n-type GaAs epitaxial layer with the carrier concentration of 2.times.10.sup.17 cm.sup.31 3 is grown by molecular beam epitaxy (MBE) on a semi-insulated GaAs substrate. Then a thin Pd membrane is evaporated on the surface of the n-type GaAs epitaxial layer by the vacuum evaporation technique. It is well-known that palladium metal has excellent selectivity and sensitivity on hydrogen gas. When hydrogen gas diffuses to the Pd membrane surface, the hydrogen molecules will dissociate into hydrogen atoms. Some of the hydrogen atoms diffuse through the thin metal layer and form the palladium hydride near the metal-semiconductor interface. The hydride may effectively lower the work function of Pd metal.

Abstract: A p-type semiconductor composed basically of an Ib-IIIb-VIb.sub.2 group compound semiconductor (especially CuInS.sub.2) which is improved in carrier concentration and has advantages in manufacture and performance. In order to obtain the p-type semiconductor mentioned above, p-type CuInS.sub.2 is formed by adding both P (p-type impurity) and Sn (n-type impurity) to CuInS.sub.2. The carrier concentration of the p-type semiconductor is 5.times.10.sup.17 cm.sup.-3 which is larger than the value (5.times.10.sup.16 cm.sup.-3) obtained when P and In are added or another value (3.times.10.sup.15 cm.sup.-3) obtained when only P is added. A thin film solar cell characterized by a glass substrate (2), an Mo electrode (1), a p-type semiconductor layer (3), an n-type semiconductor layer composed of a CdS layer (4), and an ITO electrode (5) is manufactured by using the CuInS.sub.2 layer containing P and Sn as the p-type semiconductor (3).

Abstract: Disclosed is an electroabsorption-type optical modulator, which includes a semiconductor substrate; and a semiconductor buffer layer, a semiconductor optical absorption layer and a semiconductor cladding layer which are layered in order on the semiconductor substrate. The absorption of a light wave supplied to an end of the semiconductor optical absorption layer is controlled by changing the intensity of an electric field applied to the semiconductor optical absorption layer. The semiconductor optical absorption layer has a first region with an absorption-edge wave length shorter than that of a second region of the semiconductor optical absorption layer.

Abstract: A monolithic, integrated circuit sensor combining both a differential pressure sensor and a flow sensor on the same silicon chip. The integrated circuit has a diaphragm with a number of piezo-resistive elements placed on it in the normal manner for a pressure sensor. In addition, a channel is provided between the spaces on the two sides of the diaphragm. The channel has a cross-section which is a fraction of the size of the diaphragm. In one embodiment, the channel is a hole in the diaphragm. In another embodiment, the channel is an etched groove in the frame supporting the diaphragm.

Abstract: A semiconductor bulk acoustic resonator (SBAR) with improved passband insertion loss and phase performance characteristics is suitable for use in a wide variety of narrowband filtering applications. The SBAR is configured to suppress lateral propagating acoustical wave modes. The lateral acoustical wave modes are controlled by varying the lateral dimension of the resonator electrodes and or utilizing a viscous acoustic damping material, such as a viscoelastic material, such as polyimide, applied along at least a portion of the perimeter of the electrodes to attenuate reflections of the lateral acoustic modes at the electrode edges back into the electrode region.

Abstract: A MOS type image sensor has an image area that consists of a matrix of pixels and a peripheral circuitry area that drives the image area.

Abstract: To enhance a drain current voltage characteristics of a compound semiconductor field effect transistor, an n-GaAs substrate is used. After forming an n.sup.- -GaAs layer and an i-AlGaAs layer successively on the substrate, an n-type transistor is formed on these layers. Subsequently, on the rear side of the n-GaAs substrate, an ohmic electrode is formed, to connect with a drain electrode on a surface side. In the structure, when a drain current is increased, at a drain side electron also flows toward the substrate, so that the current concentration on a drain region is relaxed. Thereby, the drain current voltage characteristics can be improved.

Abstract: The present invention provides a van der Pauw semiconductor test structure for and a method of testing a resistivity of a doped area formed within a substrate of a semiconductor wafer which may be under a diffusion area or a gate structure. The test structure can include field oxide regions formed on a surface of the substrate and a base doped substrate formed within the substrate. Further, the test structure includes a first primary tub and secondary tubs that are formed within the base doped substrate, each of the secondary tubs having a first diffusion region formed adjacent to an inner isolation structure and a second diffusion region formed adjacent to an outer isolation structure. A second primary tub is located adjacent the first primary tub and a dielectric layer is formed over the substrate having contacts formed within the dielectric layer and between the isolation structures.