Abstract: An integrated circuit device structure comprises a semiconductor plateau containing an active region subjacent its front side, an electrode structure at the front side of the plateau, and an insulating layer surrounding the semiconductor plateau. A front side bus at the front side of the insulating layer is connected to the electrode structure. The front side bus extends over an elongate aperture in the insulating layer and is connected through the aperture to a back side bus over substantially the entire length of the front side bus.

Abstract: A semiconductor device, including a circuit configuration formed on a semiconductor substrate, comprises: a boosting circuit for boosting an external power supply voltage to a plus voltage and a minus voltage; and a detecting circuit having a resistor formed of an impurity diffused layer so that the plus voltage and the minus voltage boosted by the boosting circuit are respectively connected to the resistor, to detect a potential at a prescribed point of said resistor so as to verify whether or not the boosting circuit has generated a desired potential.

Abstract: A semiconductor apparatus and method for making the same is disclosed herein in which the semiconductor apparatus includes a first active device formed in a mesa region of semiconductor material formed on one or more sidewalls of an isolation region, and a conductive path which extends from the active device in a linear direction of the mesa. An embodiment is disclosed in which a plurality of active devices are formed in the mesa region and electrically connected thereby.

Abstract: A semiconductor pressure detecting device which effectively reduces stress that occurs on a base member due to welding between cap and the base member or any external load. The semiconductor pressure detecting device includes a semiconductor sensor element capable of detecting a strain and/or stress that occurs on a thin-walled pressure receiving portion; a pedestal seat for joining and supporting the semiconductor sensor element; a base member for joining and supporting the pedestal seat; and a cap member welded and joined to the base member so as to cover the base member, the pedestal seat and the semiconductor sensor element.

Abstract: A hybrid memory device combines a ferromagnetic layer and a Hall Effect device. The ferromagnetic layer is magnetically coupled to a portion of a Hall plate, and when such plate is appropriately biased, a Hall Effect signal can be generated whose value is directly related to the magnetization state of the ferromagnetic layer. The magnetization state of the ferromagnetic layer can be set to correspond to different values of a data item to be stored in the hybrid memory device. The magnetization state is non-volatile, and a write circuit can be coupled to the ferromagnetic layer to reset or change the magnetization state to a different value. The memory device can also be fabricated to include an associated transistor (or other suitable switch) that functions as an isolation element to reduce cross-talk and as a selector for the output of the device when such is used in a memory array.

Abstract: The present invention provides a diode limiter device in which a first penetration hole is formed on a wall surface of an H surface; the PIN diode is supported by the PIN diode mounting side of the post with the PIN diode being electrically connected to the waveguide at the first penetration hole; a second penetration hole is formed on the other wall surface opposite to the wall surface; a second conductive boss which grasps the PIN diode with the post is electrically insulated and supported with respect to the second penetration hole; a wiring substrate with the detection diode and the resistor mounted thereon is installed; and the wiring substrate is supported in the second penetration hole by a third boss, thereby improving productivity and reducing cost.

Abstract: A ZnO thin film is fabricated on the c-surface of a sapphire substrate through use of a laser molecular beam epitaxy (MBE) method-which is effective for epitaxial growth of an oxide thin film through control at an atomic level. The thus-formed ZnO thin film has a considerably high crystallinity; the half width of an X-ray rocking curve was 0.06.degree.. The thin film is of an n-type and has a carrier density of 4.times.10.sup.17 /cm.sup.3. The thin film fabricated in a state in which oxygen partial pressure is held constant at 10.sup.-6 Torr has a structure in which hexagon-shaped nanocrystals of uniform size are close-packed, reflecting the crystal behavior of a wurtzite type. Since in each nanocrystal there is observed a spiral structure formed by steps of a unit cell height (0.5 nm), the nanocrystals are considered to grow in a thermodynamically equilibrated state. The lateral size of the nanocrystal can be controlled within the range of approximately 50 to 250 nm.

Abstract: A compound semiconductor layer of a first conductivity type is formed on a substrate, and a diffusion region of a second conductivity type is formed on the compound semiconductor layer. The light-emitting diode has a high emitted light power, using a large-diameter wafer.

Abstract: A light emitting diode array includes a light emitting area formed on a semiconductor substrate, a diffusion prevention layer formed on the semiconductor substrate, and an insulating layer formed on the diffusion prevention layer. The diffusion prevention layer has a lower edge and the insulating layer has a level drop at this lower edge. An interconnection conductor extends on the insulating layer and is in ohmic contact with the light emitting region through holes in the insulating layer and the diffusion prevention layer. The interconnection conductor has a stepped portion at the level drop of the insulating layer, the stepped portion being located in a wide-width segment of the interconnection conductor.

Abstract: A single mask, low temperature reactive ion etching process for fabricating high aspect ratio, released single crystal microelectromechanical structures independently of crystal orientation.

Abstract: An integrated semiconductor device comprises, reciprocally superimposed, a thermally insulating region; a thermal conduction region of a high thermal conductivity material; a passivation oxide layer; and a gas sensitive element. The thermal conduction region defines a preferential path towards the gas sensitive element for the heat generated by the heater element, thereby the heat dispersed towards the substrate is negligible during the operation of the device.

Abstract: A thin film capacitor structure of a random access memory includes plurality of capacitors formed on an interlayer insulating film. The capacitor structure includes a plurality of lower electrodes formed on the interlayer insulating film, a first dielectric film formed over the plurality of lower electrodes and portions of the interlayer insulating film between lower electrodes, a second dielectric film formed on the first dielectric film, and an upper electrode formed on the second dielectric layer. A silicon oxide film is formed at the step portions of the first dielectric film which result at the periphery of the lower electrodes to prevent leakage current between adjacent capacitors.

Abstract: There is provided a field effect transistor including (a) an amorphous semiconductor layer made of amorphous silicon hydride containing impurities doped therein, (b) a semiconductor layer made of single crystal silicon having an electron affinity greater than that of the amorphous silicon hydride, formed on the amorphous semiconductor layer, (c) a gate insulating film formed on the semiconductor layer, and (d) a gate electrode formed on the gate insulating film. The amorphous semiconductor layer and the semiconductor layer cooperate with each other to thereby form a potential well at a junction therebetween. The above mentioned field effect transistor utilizes a difference in electron affinity between the amorphous semiconductor layer and the semiconductor layer to thereby make it possible to operate at a higher speed because carriers are not influenced by scattering of doped ions.

Abstract: The present invention discloses a method for fabricating a MOSFET device supported on a substrate.

Abstract: A shallow junction MOS transistor comprising a semiconductor substrate having an upper region that includes a first and a second lightly doped region laterally displaced on either side of the channel region. The first and second lightly doped regions extend to a junction depth below the upper surface of the semiconductor substrate. A first and a second lightly doped impurity distribution are located within the first and second source/drain regions of the semiconductor substrate. The shallow junction transistor further includes a gate dielectric formed on an upper surface of the channel region of the semiconductor substrate. A conductive gate that includes a first and a second sidewall is formed on the gate dielectric. A gate insulator is formed in contact with the first and second sidewalls of the conductive gate. First and second source/drain structures are formed above the upper surface of the semiconductor substrate.

Abstract: A sensor (100) includes a fixed gate field-effect transistor (138) that produces a quiescent signal (V.sub.QUIESC1) in a channel (336) when a control signal (V.sub.CONTROL) is applied to a source (332) of the FGFET. A movable gate field-effect transistor (MGFET) (108) produces a sense signal (V.sub.ACCEL) in a channel (316) in response to a physical condition of the sensor when the control signal is applied to a source (312) of the MGFET such that the sense signal is proportional to the quiescent signal. The difference between the currents in the FGFET and MGFET is amplified by a differential amplifier (230) to produce the output signal (V.sub.OUT) of the sensor. The difference between a reference signal (V.sub.RATIO) and the quiescent signal is amplified in an amplifier (206) to produce the control signal that adjusts the output signal to be proportional to the reference signal.

Abstract: A semiconductor light-emitting device having one or more depletion regions that are controlled by one or more control electrodes to vary the spatial distribution of the carriers in an active layer. The voltages on the control electrodes can be controlled to modulate the current density in the active layer and the output light intensity. The polarization of a surface emitting diode laser based on this device can be controlled or modulated.

Abstract: A first polysilicon film which contains phosphorus as an impurity is formed on a semiconductor substrate. A second polysilicon film which is higher in phosphorus concentration than the first polysilicon film is formed on the first polysilicon film. The second polysilicon film is anisotropically etched to expose a surface of the first polysilicon film. Thermal oxidation is then performed. A surface of the first polysilicon film and a surface of the second polysilicon film are oxidized according to their respective oxidization rates depending on their respective phosphorus concentrations. Thus, a semiconductor device in which the size of the gate electrode can be readily controlled and damage to the semiconductor substrate or the like can be suppressed, is obtained.

Abstract: In the MOS FET semiconductor device having a LDD structure, a polysilicon layer of which a side wall film is formed is provided, the polysilicon layer is made conductive by doping an impurity by ion-implantation. The side wall film of conductive polysilicon can be used as a wiring by applying voltages to the end portions of the side wall film. The side wall film can be used not only as a wiring, but also as a resistor layer. The side wall film may be formed on the side surface of a resistor layer. The side wall film can be used as a wiring by doping impurity into the side wall film by ion-implantation so as to make the side wall film conductive. By virtue of these structures, the semiconductor chip in the semiconductor device can be reduced in size.

Abstract: A semiconductor type yaw rate sensor has a substrate, a beam structure formed from a semiconductor material and having at least one anchor portion disposed on the substrate, a weighted portion located above the substrate a predetermined gap therefrom, and a beam portion which extends from the anchor portion and supports the weighted portion. A movable electrode is formed onto the weighted portion, and a fixed electrode is formed on the substrate in such a manner that the fixed electrode faces the movable electrode. When a drive voltage is applied between the movable electrode and the fixed electrode, the beam structure is forcibly caused to vibrate in a direction that is horizontal relative to a substrate surface plane. In this yaw rate sensor, a strain gauge to monitor forced vibration of the beam structure is formed in the beam portion. As a result, the forced vibration of the beam structure can be monitored with a simple structure.