Patents Examined by Xinning Niu
  • Patent number: 9716365
    Abstract: A fiber block is configured with a fiber block including a Nd-doped active fiber and a pump-light delivery fiber which has a stretch extending along the active fiber in a side-to-side configuration so as to lunch pump light into the Nd-doped core of the active fiber. The core of the active fiber is surrounded by at least one or more claddings which, like the core, have a double bottleneck cross-section with a relatively large-area central region and relatively small input and output regions. The pump light delivery fiber is structured to have a substantially dumbbell cross-section with a relatively small-area central region coextending with the central region of the active fibers. The active fiber is dimensioned so that the overall length of the active fiber is configured to provide for the maximal amplification of the laser signal in a 900 nm range while limiting amplification in the 1060 nm range to the preset threshold.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: July 25, 2017
    Assignee: IPG PHOTONICS CORPORATION
    Inventors: Valentin P Gapontsev, Ilia Zaytsev, Mikhail Vyatkin
  • Patent number: 9716364
    Abstract: An optically pumped semiconductor disk laser including a pump light source, at least one semiconductor body (2), which semiconductor body (2) has at least one window region (8), an active region (7) and a reflection device (P), which reflection device has at least one first P-reflection element (P1) for the pump wavelength. The first P-reflection element (P1) is embodied and arranged such that pump light emerging from the pump light source (3) can be guided for at least two passes through the active region (7). A total thickness of the active region (7) and of the window region (8) in the direction of an optical axis of the semiconductor disk laser is less than three times the laser wavelength in the active region (7).
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: July 25, 2017
    Assignee: Fraunhofer•Gesellschaft Zur Förderung der Angewandten Forschung E.V.
    Inventors: Tino Topper, Marcel Rattunde, Sebastian Kaspar, Joachim Wagner
  • Patent number: 9716367
    Abstract: The present disclosure relates to nitride based optoelectronic and electronic devices with Si CMOS. The disclosure provides a semiconductor device, comprising a sapphire substrate, and a laser region and a detector region deposed on the sapphire substrate. The laser is formed onto the substrate from layers of GaN, InGaN and optionally the AlGaN. The detector can be an InGaN detector. A waveguide may be interposed between the laser and detector regions coupling these regions. The semiconductor device allows integration of nitride base optoelectronic and electronic devices with Si CMOS. The disclosure also provides a method for making the semiconductor devices.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: July 25, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tymon Barwicz, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 9711947
    Abstract: A vertical cavity surface emitting laser (VCSEL) system and method of fabrication are included. The VCSEL system includes a first portion comprising a first mirror and a gain region to amplify an optical signal in response to a data signal, the first portion being fabricated on a first wafer. The system also includes a second portion comprising a second mirror that is partially-reflective to couple the optical signal to an optical fiber. The second portion can be fabricated on a second wafer. The system further includes a supporting structure to couple the first and second portions such that the first and second mirrors are arranged as a laser cavity having a predetermined length to resonate the optical signal.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: July 18, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Michael Renne Ty Tan, David A. Fattal, Jingjing Li, Raymond G. Beausoleil
  • Patent number: 9705288
    Abstract: A vertical external cavity surface emitting laser (VECSEL) structure includes a heterostructure and first and second reflectors. The heterostructure comprises an active region having one or more quantum well structures configured to emit radiation at a wavelength, ?lase, in response to pumping by an electron beam. One or more layers of the heterostructure may be doped. The active region is disposed between the first reflector and the second reflector and is spaced apart from the first reflector by an external cavity. An electron beam source is configured to generate the electron beam directed toward the active region. At least one electrical contact is electrically coupled to the heterostructure and is configured to provide a current path between the heterostructure and ground.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: July 11, 2017
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Wunderer, Noble M. Johnson, John E. Northrup
  • Patent number: 9704787
    Abstract: Disclosed is a power semiconductor package including a power transistor having a first power electrode and a gate electrode on its top surface and a second power electrode on its bottom surface. The second power electrode is configured for attachment to a partially etched leadframe segment, where the partially etched leadframe segment is attached to a substrate. A conductive clip is situated over the first power electrode and extends to the substrate in order to couple the first power electrode to the substrate without using a leadframe.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: July 11, 2017
    Assignee: Infineon Technologies Americas Corp.
    Inventor: Eung San Cho
  • Patent number: 9695500
    Abstract: A mask frame assembly including a frame including a first opening, a first mask including second openings that each has an area smaller than the first opening and a first surface having portions of the first surface connected to the frame. The mask frame assembly includes second masks disposed on a second surface of the first mask extending across the first opening in a first direction and arranged in a second direction that is substantially perpendicular. The second masks include pattern parts having a shape corresponding to the second openings. The pattern parts each include pattern holes configured to allow a deposition material to pass through. The second masks include a rib part disposed between the pattern parts. The rib part includes dummy holes each having an area greater than each of the pattern holes. The first mask is configured to block the deposition material passing through the dummy holes.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: July 4, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Junhyeuk Ko, Sangshin Lee
  • Patent number: 9691645
    Abstract: A workpiece holder includes a puck, first and second heating devices in thermal communication with respective inner and outer portions of the puck, and a thermal sink in thermal communication with the puck. The first and second heating devices are independently controllable, and the first and second heating devices are in greater thermal communication with the puck, than thermal communication of the thermal sink with the puck. A method of controlling temperature distribution of a workpiece includes flowing a heat exchange fluid through a thermal sink to establish a reference temperature to a puck, raising temperatures of radially inner and outer portions of the puck to first and second temperatures greater than the reference temperature, by activating respective first and second heating devices disposed in thermal communication with the radially inner and outer portions of the puck, and placing the workpiece on the puck.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: June 27, 2017
    Assignee: Applied Materials, Inc.
    Inventors: David Benjaminson, Dmitry Lubomirsky, Ananda Seelavanth Math, Saravanakumar Natarajan, Shubham Chourey
  • Patent number: 9685761
    Abstract: Described herein are lasers comprising an output port to output an optical signal, a plurality of waveguide segments forming an optical cavity length, and a resonant optical cavity comprising the optical cavity length, a gain medium included in the resonant optical cavity to amplify the optical signal, and a heating element disposed near at least two of the plurality of waveguide segments, the heating element controllable to adjust the phase of the optical signal by heating the waveguide segments. Described herein are optical devices comprising a first plurality of ports to output a plurality of optical signals, a second plurality of ports to receive the plurality of optical signals, and a plurality of coupling waveguides. The plurality of waveguide may comprise a pair of adjacent waveguides separated by a first distance, each of the pair of adjacent waveguides comprising a different width.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: June 20, 2017
    Assignee: Aurrion, Inc.
    Inventors: Erik Johan Norberg, Brian Koch, Gregory Alan Fish, Hyundai Park, Jared Bauters
  • Patent number: 9685587
    Abstract: A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist essentially of a corresponding donor or acceptor material.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: June 20, 2017
    Assignee: The Silanna Group Pty Ltd
    Inventor: Petar Atanackovic
  • Patent number: 9677533
    Abstract: An apparatus operates at least one light-emitting diode in the form of a laser diode. The light-emitting diode is interconnected in series with the load section of a controllable semiconductor element and a current measuring resistor between a first supply voltage terminal and a second supply voltage terminal. The supply voltage terminals are the output connections of a voltage-regulating circuit in the form of a DC voltage boost converter which provides a supply voltage), and wherein a current-regulating circuit is provided for the current through the at least one light-emitting diode, whose actuator is the controllable semiconductor element.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: June 13, 2017
    Assignee: Continental Automotive GmbH
    Inventor: Stephan Bolz
  • Patent number: 9673588
    Abstract: Techniques and architecture are disclosed for managing alkali vapor concentration in a lasing gas at non-condensing levels. In some instances, the disclosed techniques/architecture can be used to control and/or stabilize the concentration of alkali vapor in a lasing gas volume to any desired fraction of its saturation value under dynamically changing thermal loads. In some such instances, the concentration of alkali vapor in a given lasing gas volume can be maintained at a value which is sufficiently far from the saturation point to prevent or otherwise reduce condensation of the alkali vapor, for example, upon accelerating the lasing gas through a pressure drop into an optical pumping cavity of an alkali vapor laser system (e.g., such as a diode-pumped alkali laser, or DPAL, system). In some instances, the disclosed techniques/architecture can be used to establish a temperature gradient and/or an alkali vapor concentration gradient in the flowing lasing gas volume.
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: June 6, 2017
    Assignee: University of New Hampshire
    Inventors: F. William Hersman, David W. Watt
  • Patent number: 9673164
    Abstract: A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling is presented. The semiconductor device has a substrate on which a first circuit and a second circuit with inputs and outputs are formed proximate to each other. An isolation structure of electrically conductive material is located between components of the first and second circuits, the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. The isolation structure may be positioned on or over exterior surfaces of the semiconductor device housing or inside the housing. In one embodiment, the isolation structure includes a first leg extending transverse to the surface of the substrate and a first cross member connected to and projecting from the first leg over the substrate.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: June 6, 2017
    Assignee: NXP USA, INC.
    Inventors: Michael E. Watts, Shun Meen Kuo, Margaret A. Szymanowski
  • Patent number: 9666436
    Abstract: Provided are methods of forming an ion implanted region in a semiconductor device. The methods comprise: (a) providing a semiconductor substrate having a plurality of regions to be ion implanted; (b) forming a photoresist pattern on the semiconductor substrate, wherein the photoresist pattern is formed from a chemically amplified photoresist composition comprising a matrix polymer having acid labile groups, a photoacid generator and a solvent; (c) coating a descumming composition over the photoresist pattern, wherein the descumming composition comprises: a matrix polymer; a free acid; and a solvent; (d) heating the coated semiconductor substrate; (e) contacting the coated semiconductor substrate with a rinsing agent to remove residual descumming composition and scum from the substrate; and (f) ion implanting the plurality of regions of the semiconductor substrate using the photoresist pattern as an implant mask. The methods find particular applicability in the manufacture of semiconductor devices.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: May 30, 2017
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Cheng-Bai Xu, Cheng Han Wu, Dong Won Chung, Yoshihiro Yamamoto
  • Patent number: 9660010
    Abstract: An organic light emitting display device includes a substrate, a first insulating layer, a extension of a drain electrode, a second insulating layer, a first electrode, an emission layer, and a second electrode. The substrate has a display region and a transparent region. The first insulating layer is disposed on the substrate. The extension of drain electrode is disposed on the first insulating layer. The second insulating layer is disposed on the extension of a drain electrode such that an edge portion of the extension of a drain electrode is free from overlap with the second insulating layer. The first electrode is disposed on the second insulating layer and in contact with the edge portion of the extension of a drain electrode. The emission layer is disposed on the first electrode. The second electrode is disposed on the emission layer.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: May 23, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Ho Park, Joung-Keun Park, Ki-Wan Ahn, Joo-Sun Yoon, Seung-Min Lee, Yong-Jae Jang
  • Patent number: 9660151
    Abstract: A method for manufacturing a light emitting device has: forming a first phosphor layer including a first phosphor that is based on KSF or quantum dots on a light emitting element by a method other than spraying, and forming a second phosphor layer including a second phosphor that is different from the first phosphor on the first phosphor layer by spraying.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: May 23, 2017
    Assignee: NICHIA CORPORATION
    Inventor: Hiroto Tamaki
  • Patent number: 9659898
    Abstract: Embodiments of the present disclosure are directed towards apparatuses, systems, and methods for die attach coatings for semiconductor packages. In one embodiment, a die may be coupled with a substrate by a die attach and a coating may be applied to an edge of the die attach.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: May 23, 2017
    Assignee: Qorvo US, Inc.
    Inventors: Tarak A. Railkar, Kevin J. Anderson, Walid Meliane, John M. Beall
  • Patent number: 9660409
    Abstract: A laser for generating deep ultra-violet (DUV) continuous wave (CW) light includes a second-harmonic generator and a fourth-harmonic generator. The fourth-harmonic generator includes a plurality of mirrors as well as a first non-linear optical (NLO) crystal and a pair of tilted plates. The first NLO crystal generates the light having the fourth harmonic wavelength and a first astigmatism, and is placed in operative relation to the plurality of mirrors. The pair of tilted plates is placed in operative relation to the first NLO crystal such that the light having the second harmonic wavelength passes through both of the tilted plates. Notably, the pair of tilted plates are disposed at substantially equal and opposite angles about respective parallel axes such that they introduce a second astigmatism that corrects for the first astigmatism while minimizing displacement of the circulated light.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: May 23, 2017
    Assignee: KLA-Tencor Corporation
    Inventor: Yung-Ho Chuang
  • Patent number: 9653546
    Abstract: A manufacturing method of a nanowire structure includes the following steps. A fin and a shallow trench isolation (STI) are formed on a substrate. A first patterned insulation layer is formed on an exposed upper part of the fin. The STI is then recessed for exposing a lower part of the fin. A second patterned insulation layer is formed in second regions for covering the first patterned insulation layer and the exposed part of the fin. The lower part of the fin is then removed for forming an upper fin and a lower fin in a first region. The STI is further recessed for exposing a portion of the lower fin and a portion of the fin in the second regions. The first patterned insulation layer on the first region is removed, and the upper fin is converted into a first nanowire.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: May 16, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Hsueh-Hao Shih
  • Patent number: 9653299
    Abstract: A first laser pulse emitted from a semiconductor laser oscillator and having a first pulse width is entered onto a second surface of a semiconductor substrate in which a semiconductor device is formed on a first surface and dopants are added to a surface layer portion on the second surface side. A second laser pulse having a second pulse width less than or equal to 1/10 of the first pulse width is entered on an incident area of the first laser pulse in an overlapping manner. The relative positional relationship on a time axis between falling time of the first laser pulse and rising time of the first laser pulse is set such that the temperature of the first surface, which rises due to the incidence of the first laser pulse and the second laser pulse, does not exceed an allowable upper limit value which is predetermined.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: May 16, 2017
    Assignee: SUMITOMO HEAVY INDUSTRIES, LTD.
    Inventor: Naoki Wakabayashi