Abstract: A device includes a vertical stack of semiconductor nanostructures, a gate structure, a first epitaxial region and a dielectric structure. The gate structure wraps around the semiconductor nanostructures. The first epitaxial region laterally abuts a first semiconductor nanostructure of the semiconductor nanostructures. The dielectric structure laterally abuts a second semiconductor nanostructure of the semiconductor nanostructures and vertically abuts the first epitaxial region.

Abstract: A semiconductor device, and a method of manufacturing, is provided. A dummy gate is formed on a semiconductor substrate. An interlayer dielectric (ILD) is formed over the semiconductor fin. A dopant is implanted into the ILD. The dummy gate is removed and an anneal is performed on the ILD. The implantation and the anneal lead to an enhancement of channel resistance by a reduction in interlayer dielectric thickness and to an enlargement of critical dimensions of a metal gate.

Abstract: A driving mechanism is provided, including a fixed part, a movable part, and a driving assembly. The movable part is movably connected to the fixed part for holding an optical element, wherein the optical element defines an optical axis. The driving assembly is configured to drive the movable part to move relative to the fixed part.

Abstract: A method and a system for recording an integrated circuit version are provided. The method is adapted to a register in an integrated circuit, which includes the following steps: recording the integrated circuit version with N bits, in which N is an integer greater than 1; and amending only a bit value of at least one bit selected from the N bits that have not been used for denoting any past integrated circuit version each time when the integrated circuit is revised.

Abstract: Provided is a memory device including a substrate, a plurality of word-line structures, a plurality of cap structures, and a plurality of air gaps. The word-line structures are disposed on the substrate. The cap structures are respectively disposed on the word-line structures. A material of the cap structures includes a nitride. The nitride has a nitrogen concentration decreasing along a direction near to a corresponding word-line structure toward far away from the corresponding word-line structure. The air gaps are respectively disposed between the word-line structures. The air gaps are in direct contact with the word-line structures. A method of forming a memory device is also provided.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: A device includes a substrate, first and second gate structures, first and second hybrid fins, and first and second sidewalls. The first gate structure is over and surrounds a first vertical stack of nanostructures. The second gate structure is over and surrounds a second vertical stack of nanostructures. The second gate structure and the first gate structure extend along a first direction, and are laterally separated from each other in a second direction, the second direction being substantially perpendicular to the first direction. The first hybrid fin extends through and under the first gate structure and the second gate structure, the extending being along the second direction. The second hybrid fin is between the first gate structure and the second gate structure. The second hybrid fin has: a first sidewall that abuts the first gate structure; and a second sidewall that abuts the second gate structure.

Abstract: An actuator and a transmission structure thereof. The transmission structure (3) includes a screw nut (31) and a ratchet guiding sleeve (32). The screw nut (31) includes one or a plurality of pawls (311). The ratchet guiding sleeve (32) is mounted on the screw nut (31), and the screw nut (31) is able to rotate relative to the ratchet guiding sleeve (32). The ratchet guiding sleeve (32) includes a ring ratchet (321) disposed on an inner circumference thereof and a plurality of track slots (322) disposed on an outer circumference thereof. One or a plurality of pawls (311) abut against the ring ratchet (321), thereby achieving the effect of smooth movements of the actuator (10) and the transmission structure (3).

Abstract: A method includes forming an active fin using a hard mask as an etching mask, wherein the active fin comprises a source region, a drain region, and a channel region, the hard mask remains over the active fin after etching the semiconductive substrate, and the hard mask has a first portion vertically overlapping the source region of the active fin, a second portion vertically overlapping the channel region of the active fin, and a third portion vertically overlapping the drain region of the active fin. A sacrificial gate is formed over the second portion of the hard mask and the channel region of the active fin. The first and third portions of the hard mask are etched. After etching the first and third portions of the hard mask, a gate spacer is formed extending along sidewalls of the sacrificial gate, and the sacrificial gate is replaced with a replacement gate.

Abstract: An optical element driving mechanism includes a fixed portion, a movable portion, a driving assembly, and a circuit assembly. The movable portion is connected to the optical element and is movable relative to the fixed portion. The driving assembly drives the movable portion to move relative to the fixed portion. The circuit assembly is connected to the driving assembly. The driving assembly is electrically connected to an external circuit via the circuit assembly.

Abstract: A semiconductor structure according to the present disclosure includes a buried oxide layer, a first dielectric layer disposed over the buried oxide layer, a first waveguide feature disposed in the first dielectric layer, a second dielectric layer disposed over the first dielectric layer and the first waveguide feature, a third dielectric layer disposed over the second dielectric layer, and a second waveguide feature disposed in the second dielectric layer and the third dielectric layer. The second waveguide feature is disposed over the first waveguide feature and a portion of the second waveguide feature vertically overlaps a portion of the first waveguide feature.

Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device structure includes a plurality of first nanostructures stacked over a substrate in a vertical direction. The semiconductor device structure also includes a first bottom layer formed adjacent to the first nanostructures, and a first dielectric liner layer formed over the first bottom layer and adjacent to the first nanostructures. The semiconductor device structure further includes a first source/drain (S/D) structure formed over the first dielectric liner layer, and the first S/D structure is isolated from the first bottom layer by the first dielectric liner layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes an isolation structure formed over a substrate, and a first stacked structure and a second stacked structure extending above the isolation structure. The first stacked structure includes a plurality of first nanostructures stacked in a vertical direction, and the second stacked structure includes a plurality of second nanostructures stacked in the vertical direction. The semiconductor device structure includes a first dummy fin structure formed over the isolation structure, and the first dummy fin structure is between the first stacked structure and the second stacked structure. The semiconductor device structure also includes a first capping layer formed over the first dummy fin structure, and an interface between the first dummy fin structure and the first capping layer is lower than a top surface of a topmost first nanostructure.

Abstract: A semiconductor device package includes a first substrate, a second substrate, a conductive structure, a first solder and a second solder. The second substrate is disposed over the first substrate. The conductive structure is disposed between the first substrate and the second substrate. The conductive structure includes a first wetting portion, a second wetting portion, and a non-wetting portion disposed between the first wetting portion and the second wetting portion. The first solder covers the first wetting portion and connects the conductive structure to the first substrate. The second solder covers the second wetting portion and connects the conductive structure to the second substrate. The first solder is spaced apart from the second solder by the non-wetting portion.

Abstract: A linear actuator (1) and the centrifugal safety device (50) thereof is disclosed. The safety device (50) includes an outer socket (51) having a stop portion (512) and a first accommodation portion (513), an inner socket (53) having a raised portion (531) and a second accommodation portion (532) and a centrifugal assembly (55) having a centrifugal block (551) and an elastic element (555). The inner socket (53) drives the centrifugal assembly (55) to rotate. If the centrifugal force of the centrifugal block (551) is smaller than the elasticity of the elastic element (555), then the centrifugal block (551) is limited in the second accommodation portion (532) by the elastic element (555), or else the centrifugal block (551) moves into the first accommodation portion (513) and clamped by the raised portion (531) and the stop portion (512).

Abstract: This invention generally relates to a composition and its method of use for inducing adult stem cell (ASC) expansion and/or derivation in vitro, using miR-302-like pre-miRNAs, shRNAs and/or siRNAs, all of which contain a shared sequence of 5?-UAAGUGCUUC CAUGUUU-3? (SEQ ID NO: 7) in the 5?-end, and further in conjunction with the use of some wound-healing-related defined factors, including but not limited to basic fibroblast growth factor (bFGF)/fibroblast growth factor 2 (FGF-2), leukemia inhibitory factor (LIF), insulin-like growth factor (IGF), Epidermal growth factor (EGF), platelet-derived growth factor (PDGF), vascular endothelial growth factor (VEGF), transforming growth factor (TGF), tumor necrosis factor (TNF), stem cell factor (SCF), homeobox proteins (HOX), Notch, GSK, Wnt/beta-Catenin signals, interleukins, and/or bone morphogenetic proteins (BMPs).

Abstract: A test kit for testing a device under test (DUT) includes a socket structure for containing the DUT. The DUT includes an antenna and radiates a RF signal. The test kit further includes a reflector having a lower surface. The RF signal emitted from the antenna of the DUT is reflected by the reflector and a reflected RF signal is received by the antenna of the DUT.

Abstract: A method that includes (a) receiving a training dataset, a testing dataset, a number of iterations, and a parameter space of possible parameter values that define a base model, (b) for the number of iterations, performing a parametric search process that produces a report that includes information concerning a plurality of machine learning models, where the parametric search process includes (i) generating a Bayesian optimized parameter space with an option to validate through Stratified Kfold cross validation, where an optimized parameter set includes training data from the training dataset, and testing data from the testing dataset, (ii) running the base model with the final optimized parameter set, thus yielding model results for the plurality of machine learning models, (iii) calculating Kolmogorov-Smirnov (KS) statistics for the model results, and (iv) saving the model results and the KS statistics to the report, and (c) sending the report to a user device.

Abstract: A method of forming a semiconductor transistor device. The method comprises forming a channel structure over a substrate and forming a first source/drain structure and a second source/drain structure on opposite sides of the fin structure. The method further comprises forming a gate structure surrounding the fin structure. The method further comprises flipping and partially removing the substrate to form a back-side capping trench while leaving a lower portion of the substrate along upper sidewalls of the first source/drain structure and the second source/drain structure as a protective spacer. The method further comprises forming a back-side dielectric cap in the back-side capping trench.

Abstract: Methods of fabricating optical devices with high refractive index materials are disclosed. The method includes forming a first oxide layer on a substrate and forming a patterned template layer with first and second trenches on the first oxide layer. A material of the patterned template layer has a first refractive index. The method further includes forming a first portion of a waveguide and a first portion of an optical coupler within the first and second trenches, respectively, forming a second portion of the waveguide and a second portion of the optical coupler on a top surface of the patterned template layer, and depositing a cladding layer on the second portions of the waveguide and optical coupler. The waveguide and the optical coupler include materials with a second refractive index that is greater than the first refractive index.