Abstract: A method of independently forming source/drain regions in NMOS regions including nanosheet field-effect transistors (NSFETs), NMOS regions including fin field-effect transistors (FinFETs) PMOS regions including NSFETs, and PMOS regions including FinFETs and semiconductor devices formed by the method are disclosed. In an embodiment, a device includes a semiconductor substrate; a first nanostructure over the semiconductor substrate; a first epitaxial source/drain region adjacent the first nanostructure; a first inner spacer layer adjacent the first epitaxial source/drain region, the first inner spacer layer comprising a first material; a second nanostructure over the semiconductor substrate; a second epitaxial source/drain region adjacent the second nanostructure; and a second inner spacer layer adjacent the second epitaxial source/drain region, the second inner spacer layer comprising a second material different from the first material.

Abstract: The present invention provides a circular connector, which comprises a male head and a female seat. The male head provides a first circular body, a third circular body, a first electrode group and a third electrode group. The female seat provides a first base, a second circular body, a fourth circular body, a second base, a second electrode group and a fourth electrode group. The second base, the fourth circular body, the second circular body and the first base are arranged outwards from the center point of the female seat. The male head is combined with the female base, so that the third circular body is inserted between the second circular body and the fourth circular body to realize non-directional electrical connection.

Abstract: The present disclosure provides a method of forming a semiconductor structure with a metal gate. The semiconductor structure is formed by first fabricating fins over a semiconductor substrate, followed by a formation of a source and a drain recess. A source and a drain region may then be deposited into the source and the drain recess. The gate structure may be deposited into the region between the fins. The gate structure includes dielectric and metallic layers. In the regions between the fins, the gate structure is isolated from the source and the drain region by an insulating layer.

Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming a fin structure on a substrate; forming a dummy gate over the fin structure; forming spacers on sides of the dummy gate; forming a doped region within the fin structure; replacing the dummy gate with a metal gate; replacing an upper portion of the metal gate with a first dielectric layer; forming a conductive layer directly on the doped region; replacing an upper portion of the conductive layer with a second dielectric layer; removing the first dielectric layer thereby exposing a sidewall of the spacer; removing an upper portion of the spacer to thereby expose a sidewall of the second dielectric layer; removing at least a portion of the second dielectric layer to form a trench; and forming a conductive plug in the trench.

Abstract: A fixing mechanism for a lifting device is provided. The lifting device includes a motor and a transmission shaft driven by the motor. The fixing mechanism includes a support body, a fixing assembly, a bearing, and a connection assembly. The fixing assembly includes a base plate fixed above the support body and a chamber disposed between the base plate and the support body. A bearing is arranged in the chamber and clamped between the support body and the base plate, and the transmission shaft passes through the bearing and protrudes from the base plate. The connection assembly is sleeved on the transmission shaft to together connect with the motor. Accordingly, power transmission efficiency may be improved, and vibration and noise generated during operation of the motor may be reduced.

Abstract: A nanoFET transistor includes doped channel junctions at either end of a channel region for one or more nanosheets of the nanoFET transistor. The channel junctions are formed by a iterative recessing and implanting process which is performed as recesses are made for the source/drain regions. The implanted doped channel junctions can be controlled to achieve a desired lateral straggling of the doped channel junctions.

Abstract: A semiconductor structure includes a semiconductor device, a plurality of through semiconductor vias (TSV), a first seal ring, and a second seal ring. The TSVs penetrate through the semiconductor device. The TSVs are adjacent to an edge of the semiconductor device. The first seal ring is disposed on and physically connected to one end of each of the TSVs. The second seal ring is disposed on and physically connected to another end of each of the TSVs.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a stack of semiconductor layers spaced apart from and aligned with each other, a first source/drain epitaxial feature in contact with a first one or more semiconductor layers of the stack of semiconductor layers, and a second source/drain epitaxial feature disposed over the first source/drain epitaxial feature. The second source/drain epitaxial feature is in contact with a second one or more semiconductor layers of the stack of semiconductor layers. The structure further includes a first dielectric material disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature and a first liner disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature. The first liner is in contact with the first source/drain epitaxial feature and the first dielectric material.

Abstract: An antenna structure with wide radiation bandwidth in a reduced physical space includes a housing, a first feed portion, and a second feed portion. The housing includes a metallic side frame, a metallic middle frame, and a metallic back board. The metallic side frame defines a first gap and a second gap. The metallic back board defines a slot. The slot, the first and second gaps divide a first radiation portion and a second radiation from the metallic side frame. The first feed portion is electrically connected to the first radiation portion. The second feed portion is electrically connected to the second radiation portion. The metallic middle frame and the metallic back board are connected to each other to form a system ground plane to provide a ground for the antenna structure.

Abstract: A tamper-proof screw includes a main body, a pin body, a ball, and at least one abutting member. A through hole is provided in the main body. The pin body is movably disposed in the through hole. The ball is located in the through hole. The abutting member is located in the through hole and has a connecting end and a free end opposite to each other. The connecting end is disposed on an inner wall of the main body and located between the ball and the free end. The ball is located between the pin body and the abutting member. When the pin body moves in the through hole to push the ball to press against the connecting end of the abutting member, the abutting member pivots around the connecting end to allow the free end to extend outwards from the main body.

Abstract: A semiconductor device according to the present disclosure includes an active region including a channel region and a source/drain region adjacent the channel region, a vertical stack of channel members over the channel region, a gate structure over and around the vertical stack of channel members, a bottom dielectric feature over the source/drain region, a source/drain feature over the bottom dielectric feature, and a germanium layer disposed between the bottom dielectric feature and the source/drain region.

Abstract: The invention provides an easy lock connector with unlock structure applied to a flat wire and a circuit board. The flat wire has a notch and a ground wire on the two sides of a head end respectively. The easy-lock connector includes an upper housing, a lower housing, a rubber core and a terminal. After the notch of the flat wire is buckled by a stopper of the lower housing, by pressing a pressing member of the upper housing, the pressing member applies an external force to an elastic member of the lower housing to deform the elastic member. An extension arm of the lower housing is linked by the elastic member to cause the stopper to act in one direction so as to release the state of the stopper from locking the gap. In another embodiment, the easy-lock connector can also achieve an electromagnetic shielding effect by adding a shielding iron shell.

Abstract: An automatic detection circuit for an integrated circuit and an automatic detection method for the same are provided. The automatic detection circuit is suitable for a system-on-chip (SoC). A control unit of the automatic detection circuit enters an automatic detection mode to: switch a first dynamic switching circuit to connect a main bus to a virtual host circuit; switch a second dynamic switching circuit to connect memory interfaces and intellectual property circuit to a virtual input and output circuit; send detection vectors to the virtual host circuit to set and activate the memory interfaces and the intellectual property circuits; send the detection vectors to the virtual I/O circuit to replace external memory and external equipment for sending and receiving signals; and compare signals received by the virtual host circuit or signals received by the virtual input and output circuit with predetermined signal data to generate a detection result.

Abstract: This invention generally relates to a group of novel chemical compositions and their use for formulating RNA- and/or DNA-based medicine drugs/vaccines into stable compound complexes useful for both in-vitro and in-vivo delivery. Particularly, the present invention teaches the synthesis of a group of novel trimethylglycyl chemicals and their use for formulating cosmetic, therapeutic- and/or pharmaceutical-grade nucleic acid compositions, including but not limited microRNA precursors (pre-miRNA/miRNA), small hairpin RNAs (shRNA), short interfering RNAs (siRNA), ribozymes, antisense oligonucleotides, RNA-DNA hybrids and DNA-based vectors/vaccines, with or without modification, into delivery complexes, which can then be absorbed by cells in vivo, ex vivo and/or in vitro through an active mechanism of endocytosis via acetylcoline receptors for releasing the therapeutic and pharmaceutical effects of the formulated nucleic acid compositions.

Abstract: A method of fabricating a device includes forming a dummy gate over a plurality of fins. Thereafter, a first portion of the dummy gate is removed to form a first trench that exposes a first hybrid fin and a first part of a second hybrid fin. The method further includes filling the first trench with a dielectric material disposed over the first hybrid fin and over the first part of the second hybrid fin. Thereafter, a second portion of the dummy gate is removed to form a second trench and the second trench is filled with a metal layer. The method further includes etching-back the metal layer, where a first plane defined by a first top surface of the metal layer is disposed beneath a second plane defined by a second top surface of a second part of the second hybrid fin after the etching-back the metal layer.

Abstract: A semiconductor device package includes a display device, an encapsulation layer disposed in direct contact with the display device, and a reinforced structure surrounded by the encapsulation layer. The reinforced structure is spaced apart from a surface of the display device. A method of manufacturing a semiconductor device package is also disclosed.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device includes a semiconductor fin projecting from a substrate. Semiconductor nanostructures are disposed over the semiconductor fin. A gate electrode is disposed over the semiconductor fin and around the semiconductor nanostructures. A dielectric fin is disposed over the substrate. A dielectric structure is disposed over the dielectric fin. An upper surface of the dielectric structure is disposed over the upper surface of the gate electrode. A dielectric layer is disposed over the substrate. The dielectric fin laterally separates both the gate electrode and the semiconductor nanostructures from the dielectric layer. An upper surface of the dielectric layer is disposed over the upper surface of the gate electrode structure and the upper surface of the dielectric structure. A lower surface of the dielectric layer is disposed below the upper surface of the dielectric fin.

Abstract: The present invention provides a circular connector, which comprises a male head and a female seat. The male head provides a first circular body, a third circular body, a first electrode group and a third electrode group. The female seat provides a first base, a second circular body, a fourth circular body, a second base, a second electrode group and a fourth electrode group. The second base, the fourth circular body, the second circular body and the first base are arranged outwards from the center point of the female seat. The male head is combined with the female base, so that the third circular body is inserted between the second circular body and the fourth circular body to realize non-directional electrical connection.

Abstract: A semiconductor device includes a first device fin and a second device fin that are each located in a first region of the semiconductor device. The first region has a first pattern density. A first dummy fin is located in the first region. The first dummy fin is disposed between the first device fin and the second device fin. The first dummy fin has a first height. A third device fin and a fourth device fin are each located in a second region of the semiconductor device. The second region has a second pattern density that is greater the first pattern density. A second dummy fin is located in the second region. The second dummy fin is disposed between the third device fin and the fourth device fin. The second dummy fin has a second height that is greater than the first height.

Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.