Abstract: A switch and a scheduling method for packet forwarding of the same are provided. The switch includes a plurality of absorb queues, a plurality of egress ports, and an absorb scheduler. Each of the egress ports includes a plurality of egress queues that are respectively connected to one of the absorb queues that are different from one another. The scheduling method includes: generating a priority state for each of the egress queues of each of the egress ports; a packet forwarding priority state of each of the absorb queues is determined according to the priority state of each of the egress queues connected thereto; and the absorb scheduler selecting one of the absorb queues to send a packet stored therein to a target egress queue of a target egress port to be sent to, according to the priority state of each of the egress queues.

Abstract: A method of independently forming source/drain regions in NMOS regions including nanosheet field-effect transistors (NSFETs), NMOS regions including fin field-effect transistors (FinFETs) PMOS regions including NSFETs, and PMOS regions including FinFETs and semiconductor devices formed by the method are disclosed. In an embodiment, a device includes a semiconductor substrate; a first nanostructure over the semiconductor substrate; a first epitaxial source/drain region adjacent the first nanostructure; a first inner spacer layer adjacent the first epitaxial source/drain region, the first inner spacer layer comprising a first material; a second nanostructure over the semiconductor substrate; a second epitaxial source/drain region adjacent the second nanostructure; and a second inner spacer layer adjacent the second epitaxial source/drain region, the second inner spacer layer comprising a second material different from the first material.

Abstract: The present disclosure describes an inner spacer structure for a semiconductor device and a method for forming the same. The method for forming the inner spacer structure in the semiconductor device can include forming a vertical structure over a substrate, forming a gate structure over a portion of the vertical structure, exposing sidewalls of the portion of the vertical structure, forming multiple spacers over the sidewalls of the portion of the vertical structure, and forming a void in each of the multiple spacers.

Abstract: An electronic system including a display device, an image sensor, a face detection engine, an eye detection engine and an eye protection engine is provided. The image sensor captures an image. The face detection engine recognizes a user face in the image. The eye detection engine recognizes user eyes in the image. The eye protection engine turns off the display device when the user eyes are recognized in the image but the user face is not recognized in the image.

Abstract: The tri-axis close-loop feedback controlling module for electromagnetic lens driving device includes a 6-pin Hall element. Two pins of the Hall element are coupled to an auto-focus module for providing a current to drive the auto-focus module to conduct auto-focusing operations along the Z-axis; while other four pins of the Hall element are coupled to a control unit. The control unit detects the X-Y axial positions of the auto-focus module relative to an OIS module and generates a control signal which is then sent to the Hall element. Therefore, the Hall element not only can provide its own feedback controlling function according to the Z-axial position of lens, but also can drive the auto-focus module based on the control signal corresponding to the X-Y axial positions of the auto-focus module, so as to achieve the goal of tri-axis close-loop feedback controlling for the electromagnetic lens driving device.

Abstract: A method for manufacturing a semiconductor structure is provided. The method includes forming a plurality of fin structures extending along a first direction over a substrate, forming a low-k isolation strip over the substrate, the low-k isolation strip extending along the first direction and between the plurality of fin structures; and forming a high-k isolation strip on top of the low-k isolation strip.

Abstract: A floating connector includes a shell, a plurality of electrodes, two buckle members and a floating member. The shell has an accommodating space and a plurality of openings. The electrodes are disposed in the accommodating space and penetrate the openings to protrude from the openings. The buckle members are respectively disposed on two sides of the accommodating space. Each of the buckle members includes a fixed part, a contacting part, and an elastic part. The floating member includes a body, a plurality of electrode notches, and a bump. The electrode notches are formed on one side of the body that near the electrodes for receiving the electrodes protruding from the openings. The bump is disposed on the body and correspondingly to the notch, and the width of the bump is not greater than that of the notch, so that the bump is restricted in the notches by the guiding structure.

Abstract: A semiconductor device according to the present disclosure includes an active region including a channel region and a source/drain region adjacent the channel region, a vertical stack of channel members over the channel region, a gate structure over and around the vertical stack of channel members, a bottom dielectric feature over the source/drain region, a source/drain feature over the bottom dielectric feature, and a germanium layer disposed between the bottom dielectric feature and the source/drain region.

Abstract: Provided is a memory device including a substrate, a plurality of word-line structures, a plurality of cap structures, and a plurality of air gaps. The word-line structures are disposed on the substrate. The cap structures are respectively disposed on the word-line structures. A material of the cap structures includes a nitride. The nitride has a nitrogen concentration decreasing along a direction near to a corresponding word-line structure toward far away from the corresponding word-line structure. The air gaps are respectively disposed between the word-line structures. The air gaps are in direct contact with the word-line structures. A method of forming a memory device is also provided.

Abstract: A method of fabricating a device includes providing a fin having a plurality of channel layers and a plurality of multilayer epitaxial layers interposing the plurality of channel layers. The multilayer epitaxial layers include a first epitaxial layer interposed between second and third epitaxial layers. The first epitaxial layer has a first etch rate and the second and third epitaxial layers have a second etch rate greater than the first etch rate. The method further includes laterally etching the first, second, and third epitaxial layers to provide a convex sidewall profile on opposing lateral surfaces of the multilayer epitaxial layers. The method further includes forming an inner spacer between adjacent channel layers. The inner spacer interfaces the convex sidewall profile of the multilayer epitaxial layers along a first inner spacer sidewall surface. The method further includes replacing the multilayer epitaxial layers with a portion of a gate structure.

Abstract: An establishing method of a retinal layer thickness detection model includes following steps. A reference database is obtained, and an image pre-processing step, a feature selecting step, a training step and a confirming step are performed. The reference database includes reference optical coherence tomographic images. In the image pre-processing step, the reference optical coherence tomographic images are duplicated and cell segmentation lines of retinal layers are marked to obtain control optical coherence tomographic images. In the feature selecting step, the reference optical coherence tomographic images are analyzed to obtain reference image features. The training step is to train with the reference image features and obtain the retinal layer thickness detection model.

Abstract: A nanoFET transistor includes doped channel junctions at either end of a channel region for one or more nanosheets of the nanoFET transistor. The channel junctions are formed by a iterative recessing and implanting process which is performed as recesses are made for the source/drain regions. The implanted doped channel junctions can be controlled to achieve a desired lateral straggling of the doped channel junctions.

Abstract: A HDMI apparatus is provided. The HDMI apparatus includes a first audio/video transceiver (A/V transceiver) configured to transmit an optical A/V signal to a second A/V transceiver; and a first sideband transceiver configured to drive a first laser diode to transmit a first optical sideband signal including a first control information or a first power information; wherein the first control information or the first power information is converted by a first Serializer/Deserializer (SERDES).

Abstract: A semiconductor device according to the present disclosure includes an active region including a channel region and a source/drain region adjacent the channel region, a vertical stack of channel members over the channel region, a gate structure over and around the vertical stack of channel members, a bottom dielectric feature over the source/drain region, a source/drain feature over the bottom dielectric feature, and a germanium layer disposed between the bottom dielectric feature and the source/drain region.

Abstract: Embodiments of an ion cryo-implantation process utilize a post implantation heating stage to heat the implanted wafer while under the heavy vacuum used during cryo-implantation. The implanted wafer is then transferred to load locks which are held at a lesser vacuum than the heavy vacuum.

Abstract: An integrated circuit includes a substrate, a dielectric layer over the substrate, a plurality of cells, a plurality of spacers and a plurality of conductive particles. Each of the cells includes a bottom portion in the dielectric layer and an upper portion protruding from the dielectric layer. The spacers are disposed over the dielectric layer and partially cover the upper portions of the cells, respectively. The spacers are disconnected from each other, and cover a first area of the dielectric layer and expose a second area of the dielectric layer. The conductive particles are disposed between the first area of the dielectric layer and the spacers.

Abstract: A semiconductor device package includes a first substrate, a second substrate, a conductive structure, a first solder and a second solder. The second substrate is disposed over the first substrate. The conductive structure is disposed between the first substrate and the second substrate. The conductive structure includes a first wetting portion, a second wetting portion, and a non-wetting portion disposed between the first wetting portion and the second wetting portion. The first solder covers the first wetting portion and connects the conductive structure to the first substrate. The second solder covers the second wetting portion and connects the conductive structure to the second substrate. The first solder is spaced apart from the second solder by the non-wetting portion.

Abstract: A replication list table structure for multicast packet replication is provided. The replication list table structure includes a plurality of entries. Each one of the plurality of entries includes a first field, a second field, a third field and a fourth field. For each one of the plurality of entries, the first field is used to declare whether the entry is an end of a program execution, the second field is used to declare the fourth field as a first type field for indicating a switch how to modify a header of a multicast packet, or as a second type field for indicating the switch, while reading the list, to jump to another one of the plurality entries, and the third field is preset to the first type field for indicating the switch how to modify the header of the multicast packet.

Abstract: A semiconductor device package includes a display device, an encapsulation layer disposed in direct contact with the display device, and a reinforced structure surrounded by the encapsulation layer. The reinforced structure is spaced apart from a surface of the display device. A method of manufacturing a semiconductor device package is also disclosed.

Abstract: In one or more embodiments, a semiconductor package device includes a substrate, a trace, a structure, a barrier element and an underfill. The substrate has a first surface including a filling region surrounded by the trace. The structure is disposed over the filling region and electrically connected to the substrate. The barrier element is disposed on the trace. The underfill is disposed on the filling region.