Abstract: A fin structure suitable for a FinFET and having a buried insulator layer is disclosed. In an exemplary embodiment, a semiconductor device comprises a substrate with a first semiconductor material and having a fin structure formed thereupon. The fin structure includes a lower region proximate to the substrate, a second semiconductor material disposed on the lower region, a third semiconductor material disposed on the second semiconductor material, and an insulating material selectively disposed on the second semiconductor material such that the insulating material electrically isolates a channel region of the fin structure and further such that the insulating material exerts a strain on the channel region. The semiconductor device further comprises an isolation feature disposed adjacent to the fin structure.

Abstract: Systems and methods are provided for fabricating semiconductor device structures on a substrate. For example, a substrate including a first region and a second region is provided. One or more first semiconductor device structures are formed on the first region. One or more semiconductor fins are formed on the second region. One or more second semiconductor device structures are formed on the semiconductor fins. A top surface of the semiconductor fins is higher than a top surface of the first semiconductor device structures.

Abstract: A fin structure of a semiconductor device, such as a fin field effect transistor (FinFET), and a method of manufacture, is provided. In an embodiment, trenches are formed in a substrate, and a liner is formed along sidewalls of the trenches, wherein a region between adjacent trenches define a fin. A dielectric material is formed in the trenches. Portions of the semiconductor material of the fin are replaced with a second semiconductor material and a third semiconductor material, the second semiconductor material having a different lattice constant than the substrate and the third semiconductor material having a different lattice constant than the second semiconductor material. Portions of the second semiconductor material are oxidized.

Abstract: A method for forming an antifuse on a substrate is provided, which comprises: forming a first conductive material on the substrate; placing the first conductive material in an electrolytic solution; performing anodic oxidation on the first conductive material to form a nanowire made of the first conductive material and surrounded by a first dielectric material formed during the anodic oxidation and to form the antifuse on the nanowire; and forming a second conductive material on the antifuse to sandwich the antifuse between the first conductive material and the second conductive material.

Abstract: An integrated circuit device includes a semiconductor substrate, insulation regions extending into the semiconductor substrate, and a semiconductor fin protruding above the insulation regions. The insulation regions include a first portion and a second portion, with the first portion and second portion on opposite sides of the semiconductor fin. The integrated circuit device further includes a gate stack on a top surface and sidewalls of the semiconductor fin, and a semiconductor region connected to an end of the semiconductor fin. The semiconductor region includes a first semiconductor region formed of a first semiconductor material, wherein the first semiconductor region comprise faceted top surfaces, and a second semiconductor region underlying the first semiconductor region. The second semiconductor region has a higher germanium concentration than the first semiconductor region.

Abstract: A device comprises a substrate comprising silicon, a fin structure comprising a lower portion formed of silicon and enclosed by an isolation region, a middle portion formed of silicon-germanium-carbon, wherein the middle portion is enclosed by an oxide layer, an upper portion formed of silicon, wherein the upper portion comprises a channel and a silicon-carbon layer formed between the middle portion and the upper portion, a first source/drain region comprising a first silicon-phosphorus region and a first silicon-carbon layer formed underlying the first silicon-phosphorus region and a second source/drain region comprising a second silicon-phosphorus region and a second silicon-carbon layer formed underlying the second silicon-phosphorus region.

Abstract: Systems and methods are provided for annealing a semiconductor structure. For example, a semiconductor structure is provided. An energy-converting material capable of increasing the semiconductor structure's absorption of microwave radiation is provided. A heat reflector is provided between the energy-converting material and the semiconductor structure, the heat reflector being capable of reflecting thermal radiation from the semiconductor structure. Microwave radiation is applied to the energy-converting material and the semiconductor structure to anneal the semiconductor structure for fabricating semiconductor devices.

Abstract: The disclosure relates to a field effect transistor. An exemplary structure for a field effect transistor comprises a substrate; a source region and a drain region disposed in the substrate; a gate structure over the substrate comprising sidewalls and a top surface, wherein the gate structure interposes the source region and the drain region; a contact etch stop layer (CESL) over at least a portion of the top surface of the gate structure; an interlayer dielectric layer over the CESL; a gate contact extending through the interlayer dielectric layer; and a source contact and a drain contact extending through the interlayer dielectric layer, wherein a first distance between an edge of the source contact and a first corresponding edge of the CESL is about 1 nm to about 10 nm.

Abstract: A semiconductor device and method of formation are provided herein. A semiconductor device includes a barrier including carbon over a fin, the fin including a doped region. The semiconductor device includes an epitaxial (Epi) cap over the barrier, the Epi cap including phosphorus. The barrier inhibits phosphorus diffusion from the Epi cap into the fin as compared to a device that lacks such a barrier. The inhibition of the phosphorus diffusion reduces a short channel effect, thus improving the semiconductor device function.

Abstract: The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first region and a second region; a first semiconductor mesa formed on the semiconductor substrate within the first region; a second semiconductor mesa formed on the semiconductor substrate within the second region; and a field effect transistor (FET) formed on the semiconductor substrate. The FET includes a first doped feature of a first conductivity type formed in a top portion of the first semiconductor mesa; a second doped feature of a second conductivity type formed in a bottom portion of the first semiconductor mesa, the second semiconductor mesa, and a portion of the semiconductor substrate between the first and second semiconductor mesas; a channel in a middle portion of the first semiconductor mesa and interposed between the source and drain; and a gate formed on sidewall of the first semiconductor mesa.

Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a first wafer and a second wafer. The light source is configured to provide a first light directed to the first wafer and a second light directed to the second wafer. The light detection device is configured to detect reflected light intensity from the first wafer to find a position of at least one wafer alignment mark of the first wafer and to detect reflected light intensity from the second wafer to find a position of at least one wafer alignment mark of the second wafer.

Abstract: Systems and methods are provided for annealing a semiconductor structure using microwave radiation. A semiconductor structure is provided. One or more energy-converting materials capable of increasing the semiconductor structure's absorption of microwave radiation are provided. Microwave radiation is applied to the energy-converting materials and the semiconductor structure to anneal the semiconductor structure for fabricating semiconductor devices. First local temperatures associated with one or more first zones of the semiconductor structure are detected. The microwave radiation applied to the energy-converting materials and the semiconductor structure is adjusted based at least in part on the detected first local temperatures.

Abstract: Systems and methods are provided for fabricating semiconductor device structures on a substrate. A first fin structure is formed on a substrate. A second fin structure is formed on the substrate. A first semiconductor material is formed on both the first fin structure and the second fin structure. A second semiconductor material is formed on the first semiconductor material on both the first fin structure and the second fin structure. The first semiconductor material on the first fin structure is oxidized to form a first oxide. The second semiconductor material on the first fin structure is removed. A first dielectric material and a first electrode are formed on the first fin structure. A second dielectric material and a second electrode are formed on the second fin structure.

Abstract: An embodiment includes a substrate, wherein a portion of the substrate extends upwards, forming a fin, a gate dielectric over a top surface and sidewalls of the fin, a liner overlaying the gate dielectric, and an uninterrupted metallic feature over the liner a portion of the liner overlaying the gate dielectric, wherein the liner extends from a top surface of the uninterrupted metallic feature and covers sidewalls of the metallic feature, and wherein the gate dielectric, liner, and uninterrupted metallic feature collectively form a gate, a gate contact barrier, and a gate contact.

Abstract: Systems and methods are provided for generating a semiconductor device on a single semiconductor substrate. A single semiconductor substrate is generated that includes a Silicon material portion and a Germanium material portion. A first set of source/drain contacts is formed from a first metal on the Silicon material portion. The first set of source/drain contacts is annealed with the Silicon material portion at a first temperature. A second set of source/drain contacts is formed from a second metal on the Germanium material portion after heating the semiconductor substrate to the first temperature, and the second set of source/drain contacts is annealed with the Germanium material portion at a second temperature, where the second temperature is less than the first temperature.

Abstract: A fin structure of a semiconductor device, such as a fin field effect transistor (FinFET), and a method of manufacture, is provided. In an embodiment, trenches are formed in a substrate, and a liner is formed along sidewalls of the trenches, wherein a region between adjacent trenches define a fin. A dielectric material is formed in the trenches. Portions of the semiconductor material of the fin are replaced with a second semiconductor material and a third semiconductor material, the second semiconductor material having a different lattice constant than the substrate and the third semiconductor material having a different lattice constant than the second semiconductor material. Portions of the second semiconductor material are oxidized.

Abstract: A photonic device generates light from a full spectrum of lights including white light. The device includes two or more LEDs grown on a substrate, each generating light of a different wavelength and separately controlled. A light-emitting structure is formed on the substrate and apportioned into the two or more LEDs by etching to separate the light-emitting structure into different portions. At least one of the LEDs is coated with a phosphor material so that different wavelengths of light are generated by the LEDs while the same wavelength of light is emitted from the light-emitting structure.

Abstract: Systems and methods are provided for annealing a semiconductor structure. For example, a semiconductor structure is provided. An energy-converting material capable of increasing the semiconductor structure's absorption of microwave radiation is provided. A heat reflector is provided between the energy-converting material and the semiconductor structure, the heat reflector being capable of reflecting thermal radiation from the semiconductor structure. Microwave radiation is applied to the energy-converting material and the semiconductor structure to anneal the semiconductor structure for fabricating semiconductor devices.

Abstract: An integrated circuit device includes a semiconductor substrate, insulation regions extending into the semiconductor substrate, and a semiconductor fin protruding above the insulation regions. The insulation regions include a first portion and a second portion, with the first portion and second portion on opposite sides of the semiconductor fin. The integrated circuit device further includes a gate stack on a top surface and sidewalls of the semiconductor fin, and a semiconductor region connected to an end of the semiconductor fin. The semiconductor region includes a first semiconductor region formed of a first semiconductor material, wherein the first semiconductor region comprise faceted top surfaces, and a second semiconductor region underlying the first semiconductor region. The second semiconductor region has a higher germanium concentration than the first semiconductor region.

Abstract: A fin structure suitable for a FinFET and having a buried insulator layer is disclosed. In an exemplary embodiment, a semiconductor device comprises a substrate with a first semiconductor material and having a fin structure formed thereupon. The fin structure includes a lower region proximate to the substrate, a second semiconductor material disposed on the lower region, a third semiconductor material disposed on the second semiconductor material, and an insulating material selectively disposed on the second semiconductor material such that the insulating material electrically isolates a channel region of the fin structure and further such that the insulating material exerts a strain on the channel region. The semiconductor device further comprises an isolation feature disposed adjacent to the fin structure.