Patents by Inventor Chieh Hsieh

Chieh Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10153218
    Abstract: A semiconductor structure includes a die including a surface, a lid disposed over the surface of the die, and a thermally conductive material disposed between the die and the lid, wherein the lid includes a protrusion protruded towards the surface of the die and the thermally conductive material surrounds the protrusion. Also, a method of manufacturing a semiconductor structure includes providing a die including a surface, providing a lid, removing a portion of the lid to form a protrusion, disposing a thermally conductive material between the surface of the die and the lid, wherein the protrusion of the lid is surrounded by the thermally conductive material. Further, an apparatus for manufacturing a semiconductor structure and a method of manufacturing a semiconductor structure by the apparatus are disclosed.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: December 11, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tsung-Yu Chen, Wensen Hung, Hung-Chi Li, Cheng-Chieh Hsieh, Tung-Liang Shao, Chih-Hang Tung
  • Publication number: 20180325234
    Abstract: The present invention is to provide a gel nail photocuring machine with multicolor light effects, comprising: a machine body and a control module. The machine body has a curing cavity and one or a plurality of multicolor indicator light module provided on the machine body to produce color light effects on a housing of the machine body, wherein the multicolor indicator light module has a composite light source and a uniform illumination unit provided on one side of the composite light source. The control module is provided on the machine body and is connected to the multicolor indicator light module on the machine body, wherein the control module provides a color difference control instruction to the multicolor indicator light module according to a preset instruction in order to control an output power of each of a plurality of base-color light-emitting units of the composite light source, thereby instructing the multicolor indicator light module to emit light of various colors.
    Type: Application
    Filed: May 2, 2018
    Publication date: November 15, 2018
    Inventors: Wan Chieh Hsieh, Ya Wen Wu, Yu Ching Li, Wen Shan Chung
  • Publication number: 20180321767
    Abstract: The present invention is to provide a spring-based capacitive touch-sensing structure, comprising: a substrate and a touch panel provided on one side of the substrate. The substrate provided thereon with an electrode unit and one or a plurality of conductive springs electrically connected to the electrode unit. The touch panel has a bottom side in contact with the one or the plurality of conductive springs such that a surface of an opposite side of the touch panel is coupled with the one or the plurality of conductive spring to enable touch-based input. Thanks to the compressibility of the conductive springs in the present invention, tolerances for dimensional errors are ensured once the conductive springs are installed. In other words, the resulting product will not have dimensional errors even if the unmolding or manufacturing process is carried out with limited precision.
    Type: Application
    Filed: May 2, 2018
    Publication date: November 8, 2018
    Inventors: Wan Chieh Hsieh, Hao-Hong Ciou, Lin-Yu Sia, Chun Ching Liu
  • Publication number: 20180299367
    Abstract: A system, an apparatus, and a method are provided for a modular flow cytometer with a compact size. In one embodiment, the modular flow cytometry system includes the following: a laser system for emitting laser beams; a flow cell assembly positioned to receive the laser beams at an interrogation region of a fluidics stream where fluoresced cells scatter the laser beams into fluorescent light; a fiber assembly positioned to collect the fluorescent light; and a compact light detection module including a first image array having a transparent block, a plurality of micro-mirrors in a row coupled to a first side of the transparent block, and a plurality of filters in a row coupled to a second side of the transparent block opposite the first side.
    Type: Application
    Filed: March 30, 2018
    Publication date: October 18, 2018
    Inventors: Ming Yan, Yung-Chieh Hsieh, David Vrane, Eric Chase, Wenbin Jiang
  • Publication number: 20180302967
    Abstract: The present invention is to provide a slow-start photocuring device, comprising: a housing, one or a plurality of UV LED modules, and a switch control module connected to the one or the plurality of UV LED modules. The housing has an inner side provided with an internal cavity, wherein the inner side of the housing is further provided with one or a plurality of openings in one or two sides of the internal cavity. The one or the plurality of UV LED modules provided around the internal cavity, wherein each of the one or the plurality of UV LED modules has a light-emitting side facing the internal cavity. The switch control module comprises a signal modulator, and the signal modulator activates a power buffer mode when receiving a trigger signal, in order to modulate an irradiation power of the one or the plurality of UV LED modules gradually from a first level to a second level.
    Type: Application
    Filed: April 13, 2018
    Publication date: October 18, 2018
    Inventors: Wan Chieh HSIEH, Hao-Hong CIOU, Lin-Yu SIA, Chun Ching LIU
  • Patent number: 10060949
    Abstract: A probe device of a vertical probe card is provided and includes a die assembly and at least one pin assembly. The die assembly includes a first die, a second die, and a middle die disposed between the first die and the second die. The at least one pin assembly has a first pin, a second pin, and at least one electrical connector. The at least one electrical connector is connected to the first pin and the second pin. The at least one pin assembly is electrically contacted with at least one contact pad of a device under test. The at least one contact pad leans against the at least one pin assembly, so that the at least one pin assembly generates a deformation in a longitudinal direction.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: August 28, 2018
    Assignee: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Wen Tsung Li, Kai Chieh Hsieh
  • Patent number: 10062664
    Abstract: A semiconductor packaging device includes: a first chip disposed separately from the first chip on a substrate; a second chip disposed on the substrate, wherein the first chip and the second chip comprise a first heat energy producing rating and a second heat energy producing rating, respectively, the first heat energy producing rating is different from the second heat energy producing rating; and a heat sink arranged in thermal communication with the first chip and the second chip, wherein the heat sink is arranged to have a first slot configured substantially along a separation region between the first chip and the second chip.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: August 28, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Cheng-Chieh Hsieh
  • Publication number: 20180151472
    Abstract: A semiconductor structure includes a die including a surface, a lid disposed over the surface of the die, and a thermally conductive material disposed between the die and the lid, wherein the lid includes a protrusion protruded towards the surface of the die and the thermally conductive material surrounds the protrusion. Also, a method of manufacturing a semiconductor structure includes providing a die including a surface, providing a lid, removing a portion of the lid to form a protrusion, disposing a thermally conductive material between the surface of the die and the lid, wherein the protrusion of the lid is surrounded by the thermally conductive material. Further, an apparatus for manufacturing a semiconductor structure and a method of manufacturing a semiconductor structure by the apparatus are disclosed.
    Type: Application
    Filed: February 16, 2017
    Publication date: May 31, 2018
    Inventors: TSUNG-YU CHEN, WENSEN HUNG, HUNG-CHI LI, CHENG-CHIEH HSIEH, TUNG-LIANG SHAO, CHIH-HANG TUNG
  • Publication number: 20180114770
    Abstract: Integrated circuit packages and methods of forming the same are provided. One or more redistribution layers are formed on a carrier. First connectors are formed on a first side of the RDLs. Dies are bonded to the first side of the RDLs using the first connectors. An encapsulant is formed on the first side of the RDLs around the dies. The carrier is de-bonded from the overlaying structure and second connectors are formed on a second side of the RDLs. The resulting structure in diced to form individual packages.
    Type: Application
    Filed: December 11, 2017
    Publication date: April 26, 2018
    Inventors: Lin-Chih Huang, Hung-An Teng, Hsin-Yu Chen, Tsang-Jiuh Wu, Cheng-Chieh Hsieh
  • Patent number: 9953948
    Abstract: A system and method for conductive pillars is provided. An embodiment comprises a conductive pillar having trenches located around its outer edge. The trenches are used to channel conductive material such as solder when a conductive bump is formed onto the conductive pillar. The conductive pillar may then be electrically connected to another contact through the conductive material.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: April 24, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Cheng-Chieh Hsieh, Cheng-Lin Huang, Po-Hao Tsai, Shang-Yun Hou, Jing-Cheng Lin, Shin-Puu Jeng
  • Publication number: 20180067858
    Abstract: A method for determining data in cache memory of a cloud storage architecture and a cloud storage system using the method are disclosed. The method includes the steps of: A. recording transactions from cache memory of a cloud storage during a period of time in the past, wherein each transaction comprises a time of recording, or a time of recording and cached data been accessed during the period of time in the past; B. assigning a specific time in the future; C. calculating a time-associated confidence for every cached data from the transactions based on a reference time; D. ranking the time-associated confidences; and E. providing the cached data with higher time-associated confidence in the catch memory, and removing the cached data in the cache memory with lower time-associated confidence when the cache memory is full before the specific time in the future.
    Type: Application
    Filed: September 6, 2016
    Publication date: March 8, 2018
    Applicant: ProphetStor Data Services, Inc.
    Inventors: Wen Shyen CHEN, Wen Chieh HSIEH, Ming Jen HUANG
  • Publication number: 20180064744
    Abstract: Aspects of the invention include methods of reducing the deleterious activity of a mutant extended nucleotide repeat (NR) containing target gene in a cell by contacting the cell with an effective amount of a nucleoside agent, as well as compositions used in such methods. The deleterious activity (e.g., toxicity and/or dis-functionality of products encoded thereby) of a mutant extended NR containing target gene may be reduced in a variety of different ways, e.g., by reducing (and in some instances differentially, including selectively, reducing) the production or activity of toxic expression products (e.g., RNA or protein) encoded by the target gene. Kits and compositions for practicing the subject methods are also provided.
    Type: Application
    Filed: May 18, 2016
    Publication date: March 8, 2018
    Inventors: Stanley N. Cohen, Ning Deng, Yanan Feng, Tzu-Hao Cheng, Yun-Yun Wu, Wen-Chieh Hsieh
  • Publication number: 20180059140
    Abstract: A probe device of a vertical probe card is provided and includes a die assembly and at least one pin assembly. The die assembly includes a first die, a second die, and a middle die disposed between the first die and the second die. The at least one pin assembly has a first pin, a second pin, and at least one electrical connector. The at least one electrical connector is connected to the first pin and the second pin. The at least one pin assembly is electrically contacted with at least one contact pad of a device under test. The at least one contact pad leans against the at least one pin assembly, so that the at least one pin assembly generates a deformation in a longitudinal direction.
    Type: Application
    Filed: February 17, 2017
    Publication date: March 1, 2018
    Applicant: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Wen Tsung LI, Kai Chieh HSIEH
  • Publication number: 20180024040
    Abstract: In one embodiment, a flow cytometer is disclosed having a compact light detection module. The compact light detection module includes an image array with a transparent block, a plurality of micro-mirrors in a row coupled to a first side of the transparent block, and a plurality of filters in a row coupled to a second side of the transparent block opposite the first side. Each of the plurality of filters reflects light to one of the plurality of micro-mirrors and passes light of a differing wavelength range and each of the plurality of micro-mirrors reflects light to one of the plurality of filters, such that incident light into the image array zigzags back and forth between consecutive filters of the plurality of filters and consecutive micro-mirrors of the plurality of micro-mirrors. A radius of curvature of each of the plurality of micro-mirrors images the fiber aperture onto the odd filters and collimates the light beam on the even filters.
    Type: Application
    Filed: July 25, 2017
    Publication date: January 25, 2018
    Inventors: Ming Yan, Yung-Chieh Hsieh, David Vrane, Eric Chase
  • Publication number: 20180017593
    Abstract: A probe structure is provided, including two probe heads for electrically contacting with the two objects, respectively, an elastic buffer portion forming a hollow space therein, a conductive portion being disposed within the hollow space and thereby being surrounded by the elastic buffer portion, and having two ends respectively electrically being connected to the two probe heads. When the two probe heads do not contact with the two objects electrically, the conductive portion is linearly extended between the two probe heads.
    Type: Application
    Filed: February 8, 2017
    Publication date: January 18, 2018
    Applicant: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Wen Tsung LI, Kai Chieh HSIEH, Chih-Peng HSIEH
  • Publication number: 20180005985
    Abstract: A semiconductor packaging device includes: a first chip disposed separately from the first chip on a substrate; a second chip disposed on the substrate, wherein the first chip and the second chip comprise a first heat energy producing rating and a second heat energy producing rating, respectively, the first heat energy producing rating is different from the second heat energy producing rating; and a heat sink arranged in thermal communication with the first chip and the second chip, wherein the heat sink is arranged to have a first slot configured substantially along a separation region between the first chip and the second chip.
    Type: Application
    Filed: November 18, 2016
    Publication date: January 4, 2018
    Inventor: CHENG-CHIEH HSIEH
  • Patent number: 9852009
    Abstract: Methods for optimizing utilization of workload-consumed resources for time-inflexible workloads are disclosed. By sorting workload-consumed resource profiles representing individual workloads in one system according to an order of standard deviation or descending volume, two workload-consumed resource profiles can be combined to check if combination criteria are fulfilled. If any combination satisfies the combination criteria, corresponding workloads can be combined to share the same resource from the system. Thus, optimizing utilization of the workload-consumed resource can be achieved.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: December 26, 2017
    Assignee: Prophetstor Data Services, Inc.
    Inventors: Wen Shyen Chen, Wen Chieh Hsieh, Ming Jen Huang, Tsung Ming Shih
  • Publication number: 20170367183
    Abstract: A circuit board with via capacitor structure is introduced herein, including a base, a deposition layer, disposed on the base, having at least a via in the deposition layer, at least a thin film capacitor, each thin film capacitor disposed in each via, each thin film capacitor having a body, a second terminal, and a first terminal, the second terminal and the first terminal located on two opposite sides of the body; at least a first electrode, each first electrode electrically connected to the first terminal of each thin film capacitor; and at least a second electrode, each second electrode electrically connected to the second terminal of each thin film capacitor.
    Type: Application
    Filed: January 12, 2017
    Publication date: December 21, 2017
    Applicant: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Wen Tsung LI, Kai Chieh HSIEH, I Hsing WENG
  • Patent number: 9842825
    Abstract: Integrated circuit packages and methods of forming the same are provided. One or more redistribution layers are formed on a carrier. First connectors are formed on a first side of the RDLs. Dies are bonded to the first side of the RDLs using the first connectors. An encapsulant is formed on the first side of the RDLs around the dies. The carrier is de-bonded from the overlaying structure and second connectors are formed on a second side of the RDLs. The resulting structure in diced to form individual packages.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: December 12, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lin-Chih Huang, Hung-An Teng, Hsin-Yu Chen, Tsang-Jiuh Wu, Cheng-Chieh Hsieh
  • Publication number: 20170330979
    Abstract: A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.
    Type: Application
    Filed: July 31, 2017
    Publication date: November 16, 2017
    Inventors: Kuo-Chin Huang, Tzu-Jui Wang, Szu-Ying Chen, Dun-Nian Yaung, Jen-Cheng Liu, Bruce C.S. Chou, Jung-Kuo Tu, Cheng-Chieh Hsieh