Patents by Inventor Chien Lin

Chien Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230122286
    Abstract: A method for building a temperature prediction model is applicable to a heat cycle system, wherein the method is used to measure a temperature of the heat cycle system to generate a measured temperature data, and compute a response time of the heat cycle system, and the method includes aligning the measured temperature data and a setting value of the heat cycle system to generate a training data according to the response time; and building the temperature prediction model according to a statistic model and the training data.
    Type: Application
    Filed: March 3, 2022
    Publication date: April 20, 2023
    Inventors: Yu Chien Lin, Cheng-Yang Chen, PEI-LING GU, Chia-Chiung Liu
  • Patent number: 11621263
    Abstract: A method of making a semiconductor device includes steps related to forming source and drain wells of a transistor in a semiconductor substrate; forming a gate electrode of the transistor over the semiconductor substrate; forming an isolation structure in the semiconductor substrate adjacent to the transistor; and depositing a first inter-dielectric layer (ILD) material over the transistor and the isolation structure. The method also includes steps for depositing a capacitor film stack over the first ILD material, forming a pattern in the capacitor film stack over the isolation structure, and forming a capacitor plate by etching a conductive material of the capacitor film stack. Etching the conductive material includes performing a liquid etch process with a selectivity of at least 16 with regard to other materials in the capacitor film stack.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: April 4, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Hung Tsai, Xi-Zong Chen, Hsiao Chien Lin, Chia-Tsung Tso, Chih-Teng Liao
  • Publication number: 20230100925
    Abstract: A ventricular assist device is provided, including a blood pump, a driveline and a feedthrough. The blood pump includes a pump housing, an axi-symmetric oval-shaped blood sac and stem assembly received in the pump housing, and a pressure sensing system embedded in the pump housing. The driveline includes a pneumatic lumen, at least one electric wire and a tether included in a wall of the driveline, wherein the electric wires and the tether are disposed on the pneumatic lumen. The feedthrough connects the driveline to the pump housing.
    Type: Application
    Filed: December 2, 2022
    Publication date: March 30, 2023
    Applicant: 3R Life Sciences Corporation
    Inventors: Pong-Jeu LU, Hsiao-Chien LIN
  • Patent number: 11614684
    Abstract: A method includes: receiving a photomask; patterning a wafer by directing a first radiation beam to the wafer through the photomask at a first tilt angle; and inspecting the photomask. The inspecting includes: directing a second radiation beam to the photomask at a second tilt angle greater than the first tilt angle; receiving a third radiation beam reflected from the photomask; and generating an image of the photomask according to the third radiation beam.
    Type: Grant
    Filed: March 14, 2021
    Date of Patent: March 28, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chih-Wei Wen, Hsin-Fu Tseng, Chien-Lin Chen
  • Patent number: 11614819
    Abstract: A system may include a display driven using display driving circuitry to present an image via pixels. The display driving circuitry may include a sensor core compatible with one or more strain sensing circuits. The same sensor core may be used by a control system of the display to sense a stress applied to a strained region of a display using a current divider sensing circuit and/or a Wheatstone bridge sensing circuit.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: March 28, 2023
    Assignee: Apple Inc.
    Inventors: Zhen Zhang, Baris Cagdaser, Chieh-Chien Lin, Derek Keith Shaeffer, Jesse Aaron Richmond, Suoming Zhang
  • Publication number: 20230089624
    Abstract: An access point provides a hidden wireless network that is configured with a set of SSIDs so that the hidden network is discoverable with multiple different SSIDs. Based on detection of a probe request frame which indicates an SSID from a device, the access point determines if the SSID for which network availability is requested matches one of the SSIDs in the set. If the SSID does match one of those included in the set, the SSID correctly identifies the hidden network, and the access point responds with a probe response frame. Devices connected to the hidden network may have initiated the establishment of the connection with a different SSIDs despite the hidden network being a single wireless network. Scaling the number of supported SSIDs therefore does not impact the frequency with which the access point transmits beacon frames for the hidden network.
    Type: Application
    Filed: September 21, 2021
    Publication date: March 23, 2023
    Inventor: Ta Chien Lin
  • Publication number: 20230064706
    Abstract: An apparatus and a method forming a semiconductor structure are provided. The method includes receiving a substrate; mounting the substrate to a polishing head with a side of the substrate facing a polishing pad, the polishing pad comprising a first region and a second region; grinding the substrate against the polishing pad; and adjusting a temperature of the first region and a temperature of the second region.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: CHIEN-LIN HUANG, YEOU-CHYI NI
  • Publication number: 20230065056
    Abstract: A method includes forming a dummy gate structure across a fin, in which the dummy gate structure has a dummy gate dielectric layer and a dummy gate electrode, forming gate spacers on sidewalls of the dummy gate structure, forming source/drain epitaxial structures on sides of the dummy gate structure, performing a first etch process to the dummy gate electrode such that a recessed dummy gate electrode remains over the fin, performing a second etch process to the gate spacers such that recessed gate spacers remain over the sidewalls of the dummy gate structure, removing the recessed dummy gate electrode and the dummy gate dielectric layer after the second etch process to form a recess between the recessed gate spacers, forming a gate structure overfilling the recess, and performing a third etch process to the gate structure such that a recessed gate structure remains between the recessed gate spacers.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiao-Chien LIN, Hsi Chung CHEN, Cheng-Hung TSAI, Chih-Hsuan LIN
  • Patent number: 11586253
    Abstract: An information handling system display removably couples to a housing with a sliding structure of the display that engages a coupling structure disposed at opposing sides of the housing. For example, the sliding structure is a member that aligns under a lip formed in the coupling structure. In one embodiment, the sliding structure comprises plural pins extending from opposing sides of the display to enter channels at the side of the housing that direct the pins under a lip at the base of the channel.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: February 21, 2023
    Assignee: Dell Products L.P.
    Inventors: Chin-Chung Wu, Tsai Chien Lin, James D. Gossett, Jing-Tang Wu, Cheng-Pu Zhu
  • Publication number: 20230045824
    Abstract: A bottom-emission light-emitting diode (LED) display includes a transparent substrate, a plurality of LEDs bonded on the substrate, a packaging layer formed on the substrate to cover the LEDs, and a reflecting layer formed on the packaging layer to reflect light emitted by the plurality of LEDs. The reflecting layer has a non-smooth shape or the packaging layer has different refractivities.
    Type: Application
    Filed: August 13, 2021
    Publication date: February 16, 2023
    Inventors: Biing-Seng Wu, Chao-Wen Wu, Chun-Bin Wen, Chien-Lin Lai, Hsing-Ying Lee
  • Patent number: 11570063
    Abstract: A Quality of Experience (QoE) optimization system and method are provided. An electronic device inputs key performance indicators (KPIs) and system control parameters collected from a core network, a base station and a user equipment (UE) into a QoE optimization model. The QoE optimization model then optimizes the system control parameters based on the KPIs and a user QoE fed back from the UE to output optimized system control parameters. Furthermore, a strategy emulator controls at least one of a base station emulator and a UE emulator, so as to emulate the QoE optimization model using the at least one of the base station emulator and the UE emulator. Non-real-time optimization adjustments to the QoE optimization model are made based on the result of the emulation performed by the at least one of the base station emulator and the UE emulator.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: January 31, 2023
    Assignee: National Yang Ming Chiao Tung University
    Inventors: Ta-Sung Lee, En-Cheng Liou, Yu-Chien Lin, Ting-Yen Kuo, Ching-Hsiang Lin
  • Publication number: 20230015224
    Abstract: In one example, an electronic device may include a display screen defining a plurality of display regions. Further, the electronic device may include a camera to capture an image of an operator of the electronic device. Furthermore, the electronic device may include a controller operatively coupled to the camera and the display screen. The controller may detect an orientation of the operator's face with respect to the display screen using the captured image. Further, the controller may determine a first display region of the plurality of display regions corresponding to the detected orientation of the operators face. Furthermore, the controller may activate the first display region to position a cursor of a pointing device within the first display region.
    Type: Application
    Filed: January 14, 2020
    Publication date: January 19, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Yi-Chien Lin, Chih-Hung Lin, Ling-Yu Wu, Chih-Shiuan Lee
  • Patent number: 11558140
    Abstract: An intelligence-defined optical tunnel network system includes pods. Each pod includes optical add-drop sub-systems. Each optical add-drop sub-system includes a first transmission module and a second transmission module. The first transmission modules of the optical add-drop sub-systems are connected to each other for forming a first transmission ring. The second transmission modules of the optical add-drop sub-systems are connected to each other for forming a second transmission ring. Each first transmission module includes a multiplexer and an optical signal amplifier. The multiplexer is connected to a Top-of-Rack switch. The multiplexer is configured to receive, through input ports, upstream optical signals from the Top-of-Rack switch, and combine the upstream optical signals into a composite optical signal. The upstream optical signals have wavelengths respectively.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: January 17, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Tien-Chien Lin, Tzu-Hao Huang, Maria Chi-Jui Yuang, Po-Lung Tien
  • Patent number: 11541084
    Abstract: A composition having Lactobacillus Plantarum strain GMNL-662 for promoting bone regrowth is provided. The Lactobacillus Plantarum strain GMNL-662 has an ability to promote the expression of osteogenic genes, inhibit the expression of osteoclast related genes, and promote the expression of osteogenesis-related cytokine TGF-?, so that the bone loss is improved.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: January 3, 2023
    Assignee: .GENMONT BIOTECH INC
    Inventors: Yi-Hsing Chen, Wan-Hua Tsai, Chia-Hsuan Chou, Chi Chien Lin
  • Patent number: 11528546
    Abstract: A MEMS die includes a substrate having an opening formed therein, and a diaphragm attached around a periphery thereof to the substrate and over the opening, wherein the diaphragm comprises first and second spaced apart layers. A backplate is disposed between the first and second spaced apart layers. One or more columnar supports are disposed through holes disposed through the backplate and connecting the first and second spaced apart layers. At least a partial vacuum exists between at least a portion of the first and second spaced apart layers. The first layer further comprises interior and exterior sub-layers at least proximate to each of the one or more columnar supports, wherein the interior sub-layers include one or more apertures disposed therethrough.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: December 13, 2022
    Assignee: KNOWLES ELECTRONICS, LLC
    Inventors: Hung Chien Lin, Richard Li-Chen Chen
  • Patent number: 11518254
    Abstract: A power adjustment system and a power adjustment method of an autonomous mobile device are provided. In the power adjustment method, two first current control signals respectively transmitted to two drivers are outputted by a control module. A tilt angle of the autonomous mobile device is detected by an inertial measurement module. A travel route is planned by a navigation module, and the control module obtains a steering angle of the autonomous mobile device during a traveling process. According to different weight values of the autonomous mobile device stored in a database module, a weight of the autonomous mobile device is estimated by the control module. According to the two first current control signals and the weight, the steering angle, and the tilt angle of the autonomous mobile device, two second current control signals respectively transmitted to the two drivers are outputted by the control module.
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: December 6, 2022
    Assignee: ADATA TECHNOLOGY CO., LTD.
    Inventor: Chi-Chien Lin
  • Publication number: 20220384426
    Abstract: A semiconductor device having source and drain regions in a semiconductor substrate, a transistor including a gate electrode over the semiconductor substrate, an isolation structure in the semiconductor substrate adjacent to the transistor, a first inter-dielectric layer (ILD) material over the isolation structure, and a capacitor film stack over the first ILD material that includes an isolation plate over and covering a capacitor plate, and a contact to the capacitor plate.
    Type: Application
    Filed: August 11, 2022
    Publication date: December 1, 2022
    Inventors: Cheng-Hung TSAI, Xi-Zong CHEN, Hsiao Chien LIN, Chia-Tsung TSO, Chih-Teng LIAO
  • Patent number: 11507240
    Abstract: A touch sensor comprises a first electrode, a second electrode arranged spaced apart from the first electrode, and an insulator arranged between the first electrode and the second electrode, wherein at least one of the first electrode and the second electrode is energized, and an energy difference exists between the first electrode and the second electrode. At least one of the first electrode and the second electrode is a stressed electrode. When the stressed electrode is not stressed, no electrical signal is generated, and when the stressed electrode is stressed, the stressed electrode deforms at a stressed point and changes the distance between the stressed point and the other electrode to generate a tunneling current, and the touch sensor generates the electrical signal according to whether the tunneling current is generated. Therefore, the invention solves a limitation of the conventional touch sensor in touching and provides good touching sensitivity.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: November 22, 2022
    Assignee: HIGGSTEC INC.
    Inventors: Yi-Han Wang, Tzu-Chien Lin, Chui-Xiang Chiou, Hung-Yu Tsai
  • Publication number: 20220367262
    Abstract: An opening is formed through a dielectric material layer to physically expose a top surface of a conductive material portion in, or over, a substrate. A metallic nitride liner is formed on a sidewall of the opening and on the top surface of the conductive material portion. A metallic adhesion layer including an alloy of copper and at least one transition metal that is not copper is formed on an inner sidewall of the metallic nitride liner. A copper fill material portion may be formed on an inner sidewall of the metallic adhesion layer. The metallic adhesion layer is thermally stable, and remains free of holes during subsequent thermal processes, which may include reflow of the copper fill material portion. An additional copper fill material portion may be optionally deposited after a reflow process.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 17, 2022
    Inventors: Cheng-Lun TSAI, Huei-Wen HSIEH, Chun-Sheng CHEN, Kai-Shiang KUO, Jen-Wei LIU, Cheng-Hui WENG, Chun-Chien LIN, Hung-Wen SU
  • Publication number: 20220359411
    Abstract: The present disclosure provides a structure and a method to reduce electro-migration. An interconnect structure according to the present disclosure includes a conductive feature embedded in a dielectric layer, a capping barrier layer disposed over the conductive feature and the dielectric layer, and an adhesion layer sandwiched between the capping barrier layer and the dielectric layer. The adhesion layer includes a degree of crystallinity between about 40% and about 70%.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: Yi-Chen HO, Chien Lin, Cheng-Yeh Yu, Hsin-Hsing Chen, Ju Ru Hsieh