Abstract: A method includes forming multiple photonic devices in a semiconductor wafer, forming a v-shaped groove in a first side of the semiconductor wafer, forming an opening extending through the semiconductor wafer, forming multiple conductive features within the opening, wherein the conductive features extend from the first side of the semiconductor wafer to a second side of the semiconductor wafer, forming a polymer material over the v-shaped groove, depositing a molding material within the opening, wherein the multiple conductive features are separated by the molding material, after depositing the molding material, removing the polymer material to expose the v-shaped groove, and placing an optical fiber within the v-shaped groove.

Abstract: A semiconductor package includes an interconnect structure, an insulating layer and a conductive layer. The interconnect structure includes a first surface and a second surface opposite to the first surface. The insulating layer contacts the interconnect structure. The insulating layer includes a third surface contacting the second surface of the interconnect structure and a fourth surface opposite to the third surface. The conductive layer is electrically coupled to the interconnect structure. The conductive layer has a continuous portion extending from the second surface to the fourth surface.

Abstract: The present disclosure provides embodiments of bipolar junction transistor (BJT) structures. A BJT according to the present disclosure includes a first epitaxial feature disposed over a well region, a second epitaxial feature disposed over the well region, a vertical stack of channel members each extending lengthwise between the first epitaxial feature and the second epitaxial feature, a gate structure wrapping around each of the vertical stack of channel members, a first electrode coupled to the well region, an emitter electrode disposed over and coupled to the first epitaxial feature, and a second electrode disposed over and coupled to the second epitaxial feature.

Abstract: A power-adjusting method for uplink transmission is provided. The power-adjusting method is applied to user equipment (UE). In response to the UE transmitting a first packet carrying a specific message to a network node, the power-adjusting method includes the UE increasing the transmission power to transmit the first packet.

Abstract: A display, including a carrying main body, a flexible carrier film, a double-sided tape, and an adhesive layer, is provided. The flexible carrier film includes a first bonding section and a second bonding section respectively disposed on two opposite sides of the carrying main body, and a bending section connected between the first bonding section and the second bonding section. The flexible carrier film has an inner surface and an outer surface opposite to each other. The inner surface has at least one first groove at the bending section. The flexible carrier film has a display layer thereon. At least a part of the display layer is connected to the outer surface at the second bonding section. The double-sided tape is disposed between the first bonding section and the carrying main body. The adhesive layer is disposed between the inner surface and the carrying main body at the bending section.

Abstract: The disclosure relates to a spinal intervertebral body fusion device including an adjustable spacer, a first and second pushing piece, and an operative piece. The adjustable spacer includes a first and second supporting plate. The first supporting plate portion is movably installed on the second supporting plate portion. The first and second supporting plate portions form a first and second opening respectively located at two opposite sides of the adjustable spacer. The first pushing piece located at the first opening and is partially clamped by the first and second supporting plate portions. The second pushing piece located at the second opening is partially clamped by the first and second supporting plate portions. The operative piece is movably disposed through the second pushing piece and screwed to the first pushing piece. The operative piece has an annular slot, and the second pushing piece is partially located in the annular slot.

Abstract: A package structure includes an optical die, an optical die, a supporting structure, and a lens structure. The optical die includes a photonic region. The optical die is disposed on and electrically coupled to the optical die. The supporting structure is disposed on the optical die, where the electric die is disposed between the supporting structure and the optical die. The lens structure is disposed on the supporting structure and optically coupled to the photonic region of the optical die, where the supporting structure is disposed between the lens structure and the electric die.

Abstract: A display panel and a spliced display are provided. The display panel includes a substrate, a plurality of light-emitting elements, a driving circuit, and an optical sensor. The substrate includes a through hole, and the through hole includes a hole. The plurality of the light-emitting elements are disposed on the substrate. The through hole is located in a region between two of the plurality of the light-emitting elements. The driving circuit is disposed on the substrate and electrically connected to the plurality of the light-emitting elements. The optical sensor is disposed corresponding to the through hole and receives sensing light through the hole. The width W of the hole meets the equation of H?W<D. H is the depth of the hole, and D is the distance between the two of the plurality of the light-emitting elements.

Abstract: A probe card device includes a wiring board provided with a plurality of contacts, a probe head having a probe holder and a plurality of conductive probes arranged on the probe holder, respectively, and a circuit protection assembly including an insulation plate, a plurality of through holes and a plurality of self-resetting fusing elements. The insulation plate is sandwiched between the wiring board and the probe head. The through holes are respectively formed on the insulation plate and arranged in an array form. The self-resetting fusing elements are respectively disposed within the through holes. Each of the self-resetting fusing elements is electrically connected to one of the contacts and one of the conductive probes for reversibly breaking down electric currents from the wiring board to the conductive probe.

Abstract: A measuring equipment, applied to carry a workpiece to be measured, includes a main base and a positioning device. The main base includes a measuring center axis. The positioning device includes at least two positioning elements. Each of the at least two positioning elements is disposed movably on the main base, and each of the at least two positioning elements is moved with respect to the measuring center axis. An identical distance is there from each of the at least two positioning elements to the measuring center axis. Each of the at least two positioning elements is used for the workpiece to contact and to be positioned to the measuring center axis.

Abstract: An artificial intervertebral disc is configured to be inserted between adjacent human vertebrae. The artificial intervertebral disc includes a first connection block, a joint block and a second connection block. The joint block has a convex surface and a rear surface. The rear surface of the joint block is stacked on the first connection block. The second connection block is slidably stacked on the convex surface of the joint block, such that the second connection block is movable relative to the first connection block. In addition, the convex surface is a curved surface, and the convex surface is arranged off-axis with respect to the rear surface.

Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability.

Abstract: A method for manufacturing a fan-out chip packaging structure with decreased use of a crack-inducing hot-soldering process includes a first carrier plate with first and a second outer wiring layers. Two first conductive posts are formed on the first outer wiring layer, one end of each post is electrically connected to the first outer wiring layer. A receiving groove is formed between first conductive posts, and a sidewall of each post is surrounded by a first insulating layer. An embedded component is laid in the receiving groove and a second carrier plate is formed on the first insulating layer, wherein the second carrier plate carries third and fourth outer wiring layers. A first outer component is connected to the second outer wiring layer, and a second outer component is connected to the fourth outer wiring layer.

Abstract: Transistor structures and methods of forming transistor structures are provided. The transistor structures include alternating layers of a first epitaxial material and a second epitaxial material. In some embodiments, one of the first epitaxial material and the second epitaxial material may be removed for one of an n-type or p-type transistor. A bottommost layer of the first epitaxial material and the second epitaxial material maybe be removed, and sidewalls of one of the first epitaxial material and the second epitaxial material may be indented or recessed.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a silicon layer on a substrate and then forming a metal silicon nitride layer on the silicon layer, in which the metal silicon nitride layer includes a bottom portion, a middle portion, and a top portion and a concentration of silicon in the top portion is greater than a concentration of silicon in the middle portion. Next, a conductive layer is formed on the metal silicon nitride layer and the conductive layer, the metal silicon nitride layer, and the silicon layer are patterned to form a gate structure.

Abstract: A method for forming a semiconductor device structure includes forming nanostructures over a substrate. The method also includes forming a work function layer surrounding the nanostructures. The method also includes forming spacers over opposite sides of the work function layer. The method also includes forming a first metal layer over the work function layer and sidewalls of the spacers. The method also includes forming a second metal layer surrounded by the first metal layer. The method also includes etching the first metal layer over opposite sides of the second metal layer. The method also includes forming a cap layer over a top surface and a sidewall of the second metal layer.

Abstract: A conductive probe includes a columnar body. The columnar body is defined with a longitudinal direction. The columnar body is provided with a first contacting surface and a second contacting surface in the longitudinal direction. The first contacting surface is opposite to the second contacting surface, and the first contacting surface is cross shaped or X-shaped for contacting to a conductive pillar of a device under test (DUT).

Abstract: Provided is a method of reducing a behavioral abnormality associated with a neurodevelopmental disorder in a subject, including administering to the subject an effective amount of Lactobacillus plantarum subsp. plantarum PS128. Also provided is a composition for preventing or treating a behavioral abnormality associated with a neurodevelopmental disorder in a subject in need thereof.

Abstract: Provided is a quantum circuit for solving a problem in a partially observable Markov decision process, which includes a plurality of first unitary gates U0, U1, ..., Uq applied to an initial state including n qubits in order, and a plurality of second unitary gates ?0, ?1, ..., aq+1 applied to one qubit in a |0>state in order, wherein Uq is controlled by a qubit output from ?q, and after computation by the first unitary gates and the second unitary gates is performed, the states of the n qubits are observed to confirm the state of each qubit in order to set a final state.

Abstract: The present disclosure provides methods of fabricating a semiconductor device. A method according to one embodiment includes forming, on a substrate, a first fin formed of a first semiconductor material and a second fin formed of a second semiconductor material different from the first semiconductor material, forming a semiconductor cap layer over the first fin and the second fin, and annealing the semiconductor cap layer at a first temperature while at least a portion of the semiconductor cap layer is exposed.