Patents by Inventor Chuan Wang

Chuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9940700
    Abstract: An information processing apparatus for producing combined image data includes an image data acquiring unit that acquires two image data items a difference obtaining unit that obtains a difference in brightness between the data items a difference area identifying unit that identifies a difference area a surrounding brightness difference obtaining unit that obtains a difference between a brightness of the difference area and a brightness of an area located around the difference area a correction target area information producing unit that produces correction target area information which indicates a correction target area, in which one of the data items, having a greater difference obtained by the surrounding brightness difference obtaining unit, is used as the correction target area and a combined image data producing unit that produces the combined image data, based on the data items and the correction target area information.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: April 10, 2018
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Chuan Wang, Takeshi Onishi
  • Patent number: 9937205
    Abstract: The present invention provides compositions and methods for inhibiting one or more diacylglycerol kinase (DGK) isoform in a cell in order to enhance the cytolytic activity of the cell. In one embodiment, the cells may be used in adoptive T cell transfer. For example, in some embodiments, the cell is modified to express a chimeric antigen receptor (CAR). Inhibition of DGK in T cells used in adoptive T cell transfer increases cytolytic activity of the T cells and thus may be used in the treatment of a variety of conditions, including cancer, infection, and immune disorders.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: April 10, 2018
    Assignee: The Trustees of the University of Pennsylvania
    Inventors: Steven M. Albelda, Liang-Chuan Wang, Gary Koretzky, Matthew Riese
  • Patent number: 9939611
    Abstract: An optical lens including a first lens group and a second lens group is provided. The first lens group is disposed between a magnified side and a reduced side and has a negative refractive power. The first lens group includes four lenses. Two lenses closest to the magnified side in the first lens group are aspheric lenses. The second lens group is disposed between the first lens group and the reduced side and has a positive refractive power. The second lens group includes at least seven lenses.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: April 10, 2018
    Assignee: Young Optics Inc.
    Inventors: Ching-Sheng Chang, Yen-Te Lee, Kuo-Chuan Wang
  • Patent number: 9930007
    Abstract: Provisioning an Internet Protocol address is disclosed. A request to provision an Internet Protocol address to a virtual resource is received. An Internet Protocol address is automatically determined to allocate to the virtual resource. The determined Internet Protocol address was selected from a group of Internet Protocol addresses potentially available to be assigned to the virtual resource of the received request.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: March 27, 2018
    Assignee: Infoblox Inc.
    Inventors: Soheil Eizadi, Steven Whittle, Chuan Wang
  • Publication number: 20180074110
    Abstract: An EM testing method includes forcing electrical current through EM monitor wiring arranged in close proximity to the perimeter of the TSV and measuring an electrical resistance drop across the EM monitor wiring. The method may further include determining if an electrical short exists between the EM monitor wiring and the TSV from the measured electrical resistance. The method may further include determining if an early electrical open or resistance increase exists within the EM monitoring wiring due to TSV induced proximity effect.
    Type: Application
    Filed: November 7, 2017
    Publication date: March 15, 2018
    Inventors: Fen Chen, Mukta G. Farooq, John A. Griesemer, Chandrasekaran Kothandaraman, John M. Safran, Timothy D. Sullivan, Ping-Chuan Wang, Lijuan Zhang
  • Publication number: 20180074111
    Abstract: A structure, such as a wafer, semiconductor chip, integrated circuit, or the like, includes a through silicon via (TSV) and an electromigration (EM) monitor. The TSV) incldues at least one perimeter sidewall.
    Type: Application
    Filed: November 7, 2017
    Publication date: March 15, 2018
    Inventors: Fen Chen, Mukta G. Farooq, John A. Griesemer, Chandrasekaran Kothandaraman, John M. Safran, Timothy D. Sullivan, Ping-Chuan Wang, Lijuan Zhang
  • Patent number: 9912843
    Abstract: A High-Definition Multimedia Interface (HDMI) receiving circuit receives an image signal and an input clock transmitted via HDMI and generates output data. The HDMI receiving circuit includes: a sampling circuit, sampling the image signal according to a transmission mode and the input clock to generate the output data; a data comparison circuit, coupled to the sampling circuit, determining whether the output data includes predetermined data to generate a determination result; and a control circuit, coupled to the sampling circuit and the data comparison circuit, determining the transmission mode according to the determination result.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: March 6, 2018
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chun Wen Yeh, Shuo-Ting Kao, Te-Chuan Wang
  • Publication number: 20180061350
    Abstract: A gate driving circuit is provided. The gate driving circuit includes multistage driving modules, where an Nth stage driving module includes a setting circuit, a first driving circuit, an isolating switch circuit, a second driving circuit and an anti-noise circuit. The setting circuit generates a first precharge signal according to a gate driving signal of an (N?2)th scan line or a start signal. The isolating switch circuit coupled between the first driving circuit and the second driving circuit provides a second precharge signal, so as to effectively avoid a flickering problem of a display image caused by a surge of the gate driving signal due to a coupling effect of a parasitic capacitance of the transistor and a bootstrap capacitor, and meanwhile the bootstrap capacitor is not used, so as to effectively reduce a bezel area.
    Type: Application
    Filed: October 27, 2016
    Publication date: March 1, 2018
    Applicants: Chunghwa Picture Tubes, LTD., National Chiao Tung University
    Inventors: Wei-Lien Sung, Han-Lung Liu, Wen-Chuan Wang, Chi-Liang Kuo, Yuan-Hao Chang, Wen-Che Wang, Po-Tsun Liu, Guang-Ting Zheng, Yu-Fan Tu
  • Patent number: 9891261
    Abstract: A structure, such as a wafer, chip, IC, design structure, etc., includes a through silicon via (TSV) and an electromigration (EM) monitor. The TSV extends completely through a semiconductor chip and the EM monitor includes a plurality of EM wires proximately arranged about the TSV perimeter. An EM testing method includes forcing electrical current through EM monitor wiring arranged in close proximity to the perimeter of the TSV, measuring an electrical resistance drop across the EM monitor wiring, determining if an electrical short exists between the EM monitor wiring and the TSV from the measured electrical resistance, and/or determining if an early electrical open or resistance increase exists within the EM monitoring wiring due to TSV induced proximity effect.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Fen Chen, Mukta G. Farooq, John A. Griesemer, Chandrasekaran Kothandaraman, John M. Safran, Timothy D. Sullivan, Ping-Chuan Wang, Lijuan Zhang
  • Patent number: 9883157
    Abstract: One embodiment of the present invention discloses a data access method comprising: (a) receiving a plurality of data units consisting of filtered data units and un-filtered data units; (b) filtering the filtered data units; (c) storing the un-filtered data units; (d) recovering the timings of the un-filtered data units stored in the step (c) according to the received timings of the data units received in the step (a); (e) inserting replacement data units to replace the filtered data units, wherein each of the replacement data units has the same timing as each of the filtered data units; and (f) outputting the un-filtered data units and the replacement data units according to the timings of the un-filtered data units and the timing of the replacement data unit.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: January 30, 2018
    Assignee: MStar Semiconductor, Inc.
    Inventors: Te-Chuan Wang, Tsung-Hsiu Ko
  • Publication number: 20180019214
    Abstract: Reinforcement structures used with a thinned wafer and methods of manufacture are provided. The method includes forming trenches or vias at least partially through a backside of a thinned wafer attached to a carrier wafer. The method further includes depositing material within the trenches or vias to form reinforcement structures on the backside of the thinned wafer. The method further includes removing excess material from a surface of the thinned wafer, which was deposited during the depositing of the material within the vias.
    Type: Application
    Filed: July 24, 2017
    Publication date: January 18, 2018
    Inventors: Ronald G. FILIPPI, Erdem KALTALIOGLU, Andrew T. KIM, Ping-Chuan WANG
  • Patent number: 9870612
    Abstract: A method includes inspecting a mask to locate a defect region for a defect of the mask. A phase distribution of an aerial image of the defect region is acquired. A point spread function of an imaging system is determined. One or more repair regions of the mask are identified based on the phase distribution of the aerial image of the defect region and the point spread function. A repair process is performed to the one or more repair regions of the mask to form one or more repair features.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: January 16, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shinn-Sheng Yu, Anthony Yen, Wen-Chuan Wang, Sheng-Chi Chin
  • Patent number: 9865514
    Abstract: A through-silicon via (TSV) capacitive test structure and method of determining TSV depth based on capacitance is disclosed. The TSV capacitive test structure is formed from a plurality of TSV bars that are evenly spaced. A first group of bars are electrically connected to form a first capacitor node, and a second group of bars is electrically connected to form a second capacitor node. The capacitance is measured, and a TSV depth is computed, prior to backside thinning. The computed TSV depth may then be fed to downstream grinding and/or polishing tools to control the backside thinning process such that the semiconductor wafer is thinned such that the backside is flush with the TSV.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: January 9, 2018
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Hanyi Ding, J. Edwin Hostetter, Ping-Chuan Wang, Kimball M. Watson
  • Patent number: 9866538
    Abstract: A data decryption circuit for decrypting a current encrypted data packet is provided. The current encrypted data packet includes a header and a payload. The data decryption circuit includes an operation unit and a decryption calculation unit. The operation unit generates first data according to the header and a pseudo-random number, second data according to a session key and a constant, and length information and start position information of the payload according to the header. The operation unit generates the first data, the second data, the length information and the start position information by executing a program code. The decryption calculation circuit, coupled to the operation unit, generates a decryption key according to the first and second data, retrieves the payload from the current encrypted data packet according to the start position information and the length information, and decrypts the payload by the decryption key.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: January 9, 2018
    Assignee: MStar Semiconductor, Inc.
    Inventors: Yii-Kai Wang, Te-Chuan Wang
  • Publication number: 20180005961
    Abstract: A semiconductor structure includes filled dual reinforcing trenches that reduce curvature of the semiconductor structure by stiffening the semiconductor structure. The filled dual reinforcing trenches reduce curvature by acting against transverse loading, axial loading, and/or torsional loading of the semiconductor structure that would otherwise result in semiconductor structure curvature. The filled dual reinforcing trenches may be located in an array throughout the semiconductor structure, in particular locations within the semiconductor structure, or at the perimeter of the semiconductor structure.
    Type: Application
    Filed: September 18, 2017
    Publication date: January 4, 2018
    Inventors: Erdem Kaltalioglu, Andrew T. Kim, Chengwen Pei, Ping-Chuan Wang
  • Publication number: 20170374242
    Abstract: A High-Definition Multimedia Interface (HDMI) receiving circuit receives an image signal and an input clock transmitted via HDMI and generates output data. The HDMI receiving circuit includes: a sampling circuit, sampling the image signal according to a transmission mode and the input clock to generate the output data; a data comparison circuit, coupled to the sampling circuit, determining whether the output data includes predetermined data to generate a determination result; and a control circuit, coupled to the sampling circuit and the data comparison circuit, determining the transmission mode according to the determination result.
    Type: Application
    Filed: February 3, 2017
    Publication date: December 28, 2017
    Inventors: Chun Wen Yeh, Shuo-Ting Kao, Te-Chuan Wang
  • Patent number: 9852999
    Abstract: A semiconductor structure includes filled dual reinforcing trenches that reduce curvature of the semiconductor structure by stiffening the semiconductor structure. The filled dual reinforcing trenches reduce curvature by acting against transverse loading, axial loading, and/or torsional loading of the semiconductor structure that would otherwise result in semiconductor structure curvature. The filled dual reinforcing trenches may be located in an array throughout the semiconductor structure, in particular locations within the semiconductor structure, or at the perimeter of the semiconductor structure.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: December 26, 2017
    Assignee: International Business Machines Corporation
    Inventors: Erdem Kaltalioglu, Andrew T. Kim, Chengwen Pei, Ping-Chuan Wang
  • Patent number: 9851542
    Abstract: An imaging lens including a first lens group, a second lens group, and an aperture stop is provided. The first lens group is disposed between an object side and an image side. The second lens group is disposed between the first lens group and the image side. The aperture stop is disposed between the first lens group and the second lens group. The imaging lens includes at least three cemented lenses, each of the cemented lenses includes at least one lens having non-zero refractive power, and at least one lens of each of the cemented lenses has an Abbe number greater than 80.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: December 26, 2017
    Assignee: Young Optics Inc.
    Inventors: Wei-Hao Huang, Kuo-Chuan Wang, Bing-Ju Chiang
  • Patent number: 9853614
    Abstract: An apparatus includes an amplifier and a first inductor coupled to an input of the amplifier. The apparatus also includes a second inductor that is inductively coupled to the first inductor and that couples the amplifier to a first supply node. The apparatus further includes a third inductor that is inductively coupled to the first inductor and to the second inductor and that couples the amplifier to a second supply node.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: December 26, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Chuan Wang, Dongling Pan
  • Patent number: D815665
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: April 17, 2018
    Assignee: XIAOMI INC.
    Inventors: Chuangqi Li, Fa Wang, Chuan Wang