Patents by Inventor Chun Chieh

Chun Chieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Attaching device and intermediate mechanism thereof, and attaching method
    Patent number: 11731413
    Abstract: An attaching apparatus, an intermediary mechanism thereof, and an attaching method are provided. The intermediary mechanism is provided for being selectively arranged between a pressing mechanism and a carrying mechanism. The intermediary mechanism includes a frame, a deformable sheet fixed on the frame, and an adhesive layer disposed on the deformable sheet. The frame is provided for being fastened to one of the pressing mechanism and the carrying mechanism. The adhesive layer is provided for adhering at least one attaching object onto one side of the deformable sheet facing the carrying mechanism. The deformable sheet is configured to be gradually deformed toward the carrying mechanism by being pressed with the pressing mechanism, so that the at least one attaching object is abutted against an attached object on the carrying mechanism.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: August 22, 2023
    Assignee: MIRLE AUTOMATION CORPORATION
    Inventors: Yen-Dao Lee, Chun-Chieh Lu, Shih-Chun Chen
  • RING FOR CLASPING CYLINDRICAL OBJECT
    Publication number: 20230256569
    Abstract: A ring for clasping a cylindrical object includes a first element, a second element and a switch mechanism. The second element is circumferentially butted with the first element, and one end of the first element is adjacent to one end of the second element. The end of the second element has a protrusion protruding outwardly. The switch mechanism includes an abutting member adjacent to the end of the first element and configured to be rotated to abut against or move away from the protrusion of the end of the second element. When the abutting member is rotated and abuts against the protrusion of the end of the second element, the second element is fixed; when the abutting member is rotated and moves away from the protrusion of the end of the second element, the second element is released.
    Type: Application
    Filed: March 16, 2022
    Publication date: August 17, 2023
    Inventors: YUNG-TAI PAN, YI-PING HSIEH, CHUN-CHIEH YEH
  • THERMAL MODULE
    Publication number: 20230262924
    Abstract: A thermal module includes a fan and a fin assembly. The fan has an air outlet. The fin assembly has multiple fins, and is disposed to the air outlet of the fan. The fins are disposed side by side to form multiple flow channels. Each of the flow channels has a first inlet, at least one second inlet, and an outlet. In each of the flow channels, a gas flow generated by the fan flows into the flow channel from the first inlet and flows out of the flow channel from the outlet, and a gas flow outside the fin assembly is drawn by the gas flow in the flow channel to flow into the flow channel from the at least one second inlet.
    Type: Application
    Filed: February 9, 2023
    Publication date: August 17, 2023
    Applicant: Acer Incorporated
    Inventors: Jau-Han Ke, Tsung-Ting Chen, Chun-Chieh Wang, Yu-Ming Lin, Cheng-Wen Hsieh, Wen-Neng Liao
  • Post-CMP cleaning and apparatus
    Patent number: 11728157
    Abstract: A method includes performing a first post Chemical Mechanical Polish (CMP) cleaning on a wafer using a first brush. The first brush rotates to clean the wafer. The method further includes performing a second post-CMP cleaning on the wafer using a second brush. The second brush rotates to clean the wafer. The first post-CMP cleaning and the second post-CMP cleaning are performed simultaneously.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fu-Ming Huang, Liang-Guang Chen, Ting-Kui Chang, Chun-Chieh Lin
  • Ferroelectric memory device and method of forming the same
    Patent number: 11729986
    Abstract: A ferroelectric memory device includes a multi-layer stack, a channel layer, a ferroelectric layer and oxygen scavenging layers. The multi-layer stack is disposed on a substrate and includes a plurality of conductive layers and a plurality of dielectric layers stacked alternately. The channel layer penetrates through the plurality of conductive layers and the plurality of dielectric layers. The ferroelectric layer is disposed between the channel layer and both of the plurality of conductive layers and the plurality of dielectric layers. The oxygen scavenging layers are disposed along sidewalls of the plurality of conductive layer. The plurality of oxygen scavenging layers laterally separate the ferroelectric layer from the plurality of conductive layers.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: August 15, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Lu, Sai-Hooi Yeong, Bo-Feng Young, Yu-Ming Lin, Chih-Yu Chang
  • Fan
    Patent number: 11719252
    Abstract: A fan adapted for being disposed in an electronic device is provided. The fan includes a hub and a plurality of metal blades respectively extending from the hub. Each of the metal blades has a root portion connected to the hub and an end portion away from the hub, and a mass of the end portion is greater than a mass of the root portion, such that the metal blade is elongated while the fan is rotated.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: August 8, 2023
    Assignee: Acer Incorporated
    Inventors: Yu-Ming Lin, Wen-Neng Liao, Cheng-Wen Hsieh, Chun-Chieh Wang, Han-Liang Huang, Sheng-Yan Chen, Tsung-Ting Chen
  • Optical lens, mold for optical lens and manufacturing method thereof
    Patent number: 11714215
    Abstract: An optical lens, mold for optical lens and manufacturing method thereof are provided, wherein the optical lens includes a spiral surface spiraling around an axial direction and an intermediate structure around which the spiral surface spirals, the intermediate structure extends axially relative to a side of the spiral surface, and two ends of the spiral surface defines a stepped difference. The structure of the mold and the optical lens are correspondingly complementary. The manufacturing method of the mold includes following steps of: providing a base, the base including a processing surface; processing the processing surface to form the spiral surface, the intermediate structure and the stepped difference of the mold.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: August 1, 2023
    Assignee: ORANGETEK CORPORATION
    Inventors: Chun-Chieh Chen, Chia-Jung Chang, Chih-Yi Huang, Chun-Yi Yeh
  • HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD FOR FORMING THE SAME
    Publication number: 20230238445
    Abstract: A high electron mobility transistor (HEMT) includes a substrate, a channel layer, a barrier layer and a passivation layer. A contact structure is disposed on the passivation layer and extends through the passivation layer and the barrier layer to directly contact the channel layer. The contact structure includes a metal layer, and the metal layer includes a metal material doped with a first additive. A weight percentage of the first additive in the metal layer is between 0% and 2%.
    Type: Application
    Filed: February 20, 2022
    Publication date: July 27, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ko-Wei Lin, Chun-Chieh Chiu, Chun-Ling Lin, Shu Min Huang, Hsin-Fu Huang
  • MODULATORS OF CYSTIC FIBROSIS TRANSMEMBRANE CONDUCTANCE REGULATOR
    Publication number: 20230233560
    Abstract: The present invention features a compound of formula I: or a pharmaceutically acceptable salt thereof, where R1, R2, R3, W, X, Y, Z, n, o, p, and q are defined herein, for the treatment of CFTR mediated diseases, such as cystic fibrosis. The present invention also features pharmaceutical compositions, method of treating, and kits thereof.
    Type: Application
    Filed: July 14, 2022
    Publication date: July 27, 2023
    Applicant: Vertex Pharmaceuticals Incorporated
    Inventors: Mark Thomas Miller, Corey Anderson, Vijayalaksmi Arumugam, Brian Richard Bear, Hayley Marie Binch, Jeremy J. Clemens, Thomas Cleveland, Erica Conroy, Timothy Richard Coon, Bryan A. Frieman, Peter Diederik Jan Grootenhuis, Raymond Stanley Gross, Sara Sabina Hadida-Ruah, Haripada Khatuya, Pramod Virupax Joshi, Paul John Krenitsky, Chun-Chieh Lin, Gulin Erdogan Marelius, Vito Melillo, Jason McCartney, Georgia McGaughey Nicholls, Fabrice Jean Denis Pierre, Alina Silina, Andreas P. Termin, Johnny Uy, Jinglan Zhou
  • Implant shredder and implant forming method
    Patent number: 11707551
    Abstract: An implant shredder includes a base and a cutting member. The base includes a first chamber and a second chamber intercommunicating with the first chamber. The first chamber includes an inlet. The second chamber includes an outlet. The cutting member is received in the second chamber. The cutting member is driven by a driving member to rotate. The cutting member includes a plurality of cutting edges located on a circumference of a same radius. The plurality of cutting edges is rotatably disposed adjacent to a location intercommunicating with the first chamber. An implant forming method includes creating data of an outline of an implant; producing a shaping mold based on the data; and cutting a to-be-processed object with the implant shredder, then mixing the to-be-proceed object with a biological tissue glue to obtain a raw material, and filling the raw material into the shaping mold to form the implant.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: July 25, 2023
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Yue-Jun Wang, Chun-Chieh Tseng, Tung-Lin Tsai
  • Method of forming semiconductor memory device
    Patent number: 11711916
    Abstract: A method of forming a semiconductor memory device includes the following steps. First of all, a substrate is provided, and a plurality of gates is formed in the substrate, along a first direction. Next, a semiconductor layer is formed on the substrate, covering the gates, and a plug is then in the semiconductor layer, between two of the gates. Then, a deposition process is performed to from a stacked structure on the semiconductor layer. Finally, the stacked structure is patterned to form a plurality of bit lines, with one of the bit lines directly in contact with the plug.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: July 25, 2023
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wei Chen, Hsu-Yang Wang, Chun-Chieh Chiu, Shih-Fang Tzou
  • PACKAGED CIRCUIT STRUCTURE
    Publication number: 20230232537
    Abstract: A package circuit structure includes a multilayer circuit board, an electronic component, and an insulating layer. The multilayer circuit board includes a metal portion and an opening. The opening is extending from a first side of the multilayer circuit board toward the second side of the multilayer circuit board facing the first side. A bottom of the opening is sealed by the metal portion. The electronic component is received in the opening and adhered to the metal portion. The electronic component is electrically connected to the multilayer circuit board and encapsulated in the opening by the insulating layer. A method for manufacturing the package circuit structure is also provided.
    Type: Application
    Filed: March 20, 2023
    Publication date: July 20, 2023
    Inventors: CHUN-CHIEH HUANG, CHIN-MING LIU
  • KEYBOARD DEVICE
    Publication number: 20230223215
    Abstract: A keyboard device includes a substrate, a keycap, and a link member. The keycap is disposed on the substrate and provided with a limiting member including a top wall, a bottom wall, and a slide groove. In the slide groove, the top wall has a first guide bevel and the bottom wall has a second guide bevel. The link member is disposed between the substrate and the keycap and includes a slide connection portion and a pivot connection portion. The slide connection portion is slidably disposed in the slide groove, and the pivot connection portion is pivotally connected to the substrate. When the keycap is pressed to move downwardly toward the substrate, the pivot connection portion of the link member is rotated with respect to the substrate, and the slide connection portion slides along the first guide bevel and the second guide bevel.
    Type: Application
    Filed: August 24, 2022
    Publication date: July 13, 2023
    Inventors: Chun-Chieh Chan, Chao-Chin Hsieh
  • Memory array gate structures
    Patent number: 11695073
    Abstract: A memory cell includes a thin film transistor over a semiconductor substrate. The thin film transistor comprising: a ferroelectric (FE) material contacting a word line, the FE material being a hafnium-comprising compound, and the hafnium-comprising compound comprising a rare earth metal; and an oxide semiconductor (OS) layer contacting a source line and a bit line, wherein the FE material is disposed between the OS layer and the word line.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: July 4, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Chieh Lu, Sai-Hooi Yeong, Bo-Feng Young, Yu-Ming Lin, Chih-Yu Chang
  • Interconnect Structure and Method of Forming Same
    Publication number: 20230201613
    Abstract: A semiconductor device comprises a first chip bonded on a second chip. The first chip comprises a first substrate and first interconnection components formed in first IMD layers. The second chip comprises a second substrate and second interconnection components formed in second IMD layers. The device further comprises a first conductive plug formed within the first substrate and the first IMD layers, wherein the first conductive plug is coupled to a first interconnection component and a second conductive plug formed through the first substrate and the first IMD layers and formed partially through the second IMD layers, wherein the second conductive plug is coupled to a second interconnection component.
    Type: Application
    Filed: March 6, 2023
    Publication date: June 29, 2023
    Inventors: Shu-Ting Tsai, Jeng-Shyan Lin, Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung
  • Light emitting device
    Patent number: 11685306
    Abstract: A light emitting device including a lighting unit and a conversion material is disclosed. The conversion material is configured to convert a part of the invisible light emitted from the lighting unit into a visible light, which indicates that the lighting unit is in operation. The spectral energy of visible light is less than 20% of the spectral energy measured within a wavelength range of 200 nm to 380 nm.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: June 27, 2023
    Assignee: LITE-ON TECHNOLOGY CORPORATION
    Inventors: Wei-Te Cheng, Kai-Chieh Liang, Kuo-Ming Chiu, Fang-Jung Sun, Chun-Chieh Chang, Yi-Fei Lee
  • Method for switching audiovisual interfaces and circuit system
    Patent number: 11689762
    Abstract: A method for switching audio-visual interfaces and a circuit system are provided. The circuit system is disposed in a sink device. A protocol layer circuit of each of audio-visual interfaces in the sink device includes a status and control data channel control module, which is used to respond to the signals sent by the video sources continuously when the sink device is connected with audio-visual sources via the audio-visual interfaces. The multiple video sources can accordingly send FRL (fixed rate link) signals to the sink device in response to responses made by the sink device. The protocol layer circuit includes an FRL audio-visual packet detection module that starts to detect a rate of an FRL and resolve audio-visual packets for obtaining audio-visual data for the audio-visual interface that the sink device switches to.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: June 27, 2023
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chun-Chieh Chan, Ming-An Wu, Hung-Shao Chen
  • TRANSMISSION CONTROL PROTOCOL FLOW CONTROL METHOD AND DEVICE FOR PERFORMING THE METHOD
    Publication number: 20230198904
    Abstract: A transmission control protocol (TCP) flow control method is provided, which comprises: sending a data packet from a packet processor to a receiver and storing a copy of the data packet; receiving a current ACK packet with a current packet number; determining whether the current packet number is identical to a last packet number and whether a last substitute ACK packet generated by the input ACK filter exists; and performing steps respectively corresponding to different results of this determination to avoid TCP congestion control timely. A TCP flow control device performing the method is also disclosed.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 22, 2023
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Jui TSAO, Chuan-Yu CHO, Chun-Chieh HUANG
  • Projector
    Patent number: D992012
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: July 11, 2023
    Assignee: Acer Incorporated
    Inventors: Chun-Chieh Liu, Wei-Chen Lee
  • Torch and torch base
    Patent number: D993730
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: August 1, 2023
    Assignee: Zippo Manufacturing Company
    Inventors: Brian J. Barber, Yu Wei Hsu, Chun Chieh Hu