Abstract: This disclosure provides a battery management system. The battery management system comprises a buck converter, a discharge loop, and a microprocessor. The microprocessor comprises a battery status monitoring circuit, a timer, and a controller. When the status of the battery is in a static state, the timer starts counting a time. If the time counted by the timer is greater than or equal to a time threshold, the controller controls that the buck converter executes a bucking to an output voltage of the battery, and then controls that the discharge loop executes a discharging to the battery. Accordingly, when the status of the battery is in a static state, the battery capacity can be discharged to a safe value moderately, so that the safety of the long-storage of the battery can be ensured, and the life of the battery can be prolonged.

Abstract: A device includes a multi-layer stack, a channel layer, a ferroelectric layer and buffer layers. The multi-layer stack is disposed on a substrate and includes a plurality of conductive layers and a plurality of dielectric layers stacked alternately. The channel layer penetrates through the plurality of conductive layers and the plurality of dielectric layers. The ferroelectric layer is disposed between the channel layer and each of the plurality of conductive layers and the plurality of dielectric layers. The buffer layers include a metal oxide, and one of the buffer layers is disposed between the ferroelectric layer and each of the plurality of dielectric layers.

Abstract: A storage device sharing system and a storage device sharing method are provided. The storage device sharing system includes a storage device, a first chip and a second chip. The first chip and the second chip are configured to enter a toggle mode and an arbitration mode. In the toggle mode, the first chip that acts as the master controls the arbitration potential to a first control potential and a second control potential, and communicates with the storage device in response to the arbitration potential being the first control potential, and the second chip that acts as a slave communicates with the storage device in response to the arbitration potential being the second control potential.

Abstract: An image conversion device includes: a lens module configured to allow passing of image light beams of an object, an optical waveguide element configured to transmit the image light beams to a light processing component, and an image sensor configured to convert the image light beams into digital image signals. By changing image capturing and image forming methods, higher image quality may be achieved and expanding flexibility may be maintained.

Abstract: A key structure includes a bottom plate, at least one keycap, and a thin-film circuit board. The bottom plate has at least one elastic protruding portion. The keycap is liftably connected to the bottom plate and has a press portion and at least one trigger portion. The press portion is located at a central region of the keycap and faces the elastic protruding portion, and the trigger portion is located at a peripheral region of the keycap. When the key is lowered from a first position to a second position relatively to the bottom plate, the press portion downwardly presses the elastic protruding portion, and the press portion triggers an electrical trigger point of the thin-film circuit board. The keycap is adapted to be restored from the second position to the first position through an elastic force of the elastic protruding portion.

Abstract: An optical transmission device is provided. A substrate includes an optical transmission channel exposed on its end surface, and a first positioning portion. A jumper includes a mounting portion abutting the end surface and a second positioning portion engaged to the first positioning portion. An optical fiber is mounted to the mounting portion, and the end surface of the optical fiber aligns with the optical transmission channel. The coupling method of the optical transmission device includes steps: forming at least one first hole on the substrate, forming an optical transmission layer with at least one optical transmission channel on the substrate, forming an alignment mark on the optical transmission layer within the first hole, forming at least one second hole on the substrate based on the alignment mark, and connecting the jumper to the second hole and make the jumper abutting against the substrate.

Abstract: An implant shredder includes a base and a cutting member. The base includes a first chamber and a second chamber intercommunicating with the first chamber. The first chamber includes an inlet. The second chamber includes an outlet. The cutting member is received in the second chamber. The cutting member is driven by a driving member to rotate. The cutting member includes a plurality of cutting edges located on a circumference of a same radius. The plurality of cutting edges is rotatably disposed adjacent to a location intercommunicating with the first chamber. An implant forming method includes creating data of an outline of an implant; producing a shaping mold based on the data; and cutting a to-be-processed object with the implant shredder, mixing the cut to-be-proceed object with a biological tissue glue to obtain a raw material, and filling the raw material into the shaping mold to form the implant.

Abstract: A signal transmission structure configured to transmit signals between an image module and an application processor is provided. An optoelectronic composite board including a circuit board and an optical waveguide module, and is configured to simultaneously transmit digital signals between the image module and the application processor in the form of electric and optical signals. By using the signal transmission structure having both electric and optical signals, transferring of a larger quantity of signals is enabled and transmission of digital data is accelerated.

Abstract: A key structure includes a bottom plate, at least one keycap, and a thin-film circuit board. The bottom plate has at least one elastic protruding portion. The keycap is liftably connected to the bottom plate and has a press portion and at least one trigger portion. The press portion is located at a central region of the keycap and faces the elastic protruding portion, and the trigger portion is located at a peripheral region of the keycap. When the key is lowered from a first position to a second position relatively to the bottom plate, the press portion downwardly presses the elastic protruding portion, and the press portion triggers an electrical trigger point of the thin-film circuit board. The keycap is adapted to be restored from the second position to the first position through an elastic force of the elastic protruding portion.

Abstract: A transmission device for guiding a transmission signal is provided, including: a substrate including a signal guide configured to guide the transmission signal; and a refractor arranged on the substrate and corresponding to the signal guide, the refractor provided with a progressive refractive index with which a divergence angle of the transmission signal progressively varies within the refractor.

Abstract: In a method of manufacturing a negative capacitance structure, a dielectric layer is formed over a substrate. A first metallic layer is formed over the dielectric layer. After the first metallic layer is formed, an annealing operation is performed, followed by a cooling operation. A second metallic layer is formed. After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase.

Abstract: A tool for a bone implant includes a rod and an adaptor. The rod includes a coupling portion having a through-hole. The rod further includes a measuring arm connected to the coupling portion and a force applying arm connected to the coupling portion. The measuring arm includes a first extension section having a first indicator portion, and the force applying arm includes a second extension section having a second indicator portion. The force applying arm is elastically deformable away from the measuring arm to displace the second extension section relative to the first extension section. The adaptor is coupled in the through-hole and includes an outer ring and an inner ring. The outer ring is rotatable relative to the inner ring in a single direction.

Abstract: A method of forming a memory device includes: forming a first layer stack and a second layer stack successively over a substrate, the first layer stack and the second layer stack having a same layered structure that includes a dielectric material, a channel material over the dielectric material, and a source/drain material over the channel material; forming openings that extend through the first layer stack and the second layer stack; forming inner spacers by replacing portions of the source/drain material exposed by the openings with a first dielectric material; lining sidewalls of the openings with a ferroelectric material; forming gate electrodes by filling the openings with an electrically conductive material; forming a recess through the first layer stack and the second layer stack, the recess extending from a sidewall of the second layer stack toward the gate electrodes; and filling the recess with a second dielectric material.

Abstract: A display control integrated circuit (IC) applicable to performing real-time video content text detection and speech automatic generation in a display device may include a pre-processing circuit, a character recognition circuit and a post-processing circuit. The pre-processing circuit may input a video signal to obtain a real-time video content carried by the video signal, and perform preliminary text detection on the real-time video content to generate a series of segmented character images to indicate a subtitle. The character recognition circuit may perform character recognition on the series of segmented character images to generate a series of characters, respectively. The post-processing circuit may perform vocabulary correction on the series of characters to selectively replace any erroneous character with a correct character to generate one or more vocabularies, for performing speech automatic generation.

Abstract: A method of forming an integrated circuit structure includes forming a gate dielectric on a wafer, forming a work function layer over the gate dielectric, depositing a capping layer over the work function layer, soaking the capping layer in a silicon-containing gas to form a silicon-containing layer, forming a blocking layer after the silicon-containing layer is formed, and forming a metal-filling region over the blocking layer.

Abstract: The invention provides a silicide capacitive micro electromechanical structure and fabrication method thereof, comprising a substrate, a passivation layer, a silicon layer, a first metal layer, and a dielectric layer. The passivation layer is formed on the substrate; the silicon layer and the first metal layer are formed on the passivation layer. The first metal layer includes a contact part and a conductive part. The contact parts contact at least a part of the silicon layer, and the conductive portion extends away from the silicon layer to electrically connect an external circuit. The dielectric layer is formed on the passivation layer, and at least the silicon layer and the first metal layer are covered by the dielectric layer. After an annealing process is performed, the conductive portion remains in contact with the silicon layer after the silicidation reaction to maintain an electrical connection with the external circuit.

Abstract: Buffing of a footwear component allows for an alteration of the component surface to achieve an intended surface for aesthetics and/or manufacturing purposes. The buffing is performed in a system having a vision module, a sidewall buffing module, an up surface buffing module, and a down surface buffing module. Each of the buffing modules are adapted for the unique shape and sizes of a footwear component to effectively and automatically buff the footwear component.

Abstract: A ferroelectric memory device includes a multi-layer stack, a channel layer and a III-V based ferroelectric layer. The multi-layer stack is disposed on a substrate and includes a plurality of conductive layers and a plurality of dielectric layers stacked alternately. The channel layer penetrates through the plurality of conductive layers and the plurality of dielectric layers of the multi-layer stack. The III-V based ferroelectric layer is disposed between the channel layer and the multi-layer stack, and includes at least one element selected from Group III elements, at least one element selected from Group V elements, and at least one element selected from transition metal elements.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure formed over a fin structure, and a source/drain (S/D) epitaxial layer formed in the fin structure and adjacent to the gate structure. The semiconductor structure also includes a S/D silicide layer formed on the S/D epitaxial layer, and the S/D silicide layer has a first width, the S/D epitaxial layer has a second width, and the first width is smaller than the second width. The semiconductor structure includes a dielectric spacer between the gate structure and the S/D silicide layer, and a top surface of the dielectric spacer is lower than a top surface of the gate structure.

Abstract: An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a conductive plug over a substrate; a conductive feature over the conductive plug, wherein the conductive feature has a first sidewall, a second sidewall facing the first sidewall, and a bottom surface; and a carbon-containing barrier layer having a first portion along the first sidewall of the conductive feature, a second portion along the second sidewall of the conductive feature, and a third portion along the bottom surface of the conductive feature.