Abstract: A restricted region transform method and a restricted region transform device are disclosed. The method includes following steps: reading out bare board information of a printed circuit board and layout information of a plurality of components, wherein the layout information of the plurality of components corresponds to a plurality of physical restricted regions; setting a first region according to edge information in the bare board information; setting a plurality of second regions according to projections of the plurality of physical restricted regions on a surface of the printed circuit board; selecting every two second regions, which overlap each other, among the plurality of second regions, and the selected second regions constituting a restriction conflict set; and selectively amending the second regions in the restriction conflict set to remove one or more overlaps from the second regions in the restriction conflict set.

Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, and a first drain pad. The source electrode, the drain electrode, and the gate electrode are disposed, on an active region of the active layer. The first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode. The first source pad and the first drain pad are disposed on the first insulating layer and the active region. The first source pad includes a first source body and a first source branch. The first source branch is electrically connected to the first source body and disposed on the source electrode. The first drain pad includes a first drain body and a first drain branch. The first drain branch is electrically connected to the first drain body and disposed on the drain electrode.

Abstract: Semiconductor devices, methods of manufacturing thereof, and image sensor devices are disclosed. In some embodiments, a semiconductor device comprises a semiconductor chip comprising an array region, a periphery region, and a through-via disposed therein. The semiconductor device comprises a guard structure disposed in the semiconductor chip between the array region and the through-via or between the through-via and a portion of the periphery region.

Abstract: The present disclosure proposes a handover management method and a base station having a smart antenna using the same method. A transceiver of the base station transmits and receives wireless data. An interface controller of the base station transmits a source beam-forming information and receives a target beam-forming information.

Abstract: Methods for improving hybrid bond yield for semiconductor wafers forming 3DIC devices includes first and second wafers having dummy and main metal deposited and patterned during BEOL processing. Metal of the dummy metal pattern occupies from about 40% to about 90% of the surface area of any given dummy metal pattern region. High dummy metal surface coverage, in conjunction with utilization of slotted conductive pads, allows for improved planarization of wafer surfaces presented for hybrid bonding. Planarized wafers exhibit minimum topographic differentials corresponding to step height differences of less than about 400 ?. Planarized first and second wafers are aligned and subsequently hybrid bonded with application of heat and pressure; dielectric-to-dielectric, RDL-to-RDL. Lithography controls to realize WEE from about 0.5 mm to about 1.5 mm may also be employed to promote topographic uniformity at wafer edges.

Abstract: A semiconductor device includes a carrier, a substrate, light-sensing devices and a bonding layer. The substrate overlies the carrier, and has a first surface and a second surface opposite to the first surface. The substrate includes inverted pyramid recesses in the second surface. The light-sensing devices are disposed on the first surface of the substrate. The bonding layer is disposed between the substrate and the carrier.

Abstract: A control method of speeding up light emission of a laser diode includes the following steps. First step is to boost the supply voltage from a first voltage potential to a second voltage potential before an emission period. At the beginning of the emission period, a current path conducts through the laser diode and a current source. One terminal of the laser diode is coupled to the current source, and the other terminal of the laser diode connects the supply voltage. When the current path is being conducted, the current source is in the transient state and provides a transient driving current; and the voltage difference between the two terminals of the laser diode is generated in response to the second voltage potential and is related to the transient driving current. When the transient driving current is larger than a threshold, the laser diode emits light.

Abstract: A computing device includes a display and a fluid channel. The fluid flannel includes channel sections and fluid. The fluid may move between respective channel sections to redistribute a eight of the computing device.

Abstract: A lithium battery cell structure is provided. A first-electrode conduction portion and a second-electrode conduction portion that are exposed outward are respectively provided on two sides of a soft package lithium battery inside the metal housing. The first-electrode conduction portions are respectively electrically connected and fixed to a first-electrode conductive sheet, and the first-electrode conductive sheet is electrically connected and fixed to a housing conductive sheet that is connected to the metal housing. The second-electrode conduction portions are respectively electrically connected and fixed to a second-electrode conductive sheet, and an other end of the second-electrode conductive sheet is electrically connected and fixed to the second electrode end.

Abstract: A package structure of a soft package lithium battery is provided. Two joining sheets that are correspondingly joined are provided at positions at which peripheries of covering films are press-fit on each tab. Each of the joining sheets has a first press-fit area and a second press-fit area. Joining surfaces of the first press-fit areas of the two joining sheets are correspondingly joined to each other and fixedly sandwich the tab therebetween. The second press-fit area is folded downward away from the tab to the first press-fit area, and the second press-fit areas are press-fit and fixed to the covering films. The concave surface formed by folding between the first press-fit area and the second press-fit area of each of the joining sheets alleviates the problem that hot gases generated during battery discharging exerts an upward force to generate a gap at the press-fit position and lead to electrolyte leakage, thereby prolonging the service life of the battery.

Abstract: A method for interference coordination, a network server, and a communication system are provided. The method includes the following steps. A first macrocell almost blank subframe (ABS) pattern is received from a first macrocell. A second macrocell ABS pattern is received from a second macrocell. A first small cell ABS pattern for a first small cell is determined according to the first macrocell ABS pattern and the second macrocell ABS pattern. The first small cell ABS pattern is transmitted to the first small cell. The first small cell is within a coverage of the first macrocell.

Abstract: A micro-electro-mechanical system (MEMS) chip package including a circuit substrate, a driving chip and a MEMS sensor is provided. The circuit substrate has a first surface and a second surface opposite thereto. The driving chip is embedded within the circuit substrate and includes a first signal transmission electrode, a second signal transmission electrode and a third signal transmission electrode. The MEMS sensor is disposed on the first surface of the circuit substrate. The circuit substrate includes at least one first conductive wiring electrically connected with the first signal transmission electrode and at least one second conductive wiring electrically connected with the second signal transmission electrode. The first conductive wiring is merely exposed at the first surface and the second conductive wiring is merely exposed at the second surface. The MEMS sensor is electrically connected with the first signal transmission electrode through the first conductive wiring.

Abstract: A plug connector includes a connector body defining a rear cable supporting platform with opposite first and second surfaces, a plurality of terminals and a cable. The terminal includes a pair of USB 2.0 signal soldering legs, a grounding and power soldering legs exposed to the first surface of the supporting platform and a detecting soldering leg, an additional power and grounding soldering legs exposed to the second surface. Wires of the cable consist of a pair of USB 2.0 signal wires, a power wire, a grounding wire welded with corresponding soldering legs on the first surface. The second surface of the supporting platform is further located with a SMT type resistor with a first leg and a second leg, the first leg is connected with the detecting soldering leg, the second leg is connected with the additional power soldering leg or the additional grounding soldering leg.

Abstract: An integrated circuit structure includes a first conductive line, a dielectric layer over the first conductive line, a diffusion barrier layer in the dielectric layer, and a second conductive line in the dielectric layer. The second conductive line includes a first portion of the diffusion barrier layer. A via is underlying the second conductive line and electrically couples the second conductive line to the first conductive line. The via includes a second portion of the diffusion barrier layer, with the second portion of the diffusion barrier layer having a bottom end higher than a bottom surface of the via.

Abstract: The present invention proposes a relaxation state evaluation system and method and a computer program product thereof. The method comprises steps: measuring ECG data of a user; analyzing the ECG data to generate a first, second, third and fourth parameters, wherein the first parameter is the short-scale entropy slope of the user before cardiovascular disease treatment (CVDT); the second parameter is the difference of the post-CVDT and pre-CVDT mean RR intervals; the third parameter is the logarithm of the variance of the pre-CVDT high frequency NN intervals; the fourth parameter is the logarithm of the ratio of the variances of the pre-CVDT low frequency and high frequency NN intervals; working out an evaluation index, which is a function of the abovementioned parameters; and evaluating the relaxation state of the user, wherein the user is determined to be in a relaxation state if the evaluation index is over a threshold.

Abstract: A system and a method for multi-modal fusion based fault tolerant video content recognition is disclosed. The method conducts multi-modal recognition on an input video to extract multiple components and their respective appearance time in the video. Next, the multiple components are categorized and recognized respectively via different algorithms. Next, when the recognition confidence of any component is insufficient, a cross-validation with other components is performed to increase the recognition confidence and improve the fault tolerance of the components. Furthermore, when the recognition confidence of an individual component is insufficient, the recognition continues and tracks the component, spatially and temporally when it applies, until frames of high recognition confidence in the continuous time period is reached.

Abstract: The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units.

Abstract: The disclosure describes an exemplary binding layer formed on Aluminum (Al) substrate that binds the substrate with a coated material. Additionally, an extended form of the binding layer is described. By making a solution containing Al-transition metal elements-P—O, the solution can be used in slurry making (the slurry contains active materials) in certain embodiments. The slurry can be coated on Al substrate followed by heat treatment to form a novel electrode. Alternatively, in certain embodiments, the solution containing Al-transition metal elements-P—O can be mixed with active material powder, after heat treatment, to form new powder particles bound by the binder.

Abstract: The present invention utilizes a barrier layer in the contact hole to react with an S/D region to form a silicide layer. After forming the silicide layer, a directional deposition process is performed to form a first metal layer primarily on the barrier layer at the bottom of the contact hole, so that very little or even no first metal layer is disposed on the barrier layer at the sidewall of the contact hole. Then, the second metal layer is deposited from bottom to top in the contact hole as the deposition rate of the second metal layer on the barrier layer is slower than the deposition rate of the second metal layer on the first metal layer.