Patents by Inventor Chun Chieh

Chun Chieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9715575
    Abstract: A method includes obtaining image data for a patient. The image data corresponds to acquisition data from an imaging acquisition from a set of planned image acquisitions in an examination plan for the patient. The method further includes analyzing the image data with a processor based on an imaging practice guideline and producing electronically formatted data indicative of the analysis. The processor generates a signal indicative of a recommendation of a change to the examination plan based on the data indicative of the analysis.
    Type: Grant
    Filed: March 19, 2012
    Date of Patent: July 25, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Eric Cohen-Solal, Michael Chun-Chieh Lee, Stefanie Remmele, Sebastian Peter Michael Dries, Julien Senegas, Matthew Joseph Walker
  • Publication number: 20170200612
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a semiconductor substrate. The dielectric layer has a first recess. The method includes forming a first conductive material layer over an inner wall and a bottom of the first recess. The first conductive material layer is partially filled in the first recess. The method includes performing a reflow process to convert the first conductive material layer into a first conductive layer. The first conductive layer has a second recess in the first recess. The method includes performing an electroplating process or an electroless plating process to form a second conductive layer over the first conductive layer so as to fill the second recess.
    Type: Application
    Filed: March 10, 2017
    Publication date: July 13, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Rueijer LIN, Chen-Yuan KAO, Chun-Chieh LIN, Huang-Yi HUANG
  • Publication number: 20170196862
    Abstract: The present invention features a compound of formula I: or a pharmaceutically acceptable salt thereof, where R1, R2, R3, W, X, Y, Z, n, o, p, and q are defined herein, for the treatment of CFTR mediated diseases, such as cystic fibrosis. The present invention also features pharmaceutical compositions, method of treating, and kits thereof.
    Type: Application
    Filed: October 6, 2015
    Publication date: July 13, 2017
    Applicant: Vertex Pharmaceuticals Incorporated
    Inventors: Mark Thomas Miller, Corey Anderson, Vijayalaksmi Arumugam, Brian Richard Bear, Hayley Marie Binch, Jeremy J. Ciemens, Thomas Cleveland, Erica Conroy, Timothy Richard Coon, Bryan A. Frieman, Peter Diederik Jan Grootenhuis, Raymond Stanley Gross, Sara Sabina Hadida-Ruah, Haripada Khatuya, Pramod Virupax Joshi, Paul John Krenitsky, Chun-Chieh Lin, Gulin Erdogan Marelius, Vito Melillo, Jason McCartney, Georgia McGaughey Nicholls, Fabrice Jean Denis Pierre, Alina Silina, Andreas P. Termin, Johnny Uy, Jinglan Zhou
  • Patent number: 9705237
    Abstract: An electrical connector has a mating cavity opening forwardly. The electrical connector has a main body, a terminal module and a sealing member. The terminal module has an insulator and a plurality of conductive terminals received therein. The conductive terminals have contacting portions exposed into the mating cavity and connecting legs. The terminal module is received in the main body. The sealing member is filled in a gap between the terminal module and main body to seal the gap.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: July 11, 2017
    Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Chun-Chieh Yang, Zhi-Hui Zhu, Qin-Xin Cao
  • Patent number: 9703086
    Abstract: A beam splitter contains: a body, a main reflection portion, a sub reflection portion, and a refraction portion. The body includes an inlet and an outlet. The main reflection portion is located on a first side of the body, and the main reflection portion and the outlet have a first rotating angle and a second rotating angle respectively so that the main reflection portion reflects an external beam to produce a main beam. The sub reflection portion is located on the first side of the body, and the sub reflection portion reflects the external beam to produce a sub beam. The refraction portion is located on a second side of the body and has a third rotating angle different from the inlet, the sub beam projects out of the refraction portion to produce a deflective projection angle of the sub beam.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: July 11, 2017
    Assignee: ORANGETEK CORPORATION
    Inventors: Po-Chuan Chen, Chun-Chieh Chen, Hsuan-Yi Li
  • Patent number: 9704827
    Abstract: The present disclosure relates to a multi-dimensional integrated chip having a redistribution layer vertically extending between integrated chip die, which is laterally offset from a back-side bond pad. The multi-dimensional integrated chip has a first integrated chip die with a first plurality of metal interconnect layers disposed within a first inter-level dielectric layer arranged onto a front-side of a first semiconductor substrate. The multi-dimensional integrated chip also has a second integrated chip die with a second plurality of metal interconnect layers disposed within a second inter-level dielectric layer abutting the first ILD layer. A bond pad is disposed within a recess extending through the second semiconductor substrate. A redistribution layer vertically extends between the first plurality of metal interconnect layers and the second plurality of metal interconnect layers at a position that is laterally offset from the bond pad.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: July 11, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sin-Yao Huang, Chun-Chieh Chuang, Ching-Chun Wang, Sheng-Chau Chen, Dun-Nian Yaung, Feng-Chi Hung, Yung-Lung Lin
  • Publication number: 20170194190
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 6, 2017
    Inventors: CHING-CHUNG SU, JIECH-FUN LU, JIAN WU, CHE-HSIANG HSUEH, MING-CHI WU, CHI-YUAN WEN, CHUN-CHIEH FANG, YU-LUNG YEH
  • Publication number: 20170194691
    Abstract: An electronic device including: an inner housing portion and an outer housing portion, the inner housing portion having a cavity, the outer housing portion having an opening; and an antenna assembly including a substrate accommodated in the cavity, a ground element on the substrate, a conductive adhesive portion on the ground element and affixed to the outer housing portion, and a positioning portion on the substrate and received in the opening.
    Type: Application
    Filed: December 29, 2016
    Publication date: July 6, 2017
    Inventors: LU-CANG QIN, CHUN-CHIEH TSENG, CHI-HSUAN CHANG, HAI-BING LIU, CHANG-CHING LIN, CHAO-TUNG HUANG
  • Publication number: 20170192214
    Abstract: A beam splitter contains: a body, a main reflection portion, a sub reflection portion, and a refraction portion. The body includes an inlet and an outlet. The main reflection portion is located on a first side of the body, and the main reflection portion and the outlet have a first rotating angle and a second rotating angle respectively so that the main reflection portion reflects an external beam to produce a main beam. The sub reflection portion is located on the first side of the body, and the sub reflection portion reflects the external beam to produce a sub beam. The refraction portion is located on a second side of the body and has a third rotating angle different from the inlet, the sub beam projects out of the refraction portion to produce a deflective projection angle of the sub beam.
    Type: Application
    Filed: December 30, 2015
    Publication date: July 6, 2017
    Inventors: Po-Chuan CHEN, Chun-Chieh CHEN, Hsuan-Yi LI
  • Publication number: 20170181857
    Abstract: An acetabular cup structure of the present invention includes a ball-and-socket prosthesis and a liner, where a ball wall of the ball-and-socket prosthesis has a groove formed by connecting at least two continuous straight lines, and the groove connects an outer surface of the ball wall to an inner surface of the ball wall, so that an expandable sheet is formed between the groove formed by connecting the at least two continuous straight lines and having an angle there-between and two ends of the groove that are not connected, and the liner, for connecting a femoral stem, is tightly attached to the inner surface of the ball wall, and when the liner is tightly attached to the inner surface of the ball wall, the liner presses the sheet and extends to the groove, so that the liner is attached to the ball-and-socket prosthesis more tightly.
    Type: Application
    Filed: July 21, 2016
    Publication date: June 29, 2017
    Inventors: Wei-Ching WANG, Yih-Wen TARNG, Bing-Feng HUANG, Chia-Min WEI, Chun-Chieh WANG
  • Publication number: 20170187767
    Abstract: A method for detecting data stream synchronization includes receiving a first data stream, verifying a first data sequence corresponding to a first data sequence field, generating a first flag of successful synchronization verification when the first data sequence is successfully verified, verifying a second data sequence corresponding to a second data sequence field, and generating a second flag of successful synchronization verification when the second data sequence is successfully verified.
    Type: Application
    Filed: November 29, 2016
    Publication date: June 29, 2017
    Inventor: Chun-Chieh Wang
  • Patent number: 9685586
    Abstract: A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure mainly includes a stress control layer disposed between a light emitting layer and a p-type carrier blocking layer. The p-type carrier blocking layer is made from AlxGa1-xN (0<x<1) while the stress control layer is made from AlxInyGa1-x-yN (0<x<1, 0<y<1, 0<x+y<1). The light emitting layer has a multiple quantum well structure formed by a plurality of well layers and barrier layers stacked alternately. There is one well layer disposed between the two barrier layers. Thereby the stress control layer not only improves crystal quality degradation caused by lattice mismatch between the p-type carrier blocking layer and the light emitting layer but also reduces effects of compressive stress on the well layer caused by material differences.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: June 20, 2017
    Assignee: Genesis Photonics Inc.
    Inventors: Chi-Feng Huang, Ching-Liang Lin, Shen-Jie Wang, Jyun-De Wu, Yu-Chu Li, Chun-Chieh Lee
  • Publication number: 20170170667
    Abstract: A power supply system using an energy storage cell includes at least one lithium cell module; a voltage balance device, received and built in the lithium cell module, for performing voltage balance; and a cell module voltage monitoring device, disposed between a load and the lithium cell module, for monitoring and controlling working voltage ranges of all the lithium cell modules. The voltage balance device built in each lithium cell module performs charging correction on a lithium cell unit in which a capacitance difference is caused by a fabrication process or caused subsequently, to prevent overcharge damage of the lithium cell unit caused by the capacitance difference. The cell module voltage monitoring device is provided on an external line, and only a correct total charge voltage needs to be provided to charge the lithium cell module.
    Type: Application
    Filed: July 1, 2015
    Publication date: June 15, 2017
    Inventors: Tsun-Yu CHANG, Chun-Chieh CHANG
  • Publication number: 20170167043
    Abstract: The present invention provides an electrolyte for surface treatment of a metal implant including 10-30 wt % of a sulfur-containing compound aqueous solution, 3-10 wt % of a phosphorous-containing compound aqueous solution, 0.5-2 wt % of an oxidant aqueous solution, and 0.5-5 wt % of a surfactant aqueous solution, with the rest being water. The concentration of the sulfur-containing compound aqueous solution is 0.1-3 M. The concentration of the phosphorous-containing compound aqueous solution is 0.05-2 M. The concentration of the oxidant aqueous solution is 0.05-1 M. The concentration of the surfactant aqueous solution is 0.05-5 M. As such, it is able to utilize the electrolyte for treating a surface of a metal implant, forming a porous oxide layer on the surface of the metal implant.
    Type: Application
    Filed: December 14, 2015
    Publication date: June 15, 2017
    Inventors: Li-Wen Weng, Chun-Chieh Tseng, Yue-Jun Wang, Ho-Chung Fu, Tzyy-Ker Sue
  • Patent number: 9679813
    Abstract: A semiconductor process for forming a plug includes the following steps. A dielectric layer having a recess is formed on a substrate. A titanium layer is formed to conformally cover the recess. A first titanium nitride layer is formed to conformally cover the titanium layer, thereby the first titanium nitride layer having first sidewall parts. The first sidewall parts of the first titanium nitride layer are pulled back, thereby second sidewall parts being formed. A second titanium nitride layer is formed to cover the recess. Moreover, a semiconductor structure formed by said semiconductor process is also provided.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: June 13, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Pin-Hong Chen, Kuo-Chih Lai, Chia Chang Hsu, Chun-Chieh Chiu, Li-Han Chen, Shu Min Huang, Min-Chuan Tsai, Hsin-Fu Huang, Chi-Mao Hsu
  • Publication number: 20170162622
    Abstract: BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region and the periphery region; forming a first dielectric layer over the BARC; a metal shield is formed; selectively removing the metal shield from over the sensor array region; selectively removing the first dielectric layer from over the sensor array region, wherein a portion of the first thickness of the BARC is also removed and a remainder of the first thickness of the BARC remains during the process of selectively removing the first dielectric layer; forming a second dielectric layer over the remainder of the BARC and over the metal shield; and forming a passivation layer over the second dielectric layer.
    Type: Application
    Filed: February 20, 2017
    Publication date: June 8, 2017
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Keng-Yu Chou, Shuang-Ji Tsai, Min-Feng Kao
  • Patent number: 9671070
    Abstract: An LED spherical lamp includes a base, a power supply unit, a substrate and a cover. The power supply unit is installed inside the base, and the substrate has plural LED light emitting elements and is coupled to a side of the base, and the cover is fixed to the base for covering the substrate. The LED spherical lamp includes an electrical connector installed to the substrate and having a plurality of electrical terminals for electrically connecting the substrate to the power supply unit, and an engaging slot is concavely formed on a side of the electrical connector, such that the power supply unit drives the LED light emitting elements to achieve the lighting effect. The LED spherical lamp has the effects of simplifying the assembling and manufacturing procedure, assuring the electrical conduction of components, and facilitating the maintenance, repair, and replacement of the components.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: June 6, 2017
    Assignee: Unity Opto Technology Co., Ltd.
    Inventors: Chih-Hsien Wu, Sen-Yuh Tsai, Chun-Chieh Huang, Yu-Chang Chen
  • Patent number: 9673280
    Abstract: A method comprises providing a semiconductor alloy layer on a semiconductor substrate, forming a gate structure on the semiconductor alloy layer, forming source and drain regions in the semiconductor substrate on both sides of the gate structure, removing at least a portion of the semiconductor alloy layer overlying the source and drain regions, and forming a metal silicide region over the source and drain regions.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: June 6, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chao Huang, Yee-Chia Yeo, Chao-Hsiung Wang, Chun-Chieh Lin, Chenming Hu
  • Patent number: 9673246
    Abstract: A method for fabricating a semiconductor device with improved bonding ability is disclosed. The method comprises providing a substrate having a front surface and a back surface; forming one or more sensor elements on the front surface of the substrate; forming one or more metallization layers over the front surface of the substrate, wherein forming a first metallization layer comprises forming a first conductive layer over the front surface of the substrate; removing the first conductive layer from a first region of the substrate; forming a second conductive layer over the front surface of the substrate; and removing portions of the second conductive layer from the first region and a second region of the substrate, wherein the first metallization layer in the first region comprises the second conductive layer and the first metallization layer in the second region comprises the first conductive layer and the second conductive layer.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: June 6, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Jhy-Ming Hung, Pao-Tung Chen
  • Patent number: D788768
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: June 6, 2017
    Assignee: Acer Incorporated
    Inventors: Chien-Yu Hsieh, Hsueh-Chih Peng, Chun-Chieh Chiu, Ju-Hsien Weng, Tzu-Hsiang Chang, Te-Ho Chen, Hsing-Yi Kao, Wei-Yi Li