Abstract: A semiconductor device comprises a first chip bonded on a second chip. The first chip comprises a first substrate and first interconnection components formed in first IMD layers. The second chip comprises a second substrate and second interconnection components formed in second IMD layers. The device further comprises a first conductive plug formed within the first substrate and the first IMD layers, wherein the first conductive plug is coupled to a first interconnection component and a second conductive plug formed through the first substrate and the first IMD layers and formed partially through the second IMD layers, wherein the second conductive plug is coupled to a second interconnection component.

Abstract: A light-emitting device and a control method are provided. The light-emitting device is applied to a memory module. The light-emitting device includes at least one memory module board, at least one light-emitting board and an application program unit. The at least one memory module board is connected with a host. Each light-emitting board includes plural light-emitting units and a control unit. The control unit controls a lighting mode of the plural light-emitting units. The control unit is electrically connected with the host through the corresponding memory module board. The application program unit generates a control signal. The control signal is transmitted to the control unit of each light-emitting board through the host. The control unit controls the corresponding light-emitting units according to the control signal.

Abstract: An electrolyte for surface treatment of a metal implant includes 10-30 wt % of a sulfur-containing compound aqueous solution, 3-10 wt % of a phosphorous-containing compound aqueous solution, 0.5-2 wt % of an oxidant aqueous solution, and 0.5-5 wt % of a surfactant aqueous solution, with the rest being water. The concentration of the sulfur-containing compound aqueous solution is 0.1-3 M. The concentration of the phosphorous-containing compound aqueous solution is 0.05-2 M. The concentration of the oxidant aqueous solution is 0.05-1 M. The concentration of the surfactant aqueous solution is 0.05-5 M. The electrolyte is utilized for treating a surface of a metal implant, forming a porous oxide layer on the surface of the metal implant.

Abstract: Semiconductor devices, methods of manufacturing thereof, and image sensor devices are disclosed. In some embodiments, a semiconductor device comprises a semiconductor chip comprising an array region, a periphery region, and a through-via disposed therein. The semiconductor device comprises a guard structure disposed in the semiconductor chip between the array region and the through-via or between the through-via and a portion of the periphery region.

Abstract: An acoustic transducer includes a base plate, a vibrating membrane and a back plate. The vibrating membrane covers an opening of the base plate and has a plurality of conjoint vibratile portions. The acoustic transducer further has a connecting portion that is connected to a boundary between each two of the adjacent vibratile portions so as to allow the vibratile portions to generate vibration independently. The vibratile portions are geometrically different. Thereby, the vibratile portions can vibrate independently. This allows a designer to easily enhance the dynamic range of the acoustic transducer by geometrically modifying the vibrating membrane without increasing the total area of the vibrating membrane while maintaining a certain good degree of sensitivity and signal-to-noise ratio.

Abstract: An integrated circuit structure includes a first conductive line, a dielectric layer over the first conductive line, a diffusion barrier layer in the dielectric layer, and a second conductive line in the dielectric layer. The second conductive line includes a first portion of the diffusion barrier layer. A via is underlying the second conductive line and electrically couples the second conductive line to the first conductive line. The via includes a second portion of the diffusion barrier layer, with the second portion of the diffusion barrier layer having a bottom end higher than a bottom surface of the via.

Abstract: A semiconductor process is described. A silicon-phosphorus (SiP) epitaxial layer is formed serving as a source/drain (S/D) region. A crystalline metal silicide layer is formed directly on the SiP epitaxial layer and thus prevents oxidation of the SiP epitaxial layer. A contact plug is formed over the crystalline metal silicide layer.

Abstract: A computing device includes a display and a fluid channel. The fluid channel includes channel sections and fluid. The fluid may move between respective channel sections to redistribute a weight of the computing device.

Abstract: A lithium battery cell structure is provided. A first-electrode conduction portion and a second-electrode conduction portion that are exposed outward are respectively provided on two sides of a soft package lithium battery inside the metal housing. The first-electrode conduction portions are respectively electrically connected and fixed to a first-electrode conductive sheet, and the first-electrode conductive sheet is electrically connected and fixed to a housing conductive sheet that is connected to the metal housing. The second-electrode conduction portions are respectively electrically connected and fixed to a second-electrode conductive sheet, and an other end of the second-electrode conductive sheet is electrically connected and fixed to the second electrode end.

Abstract: A proximity sensor and a mobile communication device thereof are provided. The mobile communication device includes an antenna structure, a matching circuit, a capacitance sensing circuit and a processing circuit. The matching circuit couples to the antenna structure. The capacitance sensing circuit couples to the matching circuit. The capacitance sensing circuit senses a capacitance variation on the antenna structure via the matching circuit and accordingly generates a proximity sensing signal. The processing circuit is coupled to the capacitance sensing circuit to receive the proximity sensing signal. When a signal level of the proximity sensing signal exceeds a first threshold value, an object is determined approaching, and when the signal level of the proximity sensing signal exceeds a second threshold value, a human body is determines approaching. The first and the second threshold value are different.

Abstract: A multi-electrode conductive probe, a manufacturing method of insulating trenches and a measurement method using the multi-electrode conductive probe are disclosed. The conductive probe includes a base, a plurality of support elements, a plurality of tips and a conductive layer. The base has a surface and a plurality of protrusions. The protrusions are configured on the surface in a spacing manner, and an insulating trench is disposed between the two adjacent protrusions. The support elements are disposed at the base and protrude from the base. The tips are disposed on the end of the support elements away from the base. The conductive layer covers the surface of the base, the protrusions, the support elements and the tips. Portions of the conductive layer on the two adjacent support elements are electrically insulated from each other by at least an insulating trench.

Abstract: A semiconductor process for forming a plug includes the following steps. A dielectric layer having a recess is formed on a substrate. A titanium layer is formed to conformally cover the recess. A first titanium nitride layer is formed to conformally cover the titanium layer, thereby the first titanium nitride layer having first sidewall parts. The first sidewall parts of the first titanium nitride layer are pulled back, thereby second sidewall parts being formed. A second titanium nitride layer is formed to cover the recess. Moreover, a semiconductor structure formed by said semiconductor process is also provided.

Abstract: A battery charge-discharge balancing circuit assembly used in a battery pack consisting of multiple secondary battery cells is disclosed to include a switch device installed in each of the positive and negative terminals of each secondary battery cell and a balancing resistor connected with all the secondary battery cells in a parallel manner and the balancing resistor device having two opposite ends thereof connected the switch devices in series. All the secondary battery cells or multiple secondary battery cells of the battery pack can share one balancing resistor. By means of discharging the secondary battery cells in rotation, every secondary battery cell gets balanced to achieve efficient charging, eliminating the problem of overheat of the prior art technique.

Abstract: A semiconductor device includes a substrate, light-sensing devices and a bonding layer. The substrate overlies the carrier, and has a first surface and a second surface opposite to the first surface. The substrate includes recesses in the second surface, and surfaces of each of the recesses are wet etched surfaces. The light-sensing devices are disposed on the first surface of the substrate. The bonding layer is disposed between the substrate and the carrier.

Abstract: A semiconductor device includes an isolation feature in a substrate. The semiconductor device further includes a first source/drain feature in the substrate, wherein a first side of the first source/drain feature contacts the isolation feature, and the first source/drain feature exposes a portion of the isolation feature below a top surface of the substrate. The semiconductor device further includes a silicide layer over the first source/drain feature. The semiconductor device further includes a dielectric layer along the exposed portion of the isolation feature below the top surface of the substrate, wherein the dielectric layer contacts the silicide layer. The semiconductor device further includes a second source/drain feature in the substrate on an opposite side of a gate stack from the first source/drain feature, wherein the second source/drain feature has a substantially uniform thickness.

Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

Abstract: A receptacle connector includes an insulative housing defining a base and a mating tongue extending from the base, the mating tongue defining a thicken step structure around a root thereof adjacent to the base; two rows of contacts disposed in the insulating housing with contacting sections exposed upon the mating tongue and mount tails out of the base; and a shielding plate embedded within the insulative housing and disposed between the two rows of contacts. The shielding plate defines a pair of locking sides for locking with an internal latch of a corresponding plug and the locking sides protruding beyond corresponding lateral sides of the mating tongue. The insulative housing and the shielding plate are integrally formed via an insert molding process while at least one row of the contacts are configured to be forwardly assembled to corresponding passageways in the insulating housing.

Abstract: An integrated circuit (IC) using a copper-alloy based hybrid bond is provided. The IC comprises a pair of semiconductor structures vertically stacked upon one another. The pair of semiconductor structures comprise corresponding dielectric layers and corresponding metal features arranged in the dielectric layers. The metal features comprise a copper alloy having copper and a secondary metal. The IC further comprises a hybrid bond arranged at an interface between the semiconductor structures. The hybrid bond comprises a first bond bonding the dielectric layers together and a second bond bonding the metal features together. The second bond comprises voids arranged between copper grains of the metal features and filled by the secondary metal. A method for bonding a pair of semiconductor structures together using the copper-alloy based hybrid bond is also provided.

Abstract: An illuminated running board for a vehicle includes a light guide plate, a panel, and a luminous module. A plurality of convex portions is formed on a top surface of the light guide plate, and a plurality of optic pattern portions is formed on a bottom surface of the light guide plate. A groove is formed in the bottom surface of the light guide plate and spaced from the optic pattern portions. The panel mounted on the top surface of the light guide plate has a plurality of through-holes, each of which is penetrated by one of the convex portions. The luminous module installed in the groove includes a plurality of luminous elements which are not opposite to the convex portions. Light rays from the luminous elements are conducted into the light guide plate, reflected to the optic pattern portions, and projected upward from the convex portions.

Abstract: A time de-interleaving method is applied to a signal receiver of a communication system to perform a time de-interleaving process on an interleaved signal. The interleaved signal includes a first time interleaved block and a second time interleaved block. The time de-interleaving method includes: reading a first part of cells of the first time interleaved block from a memory; releasing a memory space corresponding to the first part of the cells in the memory; and writing a second part of cells of the second time interleaved block into the memory space before the first time interleaved block is completely read out from memory.