Patents by Inventor Fu Chen

Fu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240110576
    Abstract: An impeller is provided, including a metal housing, a shaft, and a plastic member. The metal housing has a shaft mounting hole. The inner surface of the shaft mounting hole includes three or more contact points, and the contact points are closer to the shaft than other portions of the inner surface of the shaft mounting hole. The shaft passes through the shaft mounting hole and is affixed by the contact points. The metal housing divides the shaft into an upper section, a middle section, and a lower section. The plastic member passes through the shaft mounting hole and is in contact with the middle section.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Inventors: Wei-I LING, Chao-Fu YANG, Chih-Chung CHEN, Kuo-Tung HSU
  • Publication number: 20240108409
    Abstract: A laser device for photocoagulation surgery is disclosed, wherein the laser device includes a multi-wavelength laser source having a first direction and a second direction different from the first direction. The laser device includes a positioning light source, a first laser light source, a first lens, a second laser light source, a second lens, a third laser light source, a third lens, a fourth laser light source and a fourth lens. The positioning light source configured to project a positioning visible light along the first direction, wherein the positioning visible light has a specific wavelength being about 635 nm. The first laser light source configured to project a first laser light having a first wavelength along the second direction. The first lens disposed in a main optical path of the positioning visible light, and configured to receive the first laser light and reflect the first laser light along the first direction.
    Type: Application
    Filed: February 9, 2023
    Publication date: April 4, 2024
    Inventors: Yung-Fu Chen, Hsing-Chih Liang, Chia-Han Tsou
  • Patent number: 11947251
    Abstract: An illumination system provides an illumination beam and includes a red light source, a green light source, a blue light source, a first supplementary light source, a first X-shaped light-splitting assembly, a first light-splitting element, and a light-uniforming element. The red light source provides a red beam. The green light source provides a green beam. The blue light source provides a blue beam. The first supplementary light source provides a first supplementary beam. The first X-shaped light-splitting assembly guides the first supplementary beam and the blue beam to the first light-splitting element. The first light-splitting element guides the red beam, the green beam, the blue beam, and the first supplementary beam to the light-uniforming element. The first supplementary beam is a red supplementary beam or a blue supplementary beam, and the illumination system includes at least five light-emitting elements. A projection apparatus including the above illumination system is also provided.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: April 2, 2024
    Assignee: Coretronic Corporation
    Inventors: Chi-Fu Liu, Tsung-Hsin Liao, Chun-Li Chen, Hung-Yu Lin
  • Publication number: 20240102742
    Abstract: A liquid-cooled cooling structure includes a cooling main body having a condensation chamber and an evaporation chamber arranged vertically therein; a separation member arranged between and separating the condensation chamber and the evaporation chamber, and having a first through hole and a second through hole communicating with the condensation chamber and the evaporation chamber, a dimension of the first through hole being greater than that of the second through hole; a longitudinal partition board received in the condensation chamber and arranged between the first through hole and the second through hole and separating the condensation chamber into a first channel and a second channel; cooling fins extended from an outer perimeter of the cooling main body.
    Type: Application
    Filed: September 25, 2022
    Publication date: March 28, 2024
    Inventors: Yen-Chih CHEN, Chi-Fu CHEN, Wei-Ta CHEN, Hung-Hui CHANG
  • Patent number: 11944017
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes an insulation layer. A bottom electrode via is disposed in the insulation layer. The bottom electrode via includes a conductive portion and a capping layer over the conductive portion. A barrier layer surrounds the bottom electrode via. A magnetic tunneling junction (MTJ) is disposed over the bottom electrode via.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Chien Chung Huang, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Publication number: 20240092881
    Abstract: Provided are methods for clinical treatment of complement-mediated TMA (CM-TMA) (e.g., CM-TMA associated with a trigger, such as autoimmune condition, an infection, a transplant, one or more drugs, or malignant hypertension), using an anti-C5 antibody, or antigen binding fragment thereof, such as ravulizumab (ULTOMIRIS®).
    Type: Application
    Filed: January 18, 2022
    Publication date: March 21, 2024
    Applicant: Alexion Pharmaceuticals, Inc.
    Inventors: Gin-Fu Chen, Zeeshan Khawaja
  • Publication number: 20240092984
    Abstract: A resin film is provided. When the resin film is characterized by Fourier transform infrared spectroscopy (FTIR), the Fourier transform infrared spectrum of the resin film has a signal intensity A from 2205 cm?1 to 2322 cm?1 and a signal intensity B from 1472 cm?1 to 1523 cm?1, and 0.70?A/B?1.95.
    Type: Application
    Filed: May 24, 2023
    Publication date: March 21, 2024
    Inventors: Hsuan-Min LIN, Chih-Fu CHEN, An-Pang TU
  • Publication number: 20240099150
    Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Patent number: 11935728
    Abstract: In order to reduce the occurrence of current alarms in a semiconductor etching or deposition process, a controller determines an offset in relative positions of a cover ring and a shield over a wafer within a vacuum chamber. The controller provides a position alarm and/or adjusts the position of the cover ring or shield when the offset is greater than a predetermined value or outside a range of acceptable values.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Cheng Wu, Sheng-Ying Wu, Ming-Hsien Lin, Chun Fu Chen
  • Patent number: 11936299
    Abstract: A transistor includes a gate structure over a substrate, wherein the substrate includes a channel region. The transistor further includes a source/drain (S/D) in the substrate adjacent to the gate structure. The transistor further includes a lightly doped drain (LDD) region adjacent to the S/D, wherein a dopant concentration in the first LDD is less than a dopant concentration in the S/D. The transistor further includes a doping extension region adjacent the LDD region, wherein the doping extension region extends farther under the gate structure than the LDD region, and a maximum depth of the doping extension region is 10-times to 30-times greater than a maximum depth of the LDD.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chu Fu Chen, Chi-Feng Huang, Chia-Chung Chen, Chin-Lung Chen, Victor Chiang Liang, Chia-Cheng Pao
  • Publication number: 20240085634
    Abstract: An optical fiber transmission device includes a substrate, a photonic integrated circuit, and an optical fiber assembly. The photonic integrated circuit is disposed on an area of the substrate. The substrate has a protruding structure at an interface with an edge of the photonic integrated circuit. The optical fiber assembly includes an optical fiber and a ferrule that sleeves the optical fiber. The protruding structure of the substrate is configured to abut against the ferrule to limit the position of the optical fiber assembly in a vertical direction of the substrate, such that the protruding structure is a stopper for the optical fiber assembly in the vertical direction.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 14, 2024
    Applicant: AuthenX Inc.
    Inventors: Chun-Chiang YEN, Po-Kuan SHEN, Sheng-Fu LIN, Yi-Ting LU, Jun-Rong CHEN, Jenq-Yang CHANG, Mao-Jen WU
  • Publication number: 20240089000
    Abstract: An optical fiber network device includes a fiber and a photonic integrated circuit. Fiber receives a first optical signal and transmits a second optical signal. A first wavelength of first optical signal is different from a second wavelength of second optical signal. Photonic integrated circuit includes a laser chip, a photodetector, a wavelength division multiplexing coupler, a first optical modulation element and a second optical modulation element. Laser chip is disposed on photonic integrated circuit, and is configured to generate first optical signal. Photodetector detects second optical signal. Wavelength division multiplexing coupler is configured to couple first optical signal to fiber, and receives second optical signal. First optical modulation element is coupled to wavelength division multiplexing coupler and laser chip, and is configured to modulate first optical signal.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 14, 2024
    Applicant: AuthenX Inc.
    Inventors: Sheng-Fu LIN, Po-Kuan SHEN, Chun-Chiang YEN, Yi-Ting LU, Jun-Rong CHEN, Jenq-Yang CHANG, Mao-Jen WU
  • Publication number: 20240087966
    Abstract: A driver structure for an organic light-emitting diode (OLED) device is provided. The driver structure includes a front-end-of-line (FEOL) layer; a back-end-of-line (BEOL) layer disposed on the FEOL layer; and a customer BEOL layer disposed on the BEOL layer. The BEOL layer includes a customer BEOL electrical checking structure. The customer BEOL electrical checking structure has a plurality of memory cells that include a first memory cell vertically aligned with and corresponds to two adjacent pixel regions. The customer BEOL layer includes six bottom structures corresponding to the two adjacent pixel regions and connected in series to form a first electrical path and a second electrical path each electrically connected to the first memory cell. The first memory cell is configured to detect an anomaly of electrical resistance of the first and second electrical path.
    Type: Application
    Filed: February 17, 2023
    Publication date: March 14, 2024
    Inventors: Chu Fu Chen, Chun Hao Liao
  • Patent number: 11929429
    Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a source electrode, a drain electrode, a gate electrode and a single field plate. The source electrode, the drain electrode, and the gate electrode are disposed on the second nitride-based semiconductor layer. The gate electrode is between the source and drain electrodes. The single field plate is disposed over the gate electrode and extends toward the drain electrode. The field plate has a first end part, a second end part and the central part. The first and the second end parts are located at substantially the same height. Portions of the central part are in a position lower than that of the first and second end parts, and the first end part extends laterally in a length greater than a width of the gate electrode.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: March 12, 2024
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Ronghui Hao, Fu Chen, King Yuen Wong
  • Patent number: 11929115
    Abstract: A memory device and an operation method thereof are provided. The memory device includes memory cells, each having a static random access memory (SRAM) cell and a non-volatile memory cell. The SRAM cell is configured to store complementary data at first and second storage nodes. The non-volatile memory cell is configured to replicate and retain the complementary data before the SRAM cell loses power supply, and to rewrite the replicated data to the first and second storage nodes of the SRAM cell after the power supply of the SRAM cell is restored.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jer-Fu Wang, Hung-Li Chiang, Yi-Tse Hung, Tzu-Chiang Chen, Meng-Fan Chang
  • Patent number: 11928416
    Abstract: A method of process technology assessment is provided. The method includes: defining a scope of the process technology assessment, the scope comprising an original process technology and a first process technology; modeling a first object in an integrated circuit into a resistance domain and a capacitance domain; generating a first resistance scaling factor and a first capacitance scaling factor based on the modeling, the original process technology, and the first process technology; and utilizing, by an electronic design automation (EDA) tool, the first resistance scaling factor and the first capacitance scaling factor for simulation of the integrated circuit.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Chih Ou, Kuo-Fu Lee, Wen-Hao Chen, Keh-Jeng Chang, Hsiang-Ho Chang
  • Publication number: 20240080024
    Abstract: A driving method for a multiple frequency coupling generator is provided. The method includes: in normal operations, interpreting an input digital control signal transmitted from a digital signal processor into an interpreted digital control signal; interpreting the interpreted digital control signal into a plurality of magnetic coupling signals by a magnetic coupling switch circuit; performing signal recovery and differential delay on the magnetic coupling signals by an interlocking circuit for reducing time difference and signal loss of the magnetic coupling signals; and when the interlocking circuit determines that the magnetic coupling signals have substantially no time difference and no signal loss, transforming the magnetic coupling signals into a first driving signal and a second driving signal by a switch circuit, a driver circuit and an output pad group to drive a backend driving loop.
    Type: Application
    Filed: March 30, 2023
    Publication date: March 7, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Chung CHIU, Hung-Yi TENG, Chi-Chung LIAO, Shou-Chung HSIEH, Ke-Horng CHEN, Yan-Fu JHOU
  • Patent number: 11921947
    Abstract: A touch function setting method is provided. The method comprising: receiving a sequence parameter which includes multiple clicks, each of the clicks is corresponding to one of areas of a touch panel or screen; receiving a function parameter corresponding to the sequence parameter, the function parameter is corresponding to activate a function; and storing a group of touch function parameters, which includes the sequence parameter and the function parameter.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: March 5, 2024
    Assignee: EGALAX_EMPIA TECHNOLOGY INC.
    Inventors: Chin-Fu Chang, Shang-Tai Yeh, Chia-Ling Sun, Jia-Ming Chen
  • Publication number: 20240071888
    Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.
    Type: Application
    Filed: August 28, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
  • Patent number: D1017567
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: March 12, 2024
    Assignee: TIMOTION TECHNOLOGY CO., LTD.
    Inventor: Yi-Fu Chen