Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a first nitride-based transistor, and a second nitride-based transistor. The first nitride-based transistor applies the 2DEG region as a channel thereof and comprising a first drain electrode that makes contact with the second nitride-based semiconductor layer to form a first Schottky diode with the second nitride-based semiconductor layer. The second nitride-based transistor applies the 2DEG region as a channel thereof and includes a second drain electrode that makes contact with the second nitride-based semiconductor layer to form a second Schottky diode with the second nitride-based semiconductor layer, such that the first Schottky diode and the second Schottky diode are connected to the same node.

Abstract: A device, which is used to inspect the confinement boundary of a vertical spent nuclear fuel storage canister during operation, includes a vertical spent nuclear fuel storage unit, a lifting unit, a transferring unit and an inspection platform. The vertical spent nuclear fuel storage unit includes a vertical storage canister and a storage overpack. The vertical storage canister is configured for storing spent nuclear fuels, and the storage overpack is configured for storing the vertical storage canister. The lifting unit, connected with the vertical storage canister, is configured for lifting the vertical storage canister. The transferring unit, connected with the lifting unit, is configured for protecting the lifted vertical storage canister. The inspection platform, connected with the transferring unit and the storage overpack, is configured for creating more space with sufficient shielding for the usage of inspecting the confinement boundary of the vertical storage canister.

Abstract: The present disclosure provides a semiconductor structure, including a transistor. The transistor includes a semiconductive substrate, a gate structure, a pair of highly doped regions and a dielectric element. The semiconductive substrate has a top surface. The gate structure is over the top surface. The pair of highly doped regions is separated by the gate structure. The dielectric element is embedded in the semiconductive substrate. The dielectric element is laterally and vertically misaligned with the pair of highly doped regions.

Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers, a source electrode, a drain electrode, a passivation layer, a stress modulation layer and a gate electrode. The stress modulation layer is disposed over the second nitride-based semiconductor layer and extends along at least one sidewall of the passivation layer to make contact with the second nitride-based semiconductor layer, so as to form an interface. The gate electrode is disposed over the stress modulation layer and between the source and drain electrodes. The gate electrode is located directly above the interface of the stress modulation layer and the second nitride-based semiconductor layer.

Abstract: A method and a system for detecting a semiconductor device are provided. The method comprises obtaining an image of the semiconductor device, evaluating a feature of the image, detecting a defect of the semiconductor device based on the feature, extracting a defect information for the defect, calculating a defect die ratio (DDR) in response to the defect and analyzing a relation between the DDR and the defect information.

Abstract: Various embodiments of the present disclosure are directed towards a memory cell comprising a blocking layer configured to block diffusion of metal from an electrode of the memory cell to a ferroelectric layer of the memory cell. More particularly, the blocking layer and the ferroelectric layer are between a top electrode of the memory cell and a bottom electrode of the memory cell, which both comprise metal. Further, the blocking layer is between the ferroelectric layer and the electrode, which corresponds to one of the top and bottom electrodes. In some embodiments, the metal of the one of the top and bottom electrodes has a lowest electronegativity amongst the metals of top and bottom electrodes and is hence the most reactive and likely to diffuse amongst the metals of top and bottom electrodes.

Abstract: An electronic whiteboard system and an operation method thereof are provided. The electronic whiteboard system includes a data processing device. The data processing device calculates an original message amount of an original object move message according to an object move operation on a cloud electronic whiteboard operated by one of the client devices. The data processing device simulates a grouping message amount of a grouping object move message according to the object move operation. The data processing device compares the original message amount and the grouping message amount to determine whether to generate the grouping object move message, and transmits the original object move message or the grouping object move message to other of the plurality of client devices.

Abstract: A bi-directional and multi-channel optical module incudes an encapsulation casing, a TOSA, a plurality of ROSAs and a plurality of optical folding elements. The TOSA is accommodated in the encapsulation casing. The TOSA includes a light emitting element and a thin film LiNbOx modulator, and a light receiving end of the thin film LiNbOx modulator is optically coupled with the light emitting element. The ROSAs are accommodated in the encapsulation casing. The ROSAs are configured to receive external optical signals propagating into the encapsulation casing. The optical folding elements are optically coupled with a plurality of light propagation ends of the thin film LiNbOx modulator, respectively, for changing a traveling direction of light emitted by the TOSA. Each of the optical folding elements is configured to enable one of the ROSAs share a fiber access terminal with the TOSA.

Abstract: A nitride-based semiconductor device includes a buffer, a first nitride-based semiconductor layer, a shield layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. A first nitride-based semiconductor layer is disposed over the buffer. A shield layer is disposed between the buffer and the first nitride-based semiconductor layer and includes a first isolation compound that has a bandgap greater than a bandgap of the first nitride-based semiconductor layer, in which the first isolation compound is made of at least one two-dimensional material which includes at least one metal element. A second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and has a bandgap less than the bandgap of the first isolation compound and greater than the bandgap of the first nitride-based semiconductor layer. The pair of S/D electrodes and the gate electrode are disposed over the second nitride-based semiconductor layer.

Abstract: A semiconductor device includes a first to a third nitride-based semiconductor layers, a source electrode, a drain electrode and a gate electrode. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and has a bandgap less than a bandgap of the first nitride-based semiconductor layer, so as to form a heterojunction therebetween with a two-dimensional hole gas (2DHG) region. A third nitride-based semiconductor layer is embedded in the second nitride-based semiconductor layer and spaced apart from the first nitride-based semiconductor layer. The third nitride-based semiconductor layer is doped to have a first conductivity type different than that of the second nitride-based semiconductor layer.

Abstract: A semiconductor device a method of forming the same are provided. The method includes forming a fin extending from a substrate and forming a gate dielectric layer along a top surface and sidewalls of the fin. A first thickness of the gate dielectric layer along the top surface of the fin is greater than a second thickness of the gate dielectric layer along the sidewalls of the fin.

Abstract: A nitride-based semiconductor device including a first and a second nitride-based semiconductor layers, a source electrode and a drain electrode, and a gate structure. The gate structure includes at least one conductive layer and two or more doped nitride-based semiconductor layers. The at least one conductive layer includes metal, and is in contact with the second nitride-based semiconductor layer to form a metal-semiconductor junction therebetween. The two or more doped nitride-based semiconductor layers are in contact with the second nitride-based semiconductor layer and abut against the conductive layer, so as to form contact interfaces abutting against the metal-semiconductor junction with the second nitride-based semiconductor.

Abstract: An integrated circuit layout includes a first standard cell and a second standard cell. The first standard cell includes first gate lines arranged along a first direction and extending along a second direction. The second standard cell abuts to one side of the first standard cell along the second direction and includes second gate lines arranged along the first direction and extending along the second direction. A first gate line width of the first gate lines and a second gate line width of the second gate lines are different. A first cell width of the first standard cell and a second cell width of the second standard cell are integral multiples of a default gate line pitch of the first gate lines and the second gate lines. At least some of the second gate lines and at least some of the first gate lines are aligned along the second direction.

Abstract: A bidirectional optical module includes a TOSA, a ROSA and an optical filter. The TOSA includes a light emitting unit and a thin film LiNbOx modulator, and the thin film LiNbOx modulator is optically coupled with the light emitting unit. The ROSA is connected with the TOSA. The optical filter is provided for a fiber port which the TOSA shares with the ROSA.

Abstract: A method for fabricating a semiconductor device is provided. The method includes depositing a bottom electrode layer over a substrate; depositing a ferroelectric layer over the bottom electrode layer; depositing a first top electrode layer over the ferroelectric layer, wherein the first top electrode layer comprises a first metal; depositing a second top electrode layer over the first top electrode layer, wherein the second top electrode layer comprises a second metal, and a standard reduction potential of the first metal is greater than a standard reduction potential of the second metal; and removing portions of the second top electrode layer, the first top electrode layer, the ferroelectric layer, and the bottom electrode layer to form a memory stack, the memory stack comprising remaining portions of the second top electrode layer, the first top electrode layer, the ferroelectric layer, and the bottom electrode layer.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device includes an interconnect structure disposed over a semiconductor substrate. A dielectric structure is disposed over the interconnect structure. A first cavity and a second cavity are disposed in the dielectric structure. A microelectromechanical system (MEMS) substrate is disposed over the dielectric structure, where the MEMS substrate comprises a first movable membrane overlying the first cavity and a second movable membrane overlying the second cavity. A first functional structure overlies the first movable membrane, where the first functional structure comprises a first material having a first chemical composition.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device includes an interconnect structure disposed over a semiconductor substrate. A dielectric structure is disposed over the interconnect structure. A first cavity and a second cavity are disposed in the dielectric structure. A microelectromechanical system (MEMS) substrate is disposed over the dielectric structure, where the MEMS substrate comprises a first movable membrane overlying the first cavity and a second movable membrane overlying the second cavity. A first functional structure overlies the first movable membrane, where the first functional structure comprises a first material having a first chemical composition.

Abstract: A method of forming a semiconductor device includes forming an inter-metal dielectric layer over a substrate; forming a first conductive line embedded in the inter-metal dielectric layer; forming a dielectric structure over the inter-metal dielectric layer and the first conductive line; etching the dielectric structure until the first conductive line is exposed; forming a bottom electrode layer on the exposed first conductive line such that the bottom electrode layer has an U-shaped when viewed in a cross section; forming a ferroelectric layer over the bottom electrode layer; forming a top electrode layer over the ferroelectric layer.

Abstract: A composition is provided. The composition includes a magnetic resonance (MR) probe and a glassification agent. The glassification agent includes lactic acid.