Patents by Inventor Fu Lin

Fu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220406886
    Abstract: An integrated circuit (IC) device comprises a high voltage semiconductor device (HVSD) on a frontside of a semiconductor body and further comprises an electrode on a backside of the semiconductor body opposite the frontside. The HVSD may, for example, be a transistor or some other suitable type of semiconductor device. The electrode has one or more gaps directly beneath the HVSD. The one or more gaps enhance the effectiveness of the electrode for improving the breakdown voltage of the HVSD.
    Type: Application
    Filed: January 11, 2022
    Publication date: December 22, 2022
    Inventors: Harry-Hak-Lay Chuang, Hsin Fu Lin, Tsung-Hao Yeh
  • Publication number: 20220406642
    Abstract: A flip-chip process is to provide a pressing jig with a channel, so that the pressing jig grips a chip module by vacuum suction through the channel, and the chip module can be bonded onto a circuit board via a plurality of solder bumps through the pressing jig, and then a heating device is provided to heat the plurality of solder bumps and reflow the plurality of solder bumps. Therefore, the chip module can be vacuum-gripped by the pressing jig to suppress deformation of the chip module, so that the solder bumps can effectively connect to corresponding contacts of the circuit board.
    Type: Application
    Filed: August 3, 2021
    Publication date: December 22, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
  • Patent number: 11532528
    Abstract: An electronic package and a method for manufacturing the electronic package are provided. The method includes forming a slope surface on at least one side surface of at least one of a plurality of electronic components, and then disposing the plurality of electronic components on a carrier structure, such that the two adjacent electronic components form a space by the slope surface. Afterwards, an encapsulation layer is formed on the carrier structure and filled into the space to cover the two adjacent electronic components so as to disperse stress on the electronic components through the design of the space to prevent cracking due to stress concentration.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: December 20, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Jen Chen, Hsi-Chang Hsu, Yuan-Hung Hsu, Chang-Fu Lin, Don-Son Jiang
  • Patent number: 11532701
    Abstract: A semiconductor isolation structure includes a handle layer, a buried insulation layer, a semiconductor layer, a deep trench isolation structure, and a heavy doping region. The buried insulation layer is disposed on the handle layer. The semiconductor layer is disposed on the buried insulation layer and has a doping type. The semiconductor layer has a functional area in which doped regions of a semiconductor device are to be formed. The deep trench isolation structure penetrates the semiconductor layer and the buried insulation layer, and surrounds the functional area. The heavy doping region is formed in the semiconductor layer, is disposed between the functional area and the deep trench isolation structure, and is surrounded by the deep trench isolation structure. The heavy doping region has the doping type. A doping concentration of the heavy doping region is higher than that of the semiconductor layer.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Fu Lin, Tsung-Hao Yeh, Chien-Hung Liu, Shiang-Hung Huang, Chih-Wei Hung, Tung-Yang Lin, Ruey-Hsin Liu, Chih-Chang Cheng
  • Publication number: 20220399245
    Abstract: Provided is an electronic package, in which a heat dissipating body is formed on an electronic device and is combined with a heat sink so that the electronic device, the heat dissipating body and the heat sink form a receiving space, and a heat dissipating material is formed in the receiving space and in contact with the heat sink and the electronic device, where a fluid regulating space is formed between the heat dissipating material and the heat dissipating body and is used as a volume regulating space for the heat dissipating material during thermal expansion and contraction.
    Type: Application
    Filed: July 8, 2021
    Publication date: December 15, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
  • Publication number: 20220400341
    Abstract: A parametric equalizer includes an equalizer circuit, a first protection circuit, a second protection circuit, and a first addition circuit. The equalizer circuit is arranged to receive an input signal, and process the input signal to generate an output signal. The first protection circuit is arranged to generate a first protection signal according to the output signal, the input signal, and a first processed signal. The second protection circuit is arranged to generate a second protection signal according to the input signal and a second processed signal. The first addition circuit is coupled to the first protection circuit and the second protection circuit, and is arranged to combine the first protection signal and the second protection signal to generate an equalizer output signal.
    Type: Application
    Filed: June 10, 2021
    Publication date: December 15, 2022
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Hsin-Yuan Chiu, Tsung-Fu Lin
  • Publication number: 20220399681
    Abstract: A connector lock structure includes an insulating body, a plurality of terminals, a shell, a locking assembly, a sliding board, a pressing element and an unlocking tool. The insulating body is molded around the plurality of the terminals. The shell surrounds the insulating body. The locking assembly includes at least one lacking groove, and at least one elastic arm formed in the at least one lacking groove. The at least one elastic arm has a hook structure. The hook structure is cooperated with a blocking groove of a docking connector. The pressing element is mounted in the insulating body. The sliding board is slidably mounted under the pressing element. One end of the pressing element has a locking portion. The locking portion has a keyhole. The unlocking tool is inserted in the keyhole.
    Type: Application
    Filed: April 26, 2022
    Publication date: December 15, 2022
    Inventors: LI NIEN HSU, SHENG NAN YU, CHUN FU LIN
  • Patent number: 11524437
    Abstract: Provided is an improved mold structure, including a first mold base, a second mold base and two controllers. The first mold base and the second mold base are operably aligned. When the first mold base and the second mold base are in an aligned state, a mold cavity is jointly framed. Two gas passages, a first mold core and a second mold core are provided. The first mold base is provided with a runner. Two ends thereof are respectively connected to a material tube and a mold cavity of a molding machine. The first and second mold cores are made of porous material. Vent pipelines thereof are connected to the respective gas passages. The two controllers are respectively connected to the gas passages, and control the gas in and out such that the pressure in different areas in the mold cavity reaches a predetermined value, thereby controlling the flow direction of the raw material in the mold cavity.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: December 13, 2022
    Assignee: RAYSPERT PRECISION INDUSTRIAL INC.
    Inventors: Shun-Fu Lin, Yu-Chang Su
  • Publication number: 20220392861
    Abstract: An electronic package is provided and includes a carrier for carrying electronic components. Electrical contact pads of the carrier for planting solder balls are connected with a plurality of columnar conductors, and the conductors are electrically connected to a circuit portion in the carrier. By connecting a plurality of conductors with a single electrical contact pad, structural stress can be distributed and breakage of the circuit portion can be prevented.
    Type: Application
    Filed: July 7, 2021
    Publication date: December 8, 2022
    Applicant: SILICONWARE PRECISION INDUST RIES CO., LT D.
    Inventors: Chi-Ren Chen, Po-Yung Chang, Pei-Geng Weng, Yuan-Hung Hsu, Chang-Fu Lin, Don-Son Jiang
  • Patent number: 11521930
    Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: December 6, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
  • Patent number: 11521878
    Abstract: An adsorption device includes a substrate and a magnetic film on a surface of the substrate. The substrate has magnetic properties and is capable of generating magnetic field. The magnetic film partially covers the surface. The magnetic film generates a magnetic field having a direction that is opposite to a direction of the magnetic field generated by the substrate. Portions of the surface of the substrate not covered by the magnetic film form positions to attract and adsorb target objects, and other portion of the surface of the substrate covered by the magnetic film is not able to attract any target object.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: December 6, 2022
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Po-Liang Chen, Yung-Fu Lin, Hirohisa Tanaka, Yasunori Shimada
  • Patent number: 11514852
    Abstract: A pixel array is provided. The pixel array includes a plurality of red pixels, a plurality of green pixels, and a plurality of blue pixels. Each green pixel includes a light emitting diode (LED), a first transistor, a second transistor, a third transistor, and a fourth transistor. The LED receives a system low voltage. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to a second end of the first transistor and the anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to a first end of the second transistor. The fourth transistor is coupled to the anode of the light-emitting diode of an adjacent green pixel, a control terminal of the third transistor, and the anode of the light-emitting diode.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: November 29, 2022
    Assignee: Au Optronics Corporation
    Inventors: Ya-Jung Wang, Jing-Wun Jhang, Rong-Fu Lin, Nien-Chen Li, Hsien-Chun Wang, Che-Chia Chang, June Woo Lee, Hsin-Ying Lin, Chia-Ting Hsieh, Chien-Fu Huang, Sung-Yu Su
  • Patent number: 11516925
    Abstract: The present disclosure provides a package stack structure and a method for manufacturing the same. The method is characterized by stacking coreless circuit portions on the board of an electronic component to reduce the overall thickness of the package stack structure.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: November 29, 2022
    Assignee: Siliconware Precision Industries Co., Ltd
    Inventors: Han-Hung Chen, Yuan-Hung Hsu, Chang-Fu Lin, Rung-Jeng Lin, Fu-Tang Huang
  • Patent number: 11515222
    Abstract: Semiconductor devices having flow controllers configured to reduce mitigation of mold material between stacked layers, and associated systems and methods, are disclosed herein. In some embodiments, the semiconductor device includes a package substrate that has first and second surfaces. First and second die stacks are formed on the first surface and are adjacent to each other. A portion of the first surface extends between the first and second die stacks. A layer of material is adhered to top surfaces of the first and second die stacks and extends at a distance above the package substrate to form a tunnel between the layer of material, opposing sidewalls of the die stacks, and the package substrate. The semiconductor device further includes a flow controller that is adhered to at least a portion of the first surface inside the tunnel that reduces a cross-sectional surface area of at least a portion of the tunnel.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: November 29, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Lu Fu Lin, Yung Sheng Zou, Chong Leong Gan, Li Jao, Min Hua Chung
  • Publication number: 20220375403
    Abstract: The present disclosure relates to a driving method for a display device and a display device. The display device includes a display driver, the display driver includes a plurality of driving channels each of which drives corresponding display unit according to display data in a pulse width modulation manner within one frame period, the method comprises: selectively enabling, in each sub-frame subset among a plurality of different sub-frame subsets of the frame period, different channel subset among a plurality of channel subsets of the plurality of driving channels to drive corresponding display unit, wherein each channel subset of the plurality of channel subsets includes two or more driving channels among the plurality of driving channels.
    Type: Application
    Filed: August 4, 2022
    Publication date: November 24, 2022
    Inventors: Jhih-Siou Cheng, Chun-Fu Lin, Po-Hsiang Fang, Ju-Lin Huang
  • Publication number: 20220375813
    Abstract: A heat dissipation structure is provided and includes a heat dissipation body and an adjustment channel. A carrying area and an active area adjacent to the carrying area are defined on a surface of the heat dissipation body, the carrying area is used for applying a first heat dissipation material thereonto, and the adjustment channel is formed in the active area, where one end of the adjustment channel communicates with the outside of the heat dissipation structure, and the other end communicates with the carrying area. Therefore, when the heat dissipation body is coupled to the electronic component by the first heat dissipation material, the adjustment channel can adjust a volume of the first heat dissipation material.
    Type: Application
    Filed: January 25, 2022
    Publication date: November 24, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Lung Huang, Kuo-Hua Yu, Chang-Fu Lin
  • Patent number: 11509400
    Abstract: An image transmission system is disclosed. The image transmission system includes at least one image capturing device, at least one conversion device, at least one image processor, and at least one flexible printed circuit (FPC). The at least one FPC includes at least one conductive layer and at least one optical waveguide layer. The at least one image capturing device is configured to capture at least one data. The at least one conversion device is configured to perform a conversion between the at least one data and an optical signal. The at least one image processor is configured to obtain the at least one data according to the optical signal, and processes the data. The at least one optical waveguide layer is configured to transmit the optical signal.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: November 22, 2022
    Assignee: AuthenX Inc.
    Inventors: Po-Kuan Shen, Chao-Chieh Hsu, Chun-Chiang Yen, Chiu-Lin Yu, Kai-Lun Han, Sheng-Fu Lin, Jenq-Yang Chang, Mao-Jen Wu
  • Publication number: 20220367611
    Abstract: A semiconductor device includes a drift region, a dielectric film, and an anti-type doping layer. The drift region has a first type conductivity. The anti-type doping layer is located between the drift region and the dielectric film, and has a second type conductivity opposite to the first type conductivity so as to change a current path of a current in the drift region, to thereby prevent the current from being influenced by the dielectric film. A method for manufacturing a semiconductor device and a method for reducing an influence of a dielectric film are also disclosed.
    Type: Application
    Filed: May 13, 2021
    Publication date: November 17, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Fu LIN, Tsung-Hao Yeh, Chih-Wei HUNG
  • Patent number: 11502435
    Abstract: A SIM card connector includes an insulating body, a plurality of first terminals and a plurality of second terminals. The insulating body has a plurality of first slots and a plurality of second slots. Each side wall of each first slot has a limiting slot. The plurality of the first terminals are inserted into the plurality of the first slots. Each first terminal has a first base portion, a first soldering portion connected with a lower end of the first base portion, and a first contacting portion connected with an upper end of the first base portion. The plurality of the second terminals are inserted into the plurality of the second slots. Each second terminal has a second contacting portion slantwise extended towards a rear end of the insulating body and exposed beyond a top surface of the insulating body.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: November 15, 2022
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Li-Nien Hsu, Sheng-Nan Yu, Chun-Fu Lin
  • Patent number: 11498779
    Abstract: A device to attract and hold microscopic items such as micro LEDs magnetically rather than by static electricity includes a substrate and a plurality of magnetic units on a surface of the substrate. The magnetic units are spaced apart from each other and are constrained in the size and direction of their individual magnetic fields. Each of the magnetic units includes a magnet and a cladding layer partially covering the magnet. The cladding layer is made of a magnetic material. A side of the magnet away from the substrate is exposed from the cladding layer to attract and hold one micro LED.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: November 15, 2022
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Po-Liang Chen, Yung-Fu Lin, Hirohisa Tanaka, Yasunori Shimada