Patents by Inventor Fu Lin

Fu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9735232
    Abstract: The present disclosure provides a method for manufacturing a semiconductor structure. The method includes several operations as follows. A semiconductor substrate is received. A trench along a depth in the semiconductor substrate is formed. The semiconductor substrate is exposed in a hydrogen containing atmosphere. Dopants are inserted into a portion of the semiconductor substrate. A dielectric is filled in the trench. The dopants are driven into a predetermined distance in the semiconductor substrate.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: August 15, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tai-I Yang, Jheng-Sheng You, Chi-Fu Lin, Tien-Lu Lin
  • Publication number: 20170228013
    Abstract: An electronic system (300) comprising: a battery (303); at least one electronic device; and a power managing unit (301), arranged for detecting a battery voltage of the battery (303), and arranged for limiting at least one performance of the at least one electronic device if the battery voltage is not higher than a first low threshold voltage.
    Type: Application
    Filed: April 27, 2017
    Publication date: August 10, 2017
    Inventors: Jen-Chieh Yang, Yong-Sheng Lo, Kai-Hsun Chou, Kuan-Fu Lin
  • Publication number: 20170227465
    Abstract: An optical sensing module is configured to detect a characteristic of a sample. The optical sensing module includes a light source, a light guide plate, a first cladding layer, a light converging layer, a filter layer, and a plurality of sensors. The light source is configured to provide an exciting beam. Positions of the sensors correspond to positions of the holes. After the exciting beam enters the light guide plate, at least one portion of the exciting beam is transmitted to the sample through a portion of the surface of the light guide plate exposed by the holes, the sample is excited by the exciting beam to emit a signal beam, and the signal beam passes through the light converging layer and the filter layer in an order and travels to the sensors. Another optical sensing module is also provided.
    Type: Application
    Filed: February 2, 2017
    Publication date: August 10, 2017
    Applicant: Personal Genomics Taiwan, Inc.
    Inventors: Hsin-Yi Hsieh, Sheng-Fu Lin, Teng-Chien Yu
  • Publication number: 20170221796
    Abstract: A TSV structure includes a substrate comprising at least a TSV opening formed therein, a conductive layer disposed in the TSV opening, and a bi-layered liner disposed in between the substrate and the conductive layer. More important, the bi-layered liner includes a first liner and a second liner, and a Young's modulus of the first liner is different from a Young's modulus of the second liner.
    Type: Application
    Filed: January 29, 2016
    Publication date: August 3, 2017
    Inventors: Chu-Fu Lin, Ming-Tse Lin, Kuei-Sheng Wu
  • Publication number: 20170222343
    Abstract: An operation member for an electronic device is provided. The electronic device includes a casing having portions defining an opening and a circuit module having a circuit board. The circuit board includes a controller. The operation member includes a body including an operating end and a coupling end, and a skirt member. The body is configured to partially protrude through the opening of the casing for operating. The skirt member is arranged at the coupling end. The skirt member includes a base plate outwardly extending from the coupling end, a wall upwardly extending from peripheral portions of the base plate, and a groove defined between the wall and the body. The operation member is configured to associate with the electronic device, and the operation member with the body and the skirt is completely separated from the casing.
    Type: Application
    Filed: April 17, 2017
    Publication date: August 3, 2017
    Inventors: CHUN-LUNG HO, YI-HSUN LEE, MING-WEI OU, YUAN-FU LIN
  • Patent number: 9722071
    Abstract: A trench power transistor is provided. The trench gate structure of the trench power transistor includes at least one insulting layer, a gate electrode, and a shielding electrode, which are disposed in a trench of an epitaxial layer. The insulating layer formed on an inner wall of the active trench to isolate an epitaxial layer from the gate and the shielding electrodes. The insulating layer includes a first dielectric layer, a second dielectric layer and a third dielectric layer. The first and second dielectric layers extend from an upper portion of the inner wall to a lower portion of the inner wall of the active trench. The third dielectric layer is formed on the second dielectric layer and located at the lower portion of the active trench. A portion of the second dielectric layer is interposed between the first and third dielectric layers.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: August 1, 2017
    Assignee: SINOPOWER SEMICONDUCTOR, INC.
    Inventors: Po-Hsien Li, Guo-Liang Yang, Jia-Fu Lin, Wei-Chieh Lin
  • Patent number: 9720149
    Abstract: A display device with a color conversion layer providing predetermined colors for full-color display. The color conversion layer includes a plurality of color conversion units. Each color conversion unit includes a quantum dot film. The color conversion unit is configured to receive light beams and converts the light beams to primary colors to emit. Each color conversion unit defines a plurality of areas, and each primary color corresponds to one of the areas of the color conversion unit.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: August 1, 2017
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: I-Wei Wu, Yung-Fu Lin, Chang-Ting Lin, Shih-Pin Tseng, Pen-Chu Lin
  • Publication number: 20170213906
    Abstract: A trench power transistor is provided. The trench gate structure of the trench power transistor includes at least one insulting layer, a gate electrode, and a shielding electrode, which are disposed in a trench of an epitaxial layer. The insulating layer formed on an inner wall of the active trench to isolate an epitaxial layer from the gate and the shielding electrodes. The insulating layer includes a first dielectric layer, a second dielectric layer and a third dielectric layer. The first and second dielectric layers extend from an upper portion of the inner wall to a lower portion of the inner wall of the active trench. The third dielectric layer is formed on the second dielectric layer and located at the lower portion of the active trench. A portion of the second dielectric layer is interposed between the first and third dielectric layers.
    Type: Application
    Filed: January 25, 2016
    Publication date: July 27, 2017
    Inventors: PO-HSIEN LI, GUO-LIANG YANG, JIA-FU LIN, WEI-CHIEH LIN
  • Publication number: 20170207161
    Abstract: Provided is a substrate structure including a substrate body, electrical contact pads and an insulating protection layer disposed on the substrate body, wherein the insulating protection layer has openings exposing the electrical contact pads, and at least one of the electrical contact pads has at least a concave portion filled with a filling material to prevent solder material from permeating along surfaces of the insulating protection layer and the electric contact pads, thereby eliminating the phenomenon of solder extrusion. Thus, bridging in the substrate structure can be eliminated even when the bump pitch between two adjacent electrical contact pads is small. As a result, short circuits can be prevented, and production yield can be increased.
    Type: Application
    Filed: November 16, 2016
    Publication date: July 20, 2017
    Inventors: Chang-Fu Lin, Chin-Tsai Yao, Chun-Tang Lin, Fu-Tang Huang
  • Patent number: 9708811
    Abstract: An acoustic board having displaced and passably abutted multiple through-holes comprises an outer surface and an inner surface, in which the first through-holes formed from the outer surface toward the inner surface and the second through-holes formed from the inner surface toward the outer surface are displaced and passably abutted thereby conjunctively constituting acoustically absorptive micro-orifices. Herein at least some of the second through-holes have a cross-sectional area of greater than 1 mm2 and are displaced and passably abutted to at least some of the first through-holes, thereby collectively forming a plurality of acoustically absorptive micro-orifices having a cross-sectional area of smaller than 1 mm2, and, in comparison with the total area of the acoustic board, the opening rate for the sum of the cross-sectional areas of all such acoustically absorptive micro-orifices is less than 3%.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: July 18, 2017
    Assignee: Gixia Group Co.
    Inventors: Jung-ya Hsieh, Yung-fu Lin, Yuan-Hsin Chang
  • Publication number: 20170200822
    Abstract: A double gate trench power transistor and manufacturing method thereof are provided. The double gate trench power transistor gate structure includes an epitaxial layer, a trench structure formed in the epitaxial layer, at least two gate structures, and a shielding electrode structure. The trench structure includes a deep trench portion and two shallow trench portions respectively adjacent to two opposite sides of the deep trench portion. Each of the gate structures formed in each of the shallow trench portions includes a gate insulating layer and a gate electrode. The gate insulating layer has a first dielectric layer, a second dielectric layer and a third dielectric layer. The second dielectric layer is interposed between the first and third dielectric layers. Additionally, a portion of the gate insulating layer is in contact with a shielding dielectric layer of the shielding electrode structure.
    Type: Application
    Filed: January 13, 2016
    Publication date: July 13, 2017
    Inventors: PO-HSIEN LI, JIA-FU LIN, CHIA-CHENG CHEN, WEI-CHIEH LIN
  • Publication number: 20170193996
    Abstract: A device performs a method for using image data to aid voice recognition. The method includes the device capturing (302) image data of a vicinity of the device and adjusting (304), based on the image data, a set of parameters for voice recognition performed by the device (102). The set of parameters for the device performing voice recognition include, but are not limited to: a trigger threshold of a trigger for voice recognition; a set of beamforming parameters; a database for voice recognition; and/or an algorithm for voice recognition. The algorithm may include using noise suppression or using acoustic beamforming.
    Type: Application
    Filed: March 21, 2017
    Publication date: July 6, 2017
    Inventors: Robert A. Zurek, Adrian M. Schuster, Fu-Lin Shau, Jincheng Wu
  • Patent number: 9695989
    Abstract: A plastic lamp base includes an insulated body defining therein an enabling channel which extends from a bottom end thereof. Also, the insulated body defines therein an auxiliary channel which extends from a mounting end thereof to communicate with the enabling channel. The enabling channel and the auxiliary channel are filled with a conductive plastic to form a zigzag electrical conductor, which has one end exposed at the bottom end of the insulated body and has an opposite end exposed at the mounting end of the insulated body and electrically connected to one contact of an LED component. A ground electrical conductor, being electrically insulated from the zigzag electrical conductor, has one end exposed at the outer surface of the insulated body and has an opposite end exposed at the mounting end of the insulated body and electrically connected to the other contact of the LED component.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: July 4, 2017
    Assignee: Gixia Group Co.
    Inventors: Jung-Ya Hsieh, Yung-Fu Lin, Yuan-Hsin Chang
  • Publication number: 20170186702
    Abstract: A packaging substrate is provided, which includes: a substrate body having a first region with a plurality of conductive pads and a second region adjacent to the first region, and a material layer formed on the second region to prevent the substrate body from warping. An electronic package having the packaging substrate is also provided.
    Type: Application
    Filed: March 8, 2016
    Publication date: June 29, 2017
    Inventors: Fang-Yu Liang, Hung-Hsien Chang, Yi-Che Lai, Chang-Fu Lin
  • Patent number: 9691551
    Abstract: An electrolyte material formulation including: (a) a monomer of formula (I) (b) a monomer of formula (II) ?and (c) a polymerizable compound, wherein A, X, B1, B2, R1 to R3, q and w are defined as those recited in the specification, and the monomer (b) is in an amount of about 1 part by weight to about 800 parts by weight and the polymerizable compound (c) is in an amount of about 1 part by weight to about 10000 parts by weight based on 100 parts by weight of the monomer (a). Also, an electrolytic material composition obtained by the polymerization of the aforementioned electrolytic material formulation. The electrolytic material composition can be applied to a solid electrolyte capacitor.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: June 27, 2017
    Assignees: Eternal Materials Co., Ltd., Gemmy Electronic Co., Ltd.
    Inventors: Shinn-Horng Chen, Chieh-Fu Lin
  • Patent number: 9684330
    Abstract: An operation member includes a body having an operating end and a coupling end, and a skirt member. The skirt member is arranged at the coupling end. The skirt member includes a base plate outwardly extending from the coupling end, a wall extending from the base plate, and a groove defined between the outer surface of the wall and the body. The electronic device includes a casing, an operation member, and a circuit module. The casing has portions defining an opening. The circuit module has a circuit board including a controller disposed thereon. The above-mentioned operation member is sleeved onto the controller and passes through the opening. The outer surface of the operation member and the opening define a gap therebetween. The groove is correspondingly arranged proximate to the gap to gather small particles entering the gap.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: June 20, 2017
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chun-Lung Ho, Yi-Hsun Lee, Ming-Wei Ou, Yuan-Fu Lin
  • Publication number: 20170165886
    Abstract: The present invention provides a sheet material having bi-directionally formed micropores, pertaining to the field of material structures. The sheet material comprises a basic half side and a protrusive half side extending from the basic half side. The basic half side is formed with multiple recesses extending along a first orientation; while the protrusive half side has multiple beams extending along a second orientation. Herein the second orientation extends at an angle with respect to the first orientation, and a bottom edge is respectively formed at the intersection of the beam and the neighboring beam; also, a hole is respectively formed at the crossing position of the bottom edge and the recess.
    Type: Application
    Filed: October 13, 2014
    Publication date: June 15, 2017
    Inventors: Jung-Ya HSIEH, Yung-fu LIN, Yuan-Hsin CHANG
  • Publication number: 20170156421
    Abstract: A glove has a body, at least one waterproof layer, and a water repellent area. The body is composed by multiple fibers and has a wrist portion, a palm portion, a thumb portion, and at least one finger portion. The wrist portion has a first face and a second face opposite each other. The thumb portion has a first circumference and a second circumference opposite each other. The at least one finger portion has a first surface and a second surface opposite each other. The at least one waterproof layer extends from the first face to the first circumference and the first surface. The water repellent area is adjacent to the at least one waterproof layer. Each fiber that is arranged in the water repellent area is coated with water repellent to form a water repellent layer.
    Type: Application
    Filed: December 7, 2015
    Publication date: June 8, 2017
    Applicant: EAST LEADING CHEMICAL CO., LTD.
    Inventor: Yee-Fu LIN
  • Publication number: 20170154002
    Abstract: An integrated circuit and an operation method of a SERDES PHY layer circuit thereof are provided. When the SERDES PHY layer circuit is in a calibration preparation state and a signal of a first calibration input pin is an enable state, or when the SERDES PHY layer circuit is in the calibration preparation state, and signals of first and second calibration input pins are in the enable state, the SERDES PHY layer circuit enters a calibration state (using a reference resistor for current calibration). After the current calibration is completed, the SERDES PHY layer circuit enters a calibration completion state (without using the reference resistor and connecting the first calibration input pin to the first calibration output pin). The SERDES PHY layer circuit sets the signal of the first calibration output pin to a disable state when the SERDES PHY layer circuit is not in the calibration completion state.
    Type: Application
    Filed: January 19, 2016
    Publication date: June 1, 2017
    Inventors: Yuan-Min Hu, Yin-Fu Lin, Shan-Chih Wen
  • Patent number: D788835
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: June 6, 2017
    Assignee: GoPro, Inc.
    Inventors: Chao-Hsien Wu, Pei-Jen Lin, Fu-Lin Yang, Hung-Yu Chen, Pei-Yi Ou-Yang, Cheng-Ming Wu, Feng-Chun Huang