Abstract: An optical projector module to establish distance to target object in a field of view for three dimensional image acquisition purposes includes a printed circuit board, point light sources mounted on the printed circuit board to emit a plurality of light beams, a lens unit apart from the plurality of point light sources, and a distance adjusting unit connected to the lens unit. A memory storage device is also included. The lens unit comprises separated lenses, the adjusting unit can adjust distances between the lenses of the lens unit, and light beams with a number of light spot patterns can accordingly be projected. Previously-captured images in the memory storage device can be referred to in seeking target objects in the field of view and light beams in different spot-concentrations on or around the target object enable calculations for the capture of images in three dimensions of the target object.

Abstract: A color filter array for an image sensing device includes a plurality of pixels, for generating a plurality of pixel data of an image; and a control unit, for controlling the plurality of pixels; wherein each of the plurality of pixels is divided into a plurality of sub-pixels; wherein the pixel data outputted by each of the plurality of pixels is generated based on at least one pixel value of the plurality of sub-pixels and the outputted pixel data is smaller than a saturated threshold; wherein at least one pixel in the plurality of pixels has a mixed color by having different sub-pixel colors in the plurality of sub-pixels.

Abstract: A semiconductor manufacturing system includes an operating terminal, a first controller, and a plurality of second controllers. The operating terminal controls a main controller. Each of the plurality of second controllers is electrically connected to the first controller. In an initial or default state, the operating terminal controls the first controller as a main controller, and when the first controller fails, the operating terminal controls one of the plurality of the second controllers as a main controller, the others of the plurality of second controllers being controlled by the main controller.

Abstract: An electronic device comprises a data transmitting interface configured to transmit data, a memory configured to store the data, a processor configured to execute an application program, and an accelerator coupled to the processor via a bus. According to an operation request transmitted from the processor, the accelerator reads the data from the memory, performs an operation to the data to generate computed data, and stores the computed data in the memory. The electronic device can improve computational efficiency. An accelerator and an accelerating method applicable to a neural network operation are also provided.

Abstract: A front opening unified pod (FOUP) loading and air filling system comprises a FOUP loading device and an air filling device. The FOUP loading device is configured to load and unload a FOUP, and comprises a substrate and a controller. The substrate comprises a frame, a bearing platform installed on the frame, and a cavity under the bearing platform. The bearing platform is configured to support the FOUP. The controller and the air filling device are accommodated in the cavity. The air filling device is connected to the FOUP.

Abstract: A voltage detector includes a first node configured to have a first supply voltage, a second node configured to have a second supply voltage, and an output node. The voltage detector is configured to drive the output node to the first supply voltage in response to a difference between the first supply voltage and the second supply voltage exceeding a predetermined threshold voltage value.

Abstract: A rework process includes attaching a first bond head to a first semiconductor package. The contact pads of the first semiconductor package are bonded to contact pads of a second semiconductor package by solder joints. The rework process further includes performing a first local heating process to melt the solder joints, removing the first semiconductor package using the first bond head, and removing at least a portion of solder from the contact pads of the second semiconductor package.

Abstract: Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.

Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.

Abstract: A semiconductor device includes a semiconductor stack comprising a surface, and an electrode structure comprises an electrode pad formed on the surface, and the electrode structure further comprises a first extending electrode, a second extending electrode and a third extending electrode connecting to the electrode pad. The first extending electrode is closer to a periphery of the surface than the third extending electrode is, and the second extending electrode is between the first extending electrode and the third extending electrode.

Abstract: A wafer supporting system includes a supporting pedestal. The supporting pedestal includes a main supporting body and a hollow frame surrounding the supporting pedestal. The main supporting body includes a top surface and a bottom surface opposite to the top surface, the top surface defined a plurality of vent grooves and a plurality of holding grooves. The main supporting body includes a plurality of holding channels extending through from the bottom surface to the holding grooves and a plurality of first through holes pass through from the top surface to the bottom surface, each holding groove is surrounded by a plurality of first through holes; an inner side surface of the hollow frame and a side wall of the supporting pedestal form a gap, and a plurality of exhaust cylinders are arranged in the annular gap and each exhaust cylinder is communicated with each vent groove.

Abstract: A reflective exposure apparatus includes a platform, an illuminating system, a photomask, a chip, and a reflecting convex mirror. The photomask is formed on the platform and faces the illuminating system. The chip is formed on the platform. The illuminating system and the reflecting curved mirror are formed on opposite sides of the platform. The platform can be moved relative to the illuminating system and the reflecting curved mirror.

Abstract: An improved shoelace has an elastic inner core having a plurality of elastic members and a woven string covering the elastic inner layer. The woven string has a plurality of narrow sections and wide sections evenly disposed on two ends of the elastic inner core. Each narrow section wraps around the elastic inner core, each wide section is longer than each narrow section and separated from the elastic inner core. When the elastic inner core is not pulled, the wide sections overlap and fold onto the elastic inner core 10 and has a cone shape with at least three times thickness than the narrow section. When the elastic inner core is pulled, the wide sections are stretched straight.

Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.

Abstract: An electrostatic discharge (ESD) protection circuit is coupled between first and second power supply buses. The ESD protection circuit includes a detection circuit; a pull-up circuit, coupled to the detection circuit, comprising at least a first n-type transistor; a pull-down circuit, coupled to the pull-up circuit, comprising at least a second n-type transistor; and a bypass circuit, coupled to the pull-up and pull-down circuits, wherein the detection circuit is configured to detect whether an ESD event is present on either the first or the second bus so as to cause the pull-up and pull-down circuits to selectively enable the bypass circuit for providing a discharging path between the first and second power supply buses.

Abstract: Integrated fan-out packages and methods of forming the same are disclosed. An integrated fan-out package includes a first chip, a redistribution layer structure, a plurality of connection pads, a plurality of dummy patterns, a plurality of micro-bumps, a second chip and an underfill layer. The redistribution layer structure is electrically connected to the first chip. The connection pads are electrically connected to the redistribution layer structure. The dummy patterns are at one side of the connection pads. The micro-bumps are electrically connected to the connection pads. The second chip is electrically connected to the micro-bumps. The underfill layer covers the plurality of dummy patterns and surrounds the micro-bumps.

Abstract: Integrated fan-out packages and methods of forming the same are disclosed. An integrated fan-out package includes a first chip, a redistribution layer structure, a plurality of connection pads, a plurality of dummy patterns, a plurality of micro-bumps, a second chip and an underfill layer. The redistribution layer structure is electrically connected to the first chip. The connection pads are electrically connected to the redistribution layer structure. The dummy patterns are at one side of the connection pads. The micro-bumps are electrically connected to the connection pads. The second chip is electrically connected to the micro-bumps. The underfill layer covers the plurality of dummy patterns and surrounds the micro-bumps.

Abstract: An optical cover is provided for combining with each lighting unit of a light string and includes a cover body and a mounting member. The cover body is provided on an external surface thereof with a sleeve, in which a through hole is formed for receiving and holding the lighting unit therein. The sleeve is provided with, on opposite sides thereof, with notches that receive extension of an electrical cable of the light string therethrough. The mounting member is mountable to the sleeve of the cover body to fix the lighting unit in the through hole and also fix the electrical cable in the notches. In this way, a user is allowed to select and arrange optical covers of different colors for respectively mounting to multiple lighting units of the light string.

Abstract: Methods and apparatus for processing DNS request in a gateway with WAN and LAN interfaces. The gateway receives a first DNS request from a host via the LAN interface. The gateway selects DNS servers according to predefined selection policies and selects access networks that are authorized to send new DNS requests. The new DNS requests and the first DNA request have the same content. The gateway transmits the new DNS requests to corresponding DNS sever of the selected access networks through the selected access networks and via the WAN interfaces that are connected to the selected access networks. The gateway then identifies valid DNS responses from DNS responses received from the corresponding DNS server. The gateway selects one of the identified valid DNS responses and generates a first new DNS response with the same content thereof. The gateway sends the first new DNS response to the host.

Abstract: Methods and devices are provided herein for enhancing robustness of a bipolar electrostatic discharge (ESD) device. The robustness of a bipolar ESD device includes providing an emitter region and a collector region adjacent to the emitter region. An isolation structure is provided between the emitter region and the collector region. A ballasting characteristic at the isolation structure is modified by inserting at least one partition structure therein. Each partition structure extends substantially abreast at least one of the emitter and the collector regions.