Abstract: A package structure includes a circuit substrate and a semiconductor package. The semiconductor package is disposed on the circuit substrate, and includes a plurality of semiconductor dies, an insulating encapsulant and a connection structure. The insulating encapsulant comprises a first portion and a second portion protruding from the first portion, the first portion is encapsulating the plurality of semiconductor dies and has a planar first surface, and the second portion has a planar second surface located at a different level than the planar first surface. The connection structure is located over the first portion of the insulating encapsulant on the planar first surface, and located on the plurality of semiconductor dies, wherein the connection structure is electrically connected to the plurality of semiconductor dies and the circuit substrate.

Abstract: A package structure and method for forming the same are provided. The method includes forming a through substrate via structure in a substrate, and forming a first trench in the substrate. The method includes stacking a first stacked die package structure over the substrate using a plurality of first bonding structures. The first bonding structures are between the substrate and the first stacked die package structure, and a there is plurality of cavities between two adjacent first bonding structures. The method also includes forming an underfill layer over the first stacked die package structure and in the cavities, and the underfill layer is formed in a portion of the first trench. The method further includes forming a package layer over the underfill layer.

Abstract: An isolated switched-mode power converter converts power from an input source into power for an output load. A digital controller senses a secondary-side voltage, such as a rectified voltage, of the power converter. The secondary-side voltage is divided down using a high-impedance voltage divider. The resultant divided-down voltage is provided to a voltage sensor within the digital controller. The voltage sensor level shifts the provided voltage, and buffers the resulting level-shifted voltage. The buffered, level-shifted voltage is provided to a tracking analog-to-digital converter (ADC) for digitization. The buffered signal provided to the tracking ADC has a high current capability, such that the voltage input to the tracking ADC may quickly converge before the tracking ADC outputs a digital value for the sensed secondary-side voltage.

Abstract: An electronic device and the manufacturing method thereof are provided. The electronic device includes a semiconductor die, a conductive structure electrically coupled to the semiconductor die, an insulating encapsulant encapsulating the semiconductor die and the conductive structure, and a redistribution structure disposed on the insulating encapsulant and the semiconductor die. The conductive structure includes a first conductor, a second conductor, and a diffusion barrier layer between the first conductor and the second conductor. The redistribution structure is electrically connected to the semiconductor die and the first conductor of the conductive structure.

Abstract: A method and system for transmitting and receiving data packets between two network nodes via one or more end-to-end connections. An interface is provided for selecting one or more possible end-to-end connection(s) or established end-to-end connection(s). The method and system may further comprise receiving a policy, wherein one or more selected end-to-end connections are established based, at least in part, on the policy. The policy may also restrict or promote selection of certain established end-to-end connection(s) via the interface provided. The selected and established end-to-end connection(s) are used for transmitting and receiving data packets.

Abstract: Methods and devices are provided herein for enhancing robustness of a bipolar electrostatic discharge (ESD) device. The robustness of a bipolar ESD device includes providing an emitter region and a collector region adjacent to the emitter region. An isolation structure is provided between the emitter region and the collector region. A ballasting characteristic at the isolation structure is modified by inserting at least one partition structure therein. Each partition structure extends substantially abreast at least one of the emitter and the collector regions.

Abstract: A disclosed insert for a circular-shaped petri dish can generate a substantially uniform electric field across the petri dish that is filled with a fluid establishing a salt bridge. The insert includes a circular-shaped bottom plate defining a circular-shaped space; a side channel vertically erecting from a circular periphery of said bottom plate; and a pair of current rectifying chambers each having a generally planar shape communicating with the side channel. In at least some aspects of the invention, portions of the side channel bridging the pair of current rectifying chambers each have a generally concave top profile having a lowest point at the center between the pair of current rectifying chambers such that, when the salt bridge is established, the circular-shaped space defined by the bottom plate exhibits a substantially uniform electric field in a substantially entire area of the space.

Abstract: A semiconductor package includes a first integrated circuit structure, a second integrated circuit structure, a plurality of conductive bumps, an encapsulating material, and a redistribution structure. The first integrated circuit structure includes an active surface having a plurality of contact pads, a back surface opposite to the active surface, and a plurality of through vias extending through the first integrated circuit structure and connecting the active surface and the back surface. The second integrated circuit structure is disposed on the back surface of the first integrated circuit structure. The conductive bumps are disposed between the first integrated circuit structure and the second integrated circuit structure, and electrically connecting the plurality of through vias and the second integrated circuit structure. The encapsulating material at least encapsulates the second integrated circuit structure.

Abstract: An electrostatic discharge (ESD) protection circuit is coupled between first and second power supply buses. The ESD protection circuit includes a detection circuit; a pull-up circuit, coupled to the detection circuit, comprising at least a first n-type transistor; a pull-down circuit, coupled to the pull-up circuit, comprising at least a second n-type transistor; and a bypass circuit, coupled to the pull-up and pull-down circuits, wherein the detection circuit is configured to detect whether an ESD event is present on either the first or the second bus so as to cause the pull-up and pull-down circuits to selectively enable the bypass circuit for providing a discharging path between the first and second power supply buses.

Abstract: A package structure and method for forming the same are provided. The method includes forming a through substrate via structure in a substrate, and forming a first trench in the substrate. The method includes stacking a first stacked die package structure over the substrate using a plurality of first bonding structures. The first bonding structures are between the substrate and the first stacked die package structure, and a there is plurality of cavities between two adjacent first bonding structures. The method also includes forming an underfill layer over the first stacked die package structure and in the cavities, and the underfill layer is formed in a portion of the first trench. The method further includes forming a package layer over the underfill layer.

Abstract: A structure and a formation method of a package structure are provided. The method includes disposing a semiconductor die structure over a substrate. The method also includes disposing a protective film over the substrate. The protective film has an opening exposing the semiconductor die structure, and sidewalls of the opening surround the semiconductor die structure. The method further includes dispensing an underfill material into the opening to surround the semiconductor die structure.

Abstract: An isolated switched-mode power converter converts power from an input source into power for an output load. A digital controller senses a secondary-side voltage, such as a rectified voltage, of the power converter. The secondary-side voltage is divided down using a high-impedance voltage divider. The resultant divided-down voltage is provided to a voltage sensor within the digital controller. The voltage sensor level shifts the provided voltage, and buffers the resulting level-shifted voltage. The buffered, level-shifted voltage is provided to a tracking analog-to-digital converter (ADC) for digitization. The buffered signal provided to the tracking ADC has a high current capability, such that the voltage input to the tracking ADC may quickly converge before the tracking ADC outputs a digital value for the sensed secondary-side voltage.

Abstract: A method includes forming an electrical connector over a substrate of a wafer, and molding a polymer layer, with at least a portion of the electrical connector molded in the polymer layer. A first sawing step is performed to form a trench in the polymer layer. After the first sawing step, a second sawing step is performed to saw the wafer into a plurality of dies.

Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the semiconductor substrate. A first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and spaced apart from the first and second conductive pads. A first ESD protection element is electrically coupled between the first and second conductive pads. A first device under test (DUT) is electrically coupled between the first and third conductive pads.

Abstract: An isolated switched-mode power converter converts power from an input source into power for an output load. A digital controller senses a secondary-side voltage, such as a rectified voltage, of the power converter. The secondary-side voltage is divided down using a high-impedance voltage divider. The resultant divided-down voltage is provided to a voltage sensor within the digital controller. The voltage sensor level shifts the provided voltage, and buffers the resulting level-shifted voltage. The buffered, level-shifted voltage is provided to a tracking analog-to-digital converter (ADC) for digitization. The buffered signal provided to the tracking ADC has a high current capability, such that the voltage input to the tracking ADC may quickly converge before the tracking ADC outputs a digital value for the sensed secondary-side voltage.

Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.

Abstract: A method includes forming an electrical connector over a substrate of a wafer, and molding a polymer layer, with at least a portion of the electrical connector molded in the polymer layer. A first sawing step is performed to form a trench in the polymer layer. After the first sawing step, a second sawing step is performed to saw the wafer into a plurality of dies.

Abstract: An electronic device and the manufacturing method thereof are provided. The electronic device includes a semiconductor die, a conductive structure electrically coupled to the semiconductor die, an insulating encapsulant encapsulating the semiconductor die and the conductive structure, and a redistribution structure disposed on the insulating encapsulant and the semiconductor die. The conductive structure includes a first conductor, a second conductor, and a diffusion barrier layer between the first conductor and the second conductor. The redistribution structure is electrically connected to the semiconductor die and the first conductor of the conductive structure.

Abstract: A semiconductor device is provided. The semiconductor device includes a base substrate, a die stacking unit, a number of dummy micro bumps, and an underfill material. The die stacking unit, which is mounted on the base substrate, includes a first die, a second die, and a number of first conductive joints. The first die and the second die are stacked on each other, and the first conductive joints are disposed between and connected to the first die and the second die. The dummy micro bumps, which are disposed between the first conductive joints, are connected to the first die but not to the second die. The underfill material is filled into a number of gaps between the base substrate, the first die, the second die, the first conductive joints, and the dummy micro bumps.