Patents by Inventor Fu Tsai

Fu Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • OUT-OF-BAND RETRIEVAL OF NETWORK INTERFACE CONTROLLER INFORMATION
    Publication number: 20160026477
    Abstract: In some implementations, network interface controller (NIC) configuration information can be obtained from a NIC prior to booting up an operating system. For example, a Basic Input Output System (BIOS) can obtain the NIC configuration information from the NIC during the execution of a system check (e.g., Power-On Self-Test). A system controller can receive the NIC configuration information from the BIOS. The system controller can store the NIC configuration information in memory associated with the system controller. A management system can request the NIC configuration information from the system controller using an out-of-band communication channel. For example, the management system can send the request for NIC configuration information to the system controller prior to powering on a server using a dedicated network interface of the system controller.
    Type: Application
    Filed: March 31, 2015
    Publication date: January 28, 2016
    Inventors: Hung-Lu Chu, Chin-Fu Tsai, Yung-Fu Li
  • Methods and Apparatus of Packaging Semiconductor Devices
    Publication number: 20160005704
    Abstract: Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.
    Type: Application
    Filed: September 14, 2015
    Publication date: January 7, 2016
    Inventors: Chia-Wei Tu, Yian-Liang Kuo, Tsung-Fu Tsai, Ru-Ying Huang, Ming-Song Sheu, Hsien-Wei Chen
  • Integrated circuit packages and methods for forming the same
    Patent number: 9196532
    Abstract: A method includes forming an electrical connector over a substrate of a wafer, and molding a polymer layer, with at least a portion of the electrical connector molded in the polymer layer. A first sawing step is performed to form a trench in the polymer layer. After the first sawing step, a second sawing step is performed to saw the wafer into a plurality of dies.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: November 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Wei Tu, Yian-Liang Kuo, Wen-Hsiung Lu, Hsien-Wei Chen, Tsung-Fu Tsai
  • Network apparatus and method in a computer system operating a boot-strap or a work period
    Patent number: 9195469
    Abstract: The present invention discloses a network apparatus and enabling method thereof. During the procedure of voltage biasing or host booting, an enabling signal generated in this network apparatus is provided for enabling the internal application circuit at first. At the time of data connection between the network apparatus and a corresponding host apparatus, the host apparatus is able to enable or disable the application circuit of the network apparatus via a predetermined pin.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: November 24, 2015
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chih-Fu Tsai, Jia-Ching Shen
  • Protecting Flip-Chip Package using Pre-Applied Fillet
    Publication number: 20150287640
    Abstract: A die has a first surface, a second surface opposite the first surface, and sidewalls includes a first portion and a second portion, wherein the first portion is closer to the first surface than the second portion. A fillet contacts the first portion of sidewalls of the die and encircles the die. A work piece is bonded to the die through solder bumps, with the second surface facing the work piece. A first underfill is filled a gap between the die and the work piece, wherein the first underfill contacts the fillet, and wherein the first underfill and the fillet are formed of different materials.
    Type: Application
    Filed: June 22, 2015
    Publication date: October 8, 2015
    Inventors: Tsung-Fu Tsai, Yian-Liang Kuo, Ming-Song Sheu, Yu-Ling Tsai, Chen-Shien Chen, Han-Ping Pu
  • CIRCUIT FOR COMMON MODE REMOVAL FOR DC-COUPLED FRONT-END CIRCUITS
    Publication number: 20150280696
    Abstract: In one example, a method includes receiving a first differential signal including a first voltage signal and a second voltage signal, wherein the first differential signal includes a first common mode voltage; receiving a second common mode voltage. The method further includes determining, by a circuit, a second differential signal including a third voltage signal and a fourth voltage signal, wherein a difference between the third voltage signal and the fourth voltage signal is based on a difference between the first voltage signal and the second voltage signal, wherein the second differential signal includes the second common mode voltage. The method further includes outputting, substantially continuously, the second differential signal.
    Type: Application
    Filed: March 25, 2014
    Publication date: October 1, 2015
    Applicants: Infineon Technologies North America Corp., Infineon Technologies Austria AG
    Inventors: Giuseppe Bernacchia, Cha-fu Tsai
  • Isolation Rings for Packages and the Method of Forming the Same
    Publication number: 20150262882
    Abstract: A device includes a first package component, and a second package component underlying, and bonded to, the first package component. A molding material is disposed under the first package component and molded to the first and the second package components, wherein the molding material and the first package component form an interface. An isolation region includes a first edge, wherein the first edge of the isolation region contacts a first edge of the first package component and a first edge of the molding material. The isolation has a bottom lower than the interface.
    Type: Application
    Filed: May 29, 2015
    Publication date: September 17, 2015
    Inventors: Chih-Horng Chang, Tin-Hao Kuo, Tsung-Fu Tsai, Min-Feng Ku
  • Methods and apparatus of packaging semiconductor devices
    Patent number: 9136235
    Abstract: Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: September 15, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Wei Tu, Yian-Liang Kuo, Tsung-Fu Tsai, Ru-Ying Huang, Ming-Song Sheu, Hsien-Wei Chen
  • Three-way connector and light string using same
    Patent number: 9118155
    Abstract: Disclosed are a three-way connector and a light string using the connector. The three-way connector includes first and second three-branched casing members that have joint surfaces respectively comprising mateable recesses and projections and receiving three electrical wires embedded therebetween to form a three-branched connection having a connection point where soldering is applied. Ultrasonic is then applied to fuse and bond the two casing members together as a electrical-wire-included three-branched block thereby constituting a three-way connector. The three-way connector can be used in combination with two-way sockets, electrical wires, and LED luminous elements, in series connection or in parallel connection, to form various configurations of the LED light string.
    Type: Grant
    Filed: January 25, 2014
    Date of Patent: August 25, 2015
    Inventor: Chang-Fu Tsai
  • Preventing device power on after unrecoverable error
    Patent number: 9110805
    Abstract: In some implementations, a system controller of a computing device can be configured to receive a power-on signal and prevent the computing device from providing power to components of the computing device. In some implementations, upon receiving a power-on signal, the system controller can retrieve fault data from a power supply unit. The fault data can be analyzed to determine whether the power supply unit detected an unrecoverable failure. When an unrecoverable failure is detected, the system controller can prevent the power supply unit from providing power to other components of the computing device. In some implementations, an unrecoverable failure can be detected when the fault data indicates that an overcurrent, an overvoltage, or an over-temperature fault has occurred.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: August 18, 2015
    Assignee: Quanta Computer Inc.
    Inventor: Chin-Fu Tsai
  • Capacitor with Fuse Protection
    Publication number: 20150214150
    Abstract: An embodiment is a circuit. The circuit includes active circuitry, a first capacitor, a first fuse, a second capacitor, and a second fuse. The active circuitry has a first power node and a second power node. The first capacitor is coupled to the first fuse serially to form a first segment. The second capacitor is coupled to the second fuse serially to form a second segment. The first segment and the second segment are coupled together in parallel and between the first power node and the second power node.
    Type: Application
    Filed: July 17, 2014
    Publication date: July 30, 2015
    Inventors: Shih-Cheng Chang, Liang-Chen Lin, Fu-Tsai Hou, Tung-Chin Yeh, Shih-Kai Lin, Gia-Her Lu, Jyun-Lin Wu, Hsien-Pin Hu
  • Three-Way Connector And Light String Using Same
    Publication number: 20150214682
    Abstract: Disclosed are a three-way connector and a light string using the connector. The three-way connector includes first and second three-branched casing members that have joint surfaces respectively comprising mateable recesses and projections and receiving three electrical wires embedded therebetween to form a three-branched connection having a connection point where soldering is applied. Ultrasonic is then applied to fuse and bond the two casing members together as a electrical-wire-included three-branched block thereby constituting a three-way connector. The three-way connector can be used in combination with two-way sockets, electrical wires, and LED luminous elements, in series connection or in parallel connection, to form various configurations of the LED light string.
    Type: Application
    Filed: January 25, 2014
    Publication date: July 30, 2015
    Inventor: Chang-Fu TSAI
  • Display control apparatus and display control method
    Patent number: 9063567
    Abstract: A display control apparatus and a display control method are disclosed. The display control apparatus comprises a recognition circuit and a mapping circuit. The recognition circuit recognizes a head position and a control point position of an operator. The mapping circuit dynamically adjusts the operating boundary according to the head position, the control point position and a display boundary, and calculates the cursor position on a display according to the control point position, the operating boundary and the display boundary, wherein the cursor position remains on a imagine line passing through the head position and the control point position.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: June 23, 2015
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen-Hung Ting, Chia-Chang Li, Chieh-Fu Tsai, Chien-Chun Kuo, Po-Lung Chen
  • Protecting flip-chip package using pre-applied fillet
    Patent number: 9064881
    Abstract: A die has a first surface, a second surface opposite the first surface, and sidewalls includes a first portion and a second portion, wherein the first portion is closer to the first surface than the second portion. A fillet contacts the first portion of sidewalls of the die and encircles the die. A work piece is bonded to the die through solder bumps, with the second surface facing the work piece. A first underfill is filled a gap between the die and the work piece, wherein the first underfill contacts the fillet, and wherein the first underfill and the fillet are formed of different materials.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: June 23, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Yian-Liang Kuo, Ming-Song Sheu, Yu-Ling Tsai, Chen-Shien Chen, Han-Ping Pu
  • Semiconductor device having under-bump metallization (UBM) structure and method of forming the same
    Patent number: 9059158
    Abstract: A semiconductor device comprises a semiconductor substrate, an under-bump metallization (UBM) structure overlying the semiconductor substrate, and a solder bump overlying and electrically connected to the UBM structure. The UBM structure comprises a first metallization layer comprising a first metal, a second metallization layer comprising a second metal different from the first metal, and a first intermetallic compound (IMC) layer between the first metallization layer and the second metallization layer, the first IMC layer comprising the first metal and the second metal.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: June 16, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Fu Tsai, Yian-Liang Kuo, Chih-Horng Chang
  • Automatic-Focusing Imaging Capture Device and Imaging Capture Method
    Publication number: 20150163394
    Abstract: An automatic-focusing imaging capture device includes a first imaging capture module for generating a clue imaging information according to an object and a second imaging capture module for determining whether or not to re-focus for generating an imaging information corresponding to the object according to the clue imaging information; wherein a first frame rate of the first imaging capture module is higher than a second frame rate of the second imaging capture module, and the clue imaging information includes an object-distance information and a depth-of-field information.
    Type: Application
    Filed: April 13, 2014
    Publication date: June 11, 2015
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Shen-Fu Tsai, Wei Hsu, Min-Hui Chu, Chin-Hui Huang, Wei-Lung Liu
  • Isolation rings for packages and the method of forming the same
    Patent number: 9048333
    Abstract: A device includes a first package component, and a second package component underlying, and bonded to, the first package component. A molding material is disposed under the first package component and molded to the first and the second package components, wherein the molding material and the first package component form an interface. An isolation region includes a first edge, wherein the first edge of the isolation region contacts a first edge of the first package component and a first edge of the molding material. The isolation has a bottom lower than the interface.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: June 2, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Horng Chang, Tin-Hao Kuo, Tsung-Fu Tsai, Min-Feng Ku
  • Automatic Color Correction Method and Color Correction Module thereof
    Publication number: 20150130964
    Abstract: An auto-color-correction method for an image capturing device includes calculating a plurality color temperatures of a plurality of pixels in an image; calculating a number of pixels of the plurality of pixels located in a first color temperature range as a first number and a number of pixels of the plurality of pixels located in a second color temperature range as a second number; generating a color temperature weight according to the first number and the second number; and generating at least one correction coefficient according to the color temperature weight, at least one first coefficient corresponding to the first color temperature range and at least one second coefficient corresponding to the second color temperature range.
    Type: Application
    Filed: March 20, 2014
    Publication date: May 14, 2015
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Ming-Teng Huang, Wei Hsu, Shen-Fu Tsai
  • Methods and circuits for power switching
    Patent number: 9030044
    Abstract: The present invention relates to a method and a circuit for power switching. The method comprises the steps of: providing a operation circuit; receiving a command from a Host and setting up a power mode of the operation circuit; supplying a first rated consuming power source and then a second rated consuming power source to the operation circuit via the power switching circuit according to power mode; detecting the transferring process form the first rated consuming power source to second rated consuming power source; and preventing over current according to detecting result.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: May 12, 2015
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chih-Fu Tsai, Kuo-Sheng Chung
  • IMAGE SENSOR AND IMAGE CAPTURING SYSTEM
    Publication number: 20150098005
    Abstract: An image sensor and an image capturing system are provided. The image sensor includes a pixel array, and the pixel array includes a plurality of image sensing arrays and a focus sensing pixel group. Each of the image sensing arrays is covered by a plurality of color filter units, and the focus sensing pixel group is not covered by the color filter units. The focus sensing pixel group includes a plurality of first focus sensing pixel units, and the first focus sensing pixel units are arranged according to a first arrangement pattern. An area ratio of the focus sensing pixel group and the pixel array is smaller than one-ninth, or the focus sensing pixel group is, with respect to the whole pixel array, non-uniformly disposed in the pixel array. The image capturing system of the present invention can enhance a focus function.
    Type: Application
    Filed: November 21, 2013
    Publication date: April 9, 2015
    Applicant: Novatek Microelectronics Corp.
    Inventors: Shen-Fu Tsai, Wei Hsu