Abstract: A semiconductor package includes a semiconductor die, a redistribution structure and connective terminals. The redistribution structure is disposed on the semiconductor die and includes a first metallization tier disposed in between a pair of dielectric layers. The first metallization tier includes routing conductive traces electrically connected to the semiconductor die and a shielding plate electrically insulated from the semiconductor die. The connective terminals include dummy connective terminals and active connective terminals. The dummy connective terminals are disposed on the redistribution structure and are electrically connected to the shielding plate. The active connective terminals are disposed on the redistribution structure and are electrically connected to the routing conductive traces. Vertical projections of the dummy connective terminals fall on the shielding plate.

Abstract: Techniques for focusing the energy radiated by a wireless power transmitting unit are described. An example power transmitting unit includes a transmit coil configured to generate a magnetic field to wirelessly power a device within an active wireless charging area. The power transmitting unit also includes a power generating circuitry to deliver current to the transmit coil to generate the magnetic field. The power transmitting unit also includes a ferrite structure disposed below the transmit coil, the ferrite structure comprising a flat sheet and a projection of ferrite material projecting above the flat sheet.

Abstract: There is disclosed in one example a computing apparatus, including: an active computing element; a first magnetic attractor mechanically coupled to the active computing element; and a cold plate disposed to conduct heat away from the active computing element, the cold plate including a second magnetic attractor disposed to magnetically couple with the first magnetic attractor.

Abstract: A semiconductor package includes a circuit substrate, a die, a frame structure, a heat sink lid and conductive balls. The die is disposed on a front surface of the circuit substrate and electrically connected with the circuit substrate. The die includes two first dies disposed side by side and separate from each other with a gap between two facing sidewalls of the two first dies. The frame structure is disposed on the front surface of the circuit substrate and surrounding the die. The heat sink lid is disposed on the die and the frame structure. The head sink lid has a slit that penetrates through the heat sink lid in a thickness direction and exposes the gap between the two facing sidewalls of the two first dies. The conductive balls are disposed on the opposite surface of the circuit substrate and electrically connected with the die through the circuit substrate.

Abstract: A method includes etching a semiconductor substrate to form trenches extending into the semiconductor substrate, and depositing a first dielectric layer into the trenches. The first dielectric layer fills lower portions of the trenches. A Ultra-Violet (UV) treatment is performed on the first dielectric layer in an oxygen-containing process gas. The method further includes depositing a second dielectric layer into the trenches. The second dielectric layer fills upper portions of the trenches. A thermal treatment is performed on the second dielectric layer in an additional oxygen-containing process gas. After the thermal treatment, an anneal is performed on the first dielectric layer and the second dielectric layer.

Abstract: The disclosure relates to a linear actuator including a base, a linear motor, a load cell and a rotary motor. The linear motor is disposed on the base and includes a fixed coil module and a movable magnetic backplane. The fixed coil module is fixed on the base, and the movable magnetic backplane is configured to slide relative to the fixed coil module along a first direction. The rotary motor is rotated around a central axis in parallel with the first direction. The load cell has two opposite sides parallel to the first direction, respectively. The movable magnetic backplane of the linear motor and the rotary motor are connected to the two opposite sides of the load cell, respectively. The load cell is subjected to a force applied thereto by the rotary motor and parallel to the first direction, and configured to convert the force into an electrical signal.

Abstract: A rack assembly has two support frames and at least one shelf that are secured to the support frames by connecting assemblies. Each connecting assembly comprises a well secured to a medial surface of each vertical tube of the support frame, and a hook that extends from each end of each shelf, with each hook having an opening extending therethrough. The connecting assembly also includes a connector that is seated inside each well, each connector having a top plate that has an elongated opening, the connector also having a body that is sized and configured to fit inside a well, the body defining two wings with a space between the wings, and wherein each wing has a bump positioned in the center of the inner surface of each wing that faces the space. Each hook is inserted through the elongated opening of a corresponding connector with the bump on each wing fitted inside the opening of the hook to retain the hook inside the body of the connector.

Abstract: A method for forming a package structure and method for forming the same are provided. The method includes forming a package layer over a substrate, and forming a first dielectric layer over the package layer. The method further includes forming a first alignment mark and a second alignment mark over the first dielectric layer. The method includes forming a second dielectric layer over the first dielectric layer and removing a portion of the second dielectric layer to form a first trench to expose the first alignment mark, and to form a first opening to expose the second alignment.

Abstract: A semiconductor device including a circuit substrate, a chip package, and a stiffener ring is provided. The chip package is disposed on and electrically connected to the circuit substrate, the chip package includes a pair of first parallel sides and a pair of second parallel sides shorter than the pair of first parallel sides. The stiffener ring is disposed on the circuit substrate, the stiffener ring includes first stiffener portions extending along a direction substantially parallel with the pair of first parallel sides and second stiffener portions extending along the direction substantially parallel with the pair of second parallel sides. The first stiffener portions are connected to the second stiffener portions, and the second stiffener portions is mechanically weaker than the first stiffener portions. A semiconductor device including stiffener lids is also provided.

Abstract: A method of making a dual damascene interconnect includes operations of depositing a metal hardmask over a dielectric layer; etching a metal hardmask opening in the metal hardmask to expose a top surface of the dielectric layer; etching at least one interconnect opening in the dielectric layer, to expose a top surface of a base conductive layer; modifying a sidewall of the metal hardmask opening; and depositing a conductive material in the metal hardmask opening and the at least one interconnect opening.

Abstract: A semiconductor package and a packaged electronic device are described. The semiconductor package has a foundation layer and a planar filtering circuit. The circuit is formed in the foundation layer to provide EMI/RFI mitigation. The circuit has one or more conductive traces that are patterned to form an equivalent circuit of inductors and capacitors. The one or more conductive traces include planar metal shapes, such as meanders, loops, inter-digital fingers, and patterned shapes, to reduce the z-height of the package. The packaged electronic device has a semiconductor die, a foundation layer, a motherboard, a package, and the circuit. The circuit removes undesirable interferences generated from the semiconductor die. The circuit has a z-height that is less than a z-height of solder balls used to attach the foundation layer to the motherboard. A method of forming a planar filtering circuit in a foundation layer is also described.

Abstract: An embodiment package includes a first integrated circuit die, an encapsulant around the first integrated circuit die, and a conductive line electrically connecting a first conductive via to a second conductive via. The conductive line includes a first segment over the first integrated circuit die and having a first lengthwise dimension extending in a first direction and a second segment having a second lengthwise dimension extending in a second direction different than the first direction. The second segment extends over a boundary between the first integrated circuit die and the encapsulant.

Abstract: A package includes a conductive pad, with a plurality of openings penetrating through the conductive pad. A dielectric layer encircles the conductive pad. The dielectric layer has portions filling the plurality of openings. An Under-Bump Metallurgy (UBM) includes a via portion extending into the dielectric layer to contact the conductive pad. A solder region is overlying and contacting the UBM. An integrated passive device is bonded to the UBM through the solder region.

Abstract: A smart home includes Internet of things (IOT) devices that are paired with an IOT gateway. A backend system is in communication with the IOT gateway to receive IOT operating data of the IOT devices. The backend system generates a machine learning model for an IOT device. The machine learning model is consulted with IOT operating data of the IOT device to detect anomalous operating behavior of the IOT device. The machine learning model is updated as more and newer IOT operating data of the IOT device are received by the backend system.

Abstract: A soundproof member is provided. The soundproof member includes a structural element, and a first composite film which is disposed on the bottom surface of the structural element. The structural member includes at least one through hole and the through hole passes through the structural element. The first composite film includes a polymer material and an inorganic nanoscale material, wherein the inorganic nanoscale material is a one-dimensional inorganic nanoscale material or a two-dimensional inorganic nanoscale material.

Abstract: A method includes etching a semiconductor substrate to form trenches extending into the semiconductor substrate, and depositing a first dielectric layer into the trenches. The first dielectric layer fills lower portions of the trenches. A Ultra-Violet (UV) treatment is performed on the first dielectric layer in an oxygen-containing process gas. The method further includes depositing a second dielectric layer into the trenches. The second dielectric layer fills upper portions of the trenches. A thermal treatment is performed on the second dielectric layer in an additional oxygen-containing process gas. After the thermal treatment, an anneal is performed on the first dielectric layer and the second dielectric layer.

Abstract: A rack assembly has two support frames and at least one shelf that are secured to the support frames by connecting assemblies. Each connecting assembly comprises a well secured to a medial surface of each vertical tube of the support frame, and a hook that extends from each end of each shelf, with each hook having an opening extending therethrough. The connecting assembly also includes a connector that is seated inside each well, each connector having a top plate that has an elongated opening, the connector also having a body that is sized and configured to fit inside a well, the body defining two wings with a space between the wings, and wherein each wing has a bump positioned in the center of the inner surface of each wing that faces the space. Each hook is inserted through the elongated opening of a corresponding connector with the bump on each wing fitted inside the opening of the hook to retain the hook inside the body of the connector.

Abstract: An embodiment device includes an integrated circuit die and a first metallization pattern over the integrated circuit die. The first metallization pattern includes a first dummy pattern having a first hole extending through a first conductive region. The device further includes a second metallization pattern over the first metallization pattern. The second metallization pattern includes a second dummy pattern having a second hole extending through a second conductive region. The second hole is arranged projectively overlapping a portion of the first hole and a portion of the first conductive region.

Abstract: An electronic device includes a display, a timer and computing hardware configured to execute a software product. Execution of the software product results in generating and rendering a graphical user interface on the display with four or more user-selectable graphical objects. Selection of a first user-selectable graphical object at a first spatial position on the graphical user interface and a movement of the selected first user-selectable graphical object along a path towards a second user-selectable graphical object at a second spatial position is detected and a position of the first user-selectable graphical object is exchanged with the position of the second user-selectable graphical object. If, during a predetermined time period, a selection of a third user-selectable graphical object and a movement of the third user-selectable graphical object towards a fourth user-selectable graphical object is detected, the positions of the third and fourth objects is exchanged.

Abstract: A three-dimensional printing apparatus is provided, including a container, a display, a control unit and an optical film. The container contains a photosensitive material. The display has a plurality of display units. Each of the display units is capable of emitting a light beam. The control unit is capable of controlling the display units. The optical film is capable of projecting the light beams emitted from the display units onto the photosensitive material, forming a plurality of projected patterns. An arranging sequence and an arranging direction of the projected patterns are substantially the same as an arranging sequence and an arranging direction of the display units.