Abstract: An electronic device includes a display, a timer and computing hardware configured to execute a software product. Execution of the software product results in generating and rendering a graphical user interface on the display with four or more user-selectable graphical objects. Selection of a first user-selectable graphical object at a first spatial position on the graphical user interface and a movement of the selected first user-selectable graphical object along a path towards a second user-selectable graphical object at a second spatial position is detected and a position of the first user-selectable graphical object is exchanged with the position of the second user-selectable graphical object. If, during a predetermined time period, a selection of a third user-selectable graphical object and a movement of the third user-selectable graphical object towards a fourth user-selectable graphical object is detected, the positions of the third and fourth objects is exchanged.

Abstract: A semiconductor package includes a circuit substrate, a die, a frame structure, and a heat sink lid. The die is disposed on the circuit substrate and electrically connected with the circuit substrate. The die includes two first dies disposed side by side and separate from each other with a gap between two facing sidewalls of the two first dies. The frame structure is disposed on the circuit substrate and surrounding the die. The heat sink lid is disposed on the die and the frame structure. The head sink lid has a slit that penetrates through the heat sink lid in a thickness direction and exposes the gap between the two facing sidewalls of the two first dies.

Abstract: A method and system of discovering materials for use in carbon dioxide separation includes extracting references to chemical molecules from online sources. The extracted references are encoded into chemical formulas. Molecular properties are calculated from the encoded chemical formulas. Features are extracted from the chemical formulas. Molecular properties of predicted molecular structures are predicted through a machine learning engine. The predicted molecular properties are based on the calculated molecular properties and extracted features. Target properties for predicted molecular structures are defined. Synthesized molecular structures are generated. The synthesized molecular structures include predicted molecular properties satisfying the defined target properties.

Abstract: A soundproof member is provided. The soundproof member includes a structural element, and a first composite film which is disposed on the bottom surface of the structural element. The structural member includes at least one through hole and the through hole passes through the structural element. The first composite film includes a polymer material and an inorganic nanoscale material, wherein the inorganic nanoscale material is a one-dimensional inorganic nanoscale material or a two-dimensional inorganic nanoscale material.

Abstract: A semiconductor package includes a semiconductor die, a redistribution structure and connective terminals. The redistribution structure is disposed on the semiconductor die and includes a first metallization tier disposed in between a pair of dielectric layers. The first metallization tier includes routing conductive traces electrically connected to the semiconductor die and a shielding plate electrically insulated from the semiconductor die. The connective terminals include dummy connective terminals and active connective terminals. The dummy connective terminals are disposed on the redistribution structure and are electrically connected to the shielding plate. The active connective terminals are disposed on the redistribution structure and are electrically connected to the routing conductive traces. Vertical projections of the dummy connective terminals fall on the shielding plate.

Abstract: A rack assembly has two support frames and at least one shelf that are secured to the support frames by connecting assemblies. Each connecting assembly comprises a well secured to a medial surface of each vertical tube of the support frame, and a hook that extends from each end of each shelf, with each hook having an opening extending therethrough. The connecting assembly also includes a connector that is seated inside each well, each connector having a top plate that has an elongated opening, the connector also having a body that is sized and configured to fit inside a well, the body defining two wings with a space between the wings, and wherein each wing has a bump positioned in the center of the inner surface of each wing that faces the space. Each hook is inserted through the elongated opening of a corresponding connector with the bump on each wing fitted inside the opening of the hook to retain the hook inside the body of the connector.

Abstract: A method of fabricating a semiconductor device includes forming a dummy gate structure over a semiconductor fin. The dummy gate structure includes a dummy gate stack and gate spacers along sidewalls of the dummy gate stack. The method further includes forming an inter-layer dielectric (ILD) layer surrounding the dummy gate structure, removing the dummy gate stack to provide an opening exposing a channel region of the semiconductor fin, depositing a gate dielectric layer over bottom and sidewalls of the opening and over the ILD layer, forming a doped work function material layer over the gate dielectric layer using an in-situ doping process, and depositing a gate electrode layer over the doped work function material layer.

Abstract: A method includes depositing a metallic hardmask over a dielectric layer. The method further includes etching a metallic hardmask opening in the metallic hardmask to expose a top surface of the dielectric layer. The method further includes modifying a sidewall of the metallic hardmask opening by adding non-metal atoms into the metallic hardmask. The method further includes depositing a conductive material in the metallic hardmask opening.

Abstract: A semiconductor package includes a circuit substrate, a die, a frame structure, a heat sink lid and conductive balls. The die is disposed on a front surface of the circuit substrate and electrically connected with the circuit substrate. The die includes two first dies disposed side by side and separate from each other with a gap between two facing sidewalls of the two first dies. The frame structure is disposed on the front surface of the circuit substrate and surrounding the die. The heat sink lid is disposed on the die and the frame structure. The head sink lid has a slit that penetrates through the heat sink lid in a thickness direction and exposes the gap between the two facing sidewalls of the two first dies. The conductive balls are disposed on the opposite surface of the circuit substrate and electrically connected with the die through the circuit substrate.

Abstract: An embodiment package includes a first integrated circuit die, an encapsulant around the first integrated circuit die, and a conductive line electrically connecting a first conductive via to a second conductive via. The conductive line includes a first segment over the first integrated circuit die and having a first lengthwise dimension extending in a first direction and a second segment having a second lengthwise dimension extending in a second direction different than the first direction. The second segment extends over a boundary between the first integrated circuit die and the encapsulant.

Abstract: A package includes a conductive pad, with a plurality of openings penetrating through the conductive pad. A dielectric layer encircles the conductive pad. The dielectric layer has portions filling the plurality of openings. An Under-Bump Metallurgy (UBM) includes a via portion extending into the dielectric layer to contact the conductive pad. A solder region is overlying and contacting the UBM. An integrated passive device is bonded to the UBM through the solder region.

Abstract: A stacked via structure disposed on a conductive pillar of a semiconductor die is provided. The stacked via structure includes a first dielectric layer, a first conductive via, a first redistribution wiring, a second dielectric layer, a second conductive via, and a second redistribution wiring. The first dielectric layer covers the semiconductor die. The first conductive via is embedded in the first dielectric layer and electrically connected to the conductive pillar. The first redistribution wiring covers the first conductive via and the first dielectric layer. The second dielectric layer covers the first dielectric layer and the first redistribution wiring. The second conductive via is embedded in the second dielectric layer and landed on the first redistribution wiring. The second redistribution wiring covers the second conductive via and the second dielectric layer. A lateral dimension of the first conductive via is greater than a lateral dimension of the second conductive via.

Abstract: A wireless communication chip includes an analog front-end circuit and a baseband circuit. The analog front-end circuit includes a first transceiver circuit and a second transceiver circuit, wherein the first transceiver circuit is arranged to transmit or receive signals through a first antenna, and the second transceiver circuit is arranged to transmit or receive signals through a second antenna. The baseband circuit is arranged to control the first transceiver circuit to use a first band or a second band for communication, and/or to control the second transceiver circuit to use the first band or the second band for communication. The baseband circuit controls the first transceiver circuit and the second transceiver circuit so that the analog front-end circuit alternately performs 2T2R in the first band and 2T2R in the second band.

Abstract: An orientation-adjustment mechanism is provided, which is adapted to be affixed to a mounting surface. The orientation-adjustment mechanism includes a base, a rod, a joint unit, and a mounted member. The base is adapted to be affixed to the mounting surface. The rod includes a first section and a second section. The first section of the rod pivots on the base. The joint unit is disposed on the second section of the rod. The joint unit includes a plurality of joint-positioning portions. The joint-positioning portions include a first joint-positioning portion and a second joint-positioning portion. The mounted member is connected to the joint unit and is adapted to be rotated relative to the joint unit. The mounted member includes a member housing. The member housing includes at least one member-positioning portion.

Abstract: A package includes a conductive pad, with a plurality of openings penetrating through the conductive pad. A dielectric layer encircles the conductive pad. The dielectric layer has portions filling the plurality of openings. An Under-Bump Metallurgy (UBM) includes a via portion extending into the dielectric layer to contact the conductive pad. A solder region is overlying and contacting the UBM. An integrated passive device is bonded to the UBM through the solder region.

Abstract: An electronic device includes a display, a timer and computing hardware configured to execute a software product. Execution of the software product results in generating and rendering a graphical user interface on the display with four or more user-selectable graphical objects. Selection of a first user-selectable graphical object at a first spatial position on the graphical user interface and a movement of the selected first user-selectable graphical object along a path towards a second user-selectable graphical object at a second spatial position is detected and a position of the first user-selectable graphical object is exchanged with the position of the second user-selectable graphical object. If, during a predetermined time period, a selection of a third user-selectable graphical object and a movement of the third user-selectable graphical object towards a fourth user-selectable graphical object is detected, the positions of the third and fourth objects is exchanged.

Abstract: Various heatsink arrangements, and methods for implementing and using such are discussed.

Abstract: A method of making a dual damascene interconnect includes operations of depositing a metal hardmask over a dielectric layer; etching a metal hardmask opening in the metal hardmask to expose a top surface of the dielectric layer; etching at least one interconnect opening in the dielectric layer, to expose a top surface of a base conductive layer; modifying a sidewall of the metal hardmask opening; and depositing a conductive material in the metal hardmask opening and the at least one interconnect opening.

Abstract: An illumination system and a projection device having good uniformity are provided. The illumination system includes at least one light source, a depolarizing element, and a light homogenizing element. The at least one light source is configured to provide multiple beams. The depolarizing element is disposed on a transmission path of the beams. The depolarizing element includes a first optical element, which is wedge-shaped and has a first optical axis. A direction of any one of the beams incident onto the first optical element is parallel to the first optical axis. The beams respectively become multiple linearly polarized beams with different polarization directions after passing through the first optical element. The light homogenizing element is configured to allow the linearly polarized beams to pass through to form an illumination beam. The depolarizing element is located between the at least one light source and the light homogenizing element.