Patents by Inventor Hao Wang

Hao Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250221893
    Abstract: An automatic pushing type complementary food device which includes a clamping body, an elastic member and a colander, wherein the inner side of the clamping body is connected to one end of an elastic member in a clamped manner, the outer side of the clamping body is connected to the colander in a clamped manner, the other end of the elastic member extends into the colander, a complementary food cavity is provided in the colander, and overflow holes are provided in the outer wall of the colander.
    Type: Application
    Filed: March 5, 2025
    Publication date: July 10, 2025
    Applicant: Beijing Shenchuang Century Information Technology Co., Ltd.
    Inventor: Hao WANG
  • Publication number: 20250227849
    Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.
    Type: Application
    Filed: March 27, 2025
    Publication date: July 10, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien-Fan CHEN, Chien-Hao WANG
  • Publication number: 20250227870
    Abstract: A holding mechanism is provided, and includes a frame, a carrier, and a bracket. The frame is used to accommodate an electronic component. The carrier is affixed to the frame. The bracket has a sliding rail. The carrier is connected to the bracket via the sliding rail so that the frame may be rotated relative to the frame. Accordingly, additional electronic components can be disposed above the chassis, and the convenience of installing or removing electronic components can be improved.
    Type: Application
    Filed: March 22, 2024
    Publication date: July 10, 2025
    Inventors: Jun-Hao WANG, Hua Jun LIANG, Zhao Ping FU
  • Publication number: 20250222226
    Abstract: Disclosed are a main unit of ventilation device, a ventilation device, and a medical device, including a housing, a gas path assembly and a pressure monitoring assembly. The housing is provided with an inner cavity and an outer side of the housing is recessed inward to form an accommodating cavity. The gas path assembly includes an oxygen control assembly and an output interface. The oxygen control assembly is connected with an oxygen supply apparatus, the output interface is connected with an inspiratory branch. the accommodation cavity is configured to removably accommodate at least one portable medical device. The portable medical device includes an interface side which is provided with a cable interface, wherein when the portable medical device is accommodated inside the accommodation cavity, the output interface and the cable interface are located on different sides of the housing, so as to expand its function and broaden a use scope.
    Type: Application
    Filed: March 26, 2025
    Publication date: July 10, 2025
    Applicant: SHENZHEN MINDRAY BIO-MEDICAL ELECTRONICS CO., LTD.
    Inventors: Huan HOU, Dengshui LAI, Kai WEI, Hao WANG
  • Publication number: 20250217981
    Abstract: This application is directed to systems, methods, and devices for image based analysis of plaque. In some embodiments, the approaches herein can be used for developing treatment plans, which can include local treatment, systemic treatment, or both. In some embodiments, the approaches herein can be used for stent selection. In some embodiments, the approaches herein can be used for surgical planning, which can include robotic surgical planning. In some embodiments, the approaches herein can be used for image normalization. In some embodiments, the approaches herein can be used for identifying plaque calcification thresholds. In some embodiments, the approaches herein can be used for identifying thin cap fibroatheroma. In some embodiments, the approaches herein can be used for coronary artery tree reconstruction. Some embodiments are directed to coronary artery disease risk stratification.
    Type: Application
    Filed: May 1, 2024
    Publication date: July 3, 2025
    Inventors: James K. Min, James P. Earls, Chung Chan, Hugo Miguel Rodrigues Marques, Shai Ronen, Hao Wang
  • Publication number: 20250217904
    Abstract: An electric-thermal integrated energy control method is provided. The method comprises predicting renewable energy and multivariate loads in an integrated energy system based on a pretrained SA-PSO-BP neural network; constructing an objective function of the integrated energy system, and adding power network constraints and heat network constraints for optimal scheduling; and obtaining an optimal solution of the objective function by means of a SA-PSO algorithm based on prediction results of the renewable energy and the multivariate loads, and controlling the integrated energy system according to the optimal solution of the objective function; wherein, a training process of the SA-PSO-BP neural network comprises: training a BP neural network by means of a feature training set, and iterating and updating weights and thresholds in the BP neural network in the training process by means of the SA-PSO algorithm to obtain the SA-PSO-BP neural network.
    Type: Application
    Filed: October 24, 2022
    Publication date: July 3, 2025
    Applicant: NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Chunxia DOU, Hao WANG, Dong YUE, Zhijun ZHANG
  • Patent number: 12349456
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a semiconductor fin including a first surface, a second surface opposite the first surface, a third surface connecting the first surface and the second surface, and a fourth surface opposite the third surface. The semiconductor device structure further includes a gate electrode layer disposed adjacent the first, third, and fourth surfaces of the semiconductor fin, a first source/drain epitaxial feature in contact with the semiconductor fin, and a first inner spacer disposed between the first source/drain epitaxial feature and the gate electrode layer. The first inner spacer is in contact with the first source/drain epitaxial feature, and the first inner spacer comprises a first material. The semiconductor device structure further includes a first spacer in contact with the first inner spacer, and the first spacer comprises a second material different from the first material.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: July 1, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuan-Ting Pan, Kuo-Cheng Chiang, Shi-Ning Ju, Yi-Ruei Jhan, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 12347141
    Abstract: A method with object pose estimation includes: obtaining an instance segmentation image and a normalized object coordinate space (NOCS) map by processing an input single-frame image using a deep neural network (DNN); obtaining a two-dimensional and three-dimensional (2D-3D) mapping relationship based on the instance segmentation image and the NOCS map; and determining a pose of an object instance in the input single-frame image based on the 2D-3D mapping relationship.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: July 1, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Weiming Li, Jiyeon Kim, Hyun Sung Chang, Qiang Wang, Sunghoon Hong, Yang Liu, Yueying Kao, Hao Wang
  • Publication number: 20250212505
    Abstract: A semiconductor structure includes first and second channel structures, an isolation structure, a gate structure, first and second epitaxial features, and a dielectric layer. The isolation structure is disposed between the first and second channel structures. A top surface of the isolation structure comprises a first portion adjacent the first channel structure and a second portion equidistant from the first channel structure and the second channel structure, wherein the first portion is higher than the second portion. The gate structure is disposed over the first and second channel structures. The first epitaxial feature is adjacent to a sidewall of the first channel structure. The second epitaxial feature is adjacent to a sidewall of the second channel structure. The dielectric layer is between the first channel structure and the second channel structure. The dielectric layer is over the second portion of the isolation structure and has a U-shaped cross-sectional profile.
    Type: Application
    Filed: March 11, 2025
    Publication date: June 26, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Cheng CHING, Shi-Ning JU, Chih-Hao WANG
  • Publication number: 20250210991
    Abstract: The present disclosure discloses a control method. The method includes: acquiring target operation state information of an output circuit of a transformer to determine an operation state of a power grid based on the target operation state information; and controlling a switching transistor in the output circuit and an input circuit of the transformer to reduce the target current in response to determining that the power grid is in a predetermined operation state.
    Type: Application
    Filed: December 13, 2024
    Publication date: June 26, 2025
    Inventors: Qiaodi CHEN, Zichen WANG, Hao WANG, Jiacai ZHUANG
  • Publication number: 20250208220
    Abstract: The present disclosure discloses an energy storage system and a monitoring apparatus for the energy storage system. The monitoring apparatus for the energy storage system includes: a plurality of monitors, each monitor being configured to sample an input electrical signal and/or an output electrical signal of one energy storage device and determine an operating parameter of the corresponding energy storage device based on the input electrical signal and/or the output electrical signal, and each monitor supporting a wireless networking mode; and a display terminal configured to perform a wireless communication with an upper computer, and transmit the operating parameter of the corresponding energy storage device to the upper computer by performing a wireless communication with each monitor when each the monitor operates in the wireless networking mode, to allow the upper computer to display the operating parameter of the corresponding energy storage device.
    Type: Application
    Filed: April 25, 2024
    Publication date: June 26, 2025
    Inventors: Hao WANG, Haojun HONG, Chenxin HONG
  • Publication number: 20250212164
    Abstract: Embodiments of the invention relate to a first target node (100) for a positioning system (400). The first target node (100) is configured to receive positioning reference signals (410) and a positioning message (420) from at least one second target node (300). The positioning message (420) of the second target node (300) indicates at least one estimated position of the second target node (300). Based on the received positioning reference signals (410) and the positioning message (420) of the second target node (300) the first target node (100) determines at least one estimated position (P1) of its own position. Thereby, improved positioning accuracy is provided. Furthermore, the invention also relates to a corresponding method and a computer program.
    Type: Application
    Filed: March 7, 2025
    Publication date: June 26, 2025
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Sha Hu, Hao Wang
  • Patent number: 12342587
    Abstract: An integrated circuit includes a first nanostructure transistor including a plurality of first semiconductor nanostructures over a substrate and a source/drain region in contact with each of the first semiconductor nanostructures. The integrated circuit includes a second nanostructure transistor including a plurality of second semiconductor nanostructures and a second source/drain region in contact with one or more of the second semiconductor nanostructures but not in contact with one or more other second semiconductor nanostructures.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: June 24, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Zhi-Chang Lin, Chien Ning Yao, Shih-Cheng Chen, Jung-Hung Chang, Tsung-Han Chuang, Kuo-Cheng Chiang, Chih-Hao Wang
  • Patent number: 12342616
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a stack of semiconductor layers spaced apart from and aligned with each other, a first source/drain epitaxial feature in contact with a first one or more semiconductor layers of the stack of semiconductor layers, and a second source/drain epitaxial feature disposed over the first source/drain epitaxial feature. The second source/drain epitaxial feature is in contact with a second one or more semiconductor layers of the stack of semiconductor layers. The structure further includes a first dielectric material disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature and a first liner disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature. The first liner is in contact with the first source/drain epitaxial feature and the first dielectric material.
    Type: Grant
    Filed: March 22, 2024
    Date of Patent: June 24, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Cheng Chen, Zhi-Chang Lin, Jung-Hung Chang, Lo Heng Chang, Chih-Hao Wang, Chien Ning Yao, Kuo-Cheng Chiang
  • Patent number: 12338253
    Abstract: A nitrogen-containing polycyclic fused ring compound of formula I, a pharmaceutical composition thereof, a preparation method therefor and use thereof are related to the field of medicinal chemistry. The compound can be used as a selective and effective RET inhibitor. It has strong inhibitory effect on the RET gatekeeper residue mutant RET V804M, RET solvent-front residue mutant RET G810R and other clinically relevant RET mutants, as well as RET wt. The compound can also inhibit the growth of TT cell line derived from thyroid cancer and Ba/F3 cells transformed with various RET mutants, and induce the death of TT cells.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: June 24, 2025
    Assignee: Applied Pharmaceutical Science, Inc.
    Inventors: Jun Zhong, Yongbo Liu, Libin Liu, Xiaohu Chen, Hao Wang, Ying Lu
  • Patent number: 12342604
    Abstract: A method of forming a fin field effect transistor (finFET) on a substrate includes forming a fin structure on the substrate and forming a shallow trench isolation (STI) region on the substrate. First and second fin portions of the fin structure extend above a top surface of the STI region. The method further includes oxidizing the first fin portion to convert a first material of the first fin portion to a second material. The second material is different from the first material of the first fin portion and a material of the second fin portion. The method further includes forming an oxide layer on the oxidized first fin portion and the second fin portion and forming first and second polysilicon structures on the oxide layer.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: June 24, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Cheng Chiang, Chih-Hao Wang, Kuan-Lun Cheng, Yen-Ming Chen
  • Publication number: 20250203955
    Abstract: A device and method of forming a device are provided. The method includes forming a stack of nanostructure channels over a substrate by forming a source/drain opening. The method also includes forming a sacrificial source/drain in the source/drain opening. The method further includes increasing tensile strain of the stack of nanostructure channels by replacing the sacrificial source/drain with a replacement source/drain having germanium concentration that exceeds that of the sacrificial source/drain.
    Type: Application
    Filed: June 4, 2024
    Publication date: June 19, 2025
    Inventors: Hsien-Chih HUANG, Guan-Lin CHEN, Chia-Hao YU, Pei-Yu WANG, Chih-Hao WANG
  • Publication number: 20250201581
    Abstract: A method for processing an integrated circuit includes forming a plurality of transistors. The method utilizes a reversed tone patterning process to selectively drive dipoles into the gate dielectric layers of some of the transistors while preventing dipoles from entering the gate dielectric layers of other transistors. This process can be repeated to produce a plurality of transistors each having different threshold voltages.
    Type: Application
    Filed: February 28, 2025
    Publication date: June 19, 2025
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Lung-Kun CHU, Jia-Ni YU, Chun-Fu LU, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20250203049
    Abstract: A projection apparatus includes a projection component, a camera device, and at least one processor in connection with the camera device and the projection component respectively. The at least one processor is configured to execute instructions to cause the display apparatus to: in response to a projection command input from a user, control the projection component to project a first graphic card onto a screen, and obtain a first image taken by the camera device for the first graphic card; cut the first graphic card in the first image to obtain a first graphic card image; perform binarization processing on the first graphic card image, and obtain a white connected region in the first graphic card image based on a binarization result; position a to-be-projected region based on the white connected region; and control the projection component to project a to-be-projected content to the to-be-projected region.
    Type: Application
    Filed: March 4, 2025
    Publication date: June 19, 2025
    Inventors: Gaoming TANG, Xianrong LIU, Lijuan YANG, Jialin LI, Hao WANG, Guohua YUE
  • Patent number: D1080887
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: June 24, 2025
    Assignee: DREAM LION International Limited
    Inventor: Hao Wang