Abstract: Herein disclosed are a wafer, a wafer testing system, and a method thereof. Said wafer testing method comprises the following steps. First, an incident light is provided toward a wafer. And, a wafer surface image corresponded to the wafer is generated. Then, determining whether the wafer surface image has a plurality of first strips and a plurality of second strips, and the plurality of first strips and the plurality of second strips are symmetrical. When the wafer surface image has the plurality of first strips and the plurality of second strips, and the plurality of first strips and the plurality of second strips are symmetrical, a qualified signal corresponded to the wafer is provided.

Abstract: In various embodiments, a training application trains a machine learning model to preprocess images. In operation, the training application computes a chroma sampling factor based on a downscaling factor and a chroma subsampling ratio. The training application executes a machine learning model that is associated with the chroma sampling factor on data that corresponds to both an image and a first chroma component to generate preprocessed data corresponding to the first chroma component. Based on the preprocessed data, the training application updates at least one parameter of the machine learning model to generate a trained machine learning model that is associated with the first chroma component.

Abstract: In various embodiments, a training application generates a perceptual video model. The training application computes a first feature value for a first feature included in a feature vector based on a first color component associated with a first reconstructed training video. The training application also computes a second feature value for a second feature included in the feature vector based on a first brightness component associated with the first reconstructed training video. Subsequently, the training application performs one or more machine learning operations based on the first feature value, the second feature value, and a first subjective quality score for the first reconstructed training video to generate a trained perceptual quality model. The trained perceptual quality model maps a feature value vector for the feature vector to a perceptual quality score.

Abstract: The present disclosure provides a memory array. The memory array includes a first memory cell, a first word line, a second word line, a first bit line, a first complementary bit line, a second bit line, a second complementary bit line, a first sense amplifier, a second sense amplifier and a first logic circuit. When the memory array operates in a binary content-addressable memory (BCAM) mode, during a search operation, a first logic output indicates whether a logic level of the first word line matches a first logic value at a first terminal of a first data storage of the first memory cell, and whether a logic level of the second word line matches a first complementary logic value at a second terminal of the first data storage of the first memory cell.

Abstract: A heating apparatus including a rotating stage, a plurality of wafer carriers, a first heater, and a second heater is provided. The rotating stage includes a rotating axis. The plurality of wafer carriers is disposed on the rotating stage. The rotating stage drives the wafer carriers to rotate on the rotating axis. The first heater is disposed under the rotating stage. The first heater includes a first width in a radial direction of the rotating stage. The second heater is disposed under the rotating stage. The second heater and the first heater are separated from each other. The second heater includes a second width in the radial direction of the rotating stage, and the first width is not equal to the second width. A chemical vapor deposition (CVD) system using the heating apparatus is also provided.

Abstract: A touch detection method, suitable for a touch display panel including multiple sensing pads, is disclosed. The sensing pads are divided into groups and each of the groups includes at least two columns of the sensing pads. The touch detection method includes following steps. In a first mode, the sensing pads are scanned group-by-group for detecting whether a touch event occurs on a touch identified group. In a second mode, the sensing pads are scanned column-by-column to identify a touch position of the touch event.

Abstract: An epitaxial semiconductor structure including a substrate, a semiconductor layer, and a balance structure is provided. The substrate has a first surface and a second surface opposite to each other. The semiconductor layer is formed on the first surface. The balance structure is formed on the second surface, the balance structure is configured to balance the thermal stress on the substrate, and the balance structure is composed of a plurality of non-continuous particulate materials. An epitaxial substrate is also provided.

Abstract: In various embodiments, a quality inference application estimates the perceived quality of reconstructed videos. The quality inference application computes a first feature value for a first feature included in a feature vector based on a color component associated with a reconstructed video. The quality inference application also computes a second feature value for a second feature included in the feature vector based on a brightness component associated with the reconstructed video. Subsequently, the quality inference application computes a perceptual quality score based on the first feature value and the second feature value. The perceptual quality score indicates a level of visual quality associated with at least one frame included in the reconstructed video.

Abstract: A semiconductor device includes a substrate, a plurality of insulators, a liner structure and a gate stack. The substrate has fins and trenches in between the fins. The insulators are disposed within the trenches of the substrate. The liner structure is disposed on the plurality of insulators and across the fins, wherein the liner structure comprises sidewall portions and a cap portion, the sidewall portions is covering sidewalls of the fins, the cap portion is covering a top surface of the fins and joined with the sidewall portions, and a maximum thickness T1 of the cap portion is greater than a thickness T2 of the sidewall portions. The gate stack is disposed on the liner structure and across the fins.

Abstract: A method of manufacturing a metal mask includes calendering a metal material, so as to form a metal mask substrate, where the metal mask substrate includes a surface and a plurality of grooves formed in the surface, and the grooves all extend in a direction. The surface has at least one sampling region, while at least two grooves are distributed in the sampling region, where an average area ratio of the area of the grooves within the sampling region to the area of the sampling region ranges between 45% and 68%.

Abstract: A power supply system for preventing battery packs connected in parallel from charging each other is provided. Each of a plurality of battery packs includes a plurality of batteries, a sensing resistor, a detector circuit, a discharging transistor, a charging transistor, and a controller circuit. The sensing resistor has a first end connected to a negative terminal of the battery packs and a second end connected to a negative electrode of the battery circuit. The detector circuit is connected to the first end and the second end of the sensing resistor. The discharging transistor has a first end connected to a positive terminal of the battery packs and a second end connected to a first end of the charging transistor. According to a current of the sensing resistor, the controller circuit controls the discharging transistor and the charging transistor to be turned on or off.

Abstract: A method for manufacturing a radial or azimuthal polarization conversion component comprises the steps of: placing a holographic recording material between two right-angle prisms, wherein the holographic recording material is divided into at least four sector-shaped areas and is partially shielded, and only one of the sector-shaped areas is exposed each time; allowing a recording light to pass through the right-angle prisms and the exposed sector-shaped area of the holographic recording material and to interfere with a reflected object light on the holographic recording material; rotating the holographic recording material to expose the other sector-shaped areas one by one to be constructed for manufacturing volume holograms with diffraction angles of 48.19 degrees, 60 degrees or about 85 degrees.

Abstract: An apparatus for manufacturing a radial or azimuthal polarization conversion component includes a reflector having a truncated cone shape. The reflector has a top portion, a bottom portion, and a circumferential portion connected between the top portion and the bottom portion.

Abstract: A method of forming a semiconductor device includes forming a first layer on a semiconductor fin; forming a mask on the first layer, the mask being thicker on a top of the semiconductor fin than along a sidewall of the semiconductor fin. The first layer is thinned along the sidewall of the semiconductor fin using the mask. A second layer is formed on the semiconductor fin, the second layer covering the mask and the first layer. A dummy gate layer is formed on the semiconductor fin and patterned to expose a top surface of the semiconductor fin.

Abstract: An optical fingerprint identification structure is provided, including: a protective glass and an optical fingerprint identification module, wherein the optical fingerprint identification module is located under the protective glass. The protective glass of the present invention is of a thickness. The gap between the protective glass and the optical fingerprint identification module is an air gap. The optical fingerprint identification module further comprises: a receiving lens assembly, an image sensor module, a module housing, and a module housing extension, the receiving lens assembly is located at the top of the optical fingerprint identification module, that is, close to the air gap, and the image sensor module is located below the receiving lens assembly. As such, the size of the optical fingerprint identification structure is reduced, and is applicable to the side of device, so that the usable area on the front and back of the device is increased.

Abstract: A display panel includes a substrate, a plurality of standard pixel units, and a plurality of dummy pixel units. A plurality of first conductor patterns and a plurality of shield blocks of a shield pattern layer are arranged in an array above the substrate. Each of the standard pixel units includes one of the first conductor patterns and a first shield block of the shield blocks. The first shield blocks and the first conductor patterns are overlapped, respectively. Each of the dummy pixel units includes a second shield block of the shield blocks. The second shield blocks and the first conductor patterns are not overlapped. A first edge of the substrate is spaced apart from a second edge of one of the standard pixel units adjacent to the dummy pixel units by a first distance. The first distance is within a range from 50 ?m to 3000 ?m.

Abstract: A method includes forming a protruding structure, and forming a non-conformal film on the protruding structure using an Atomic Layer Deposition (ALD) process. The non-conformal film includes a top portion directly over the protruding structure, and a sidewall portion on a sidewall of the protruding structure. The top portion has a first thickness, and the sidewall portion has a second thickness smaller than the first thickness.

Abstract: A semiconductor wafer carrier structure is provided. The semiconductor wafer carrier structure includes a susceptor and a patterned heat conduction part disposed on the susceptor. At least a portion of the patterned heat conduction part has a different heat conduction coefficient than the susceptor. A metal-organic chemical vapor deposition equipment is also provided. The metal-organic chemical vapor deposition equipment includes a carrier body having a plurality of carrier units. The above semiconductor wafer carrier structure is placed in at least one of the carrier units.

Abstract: A semiconductor wafer carrier structure includes a carrier body having a surface; a protective film covering the surface; a susceptor disposed on the carrier body; and a patterned coating film on the susceptor, wherein the patterned coating film has two or more different thicknesses, wherein patterns of the patterned coating film are symmetrically distributed with respect to a center of the susceptor.

Abstract: In an embodiment, a structure includes: a nano-structure; an epitaxial source/drain region adjacent the nano-structure; a gate dielectric wrapped around the nano-structure; a gate electrode over the gate dielectric, the gate electrode having an upper portion and a lower portion, a first width of the upper portion increasing continually in a first direction extending away from a top surface of the nano-structure, a second width of the lower portion being constant along the first direction; and a gate spacer between the gate dielectric and the epitaxial source/drain region.