Patents by Inventor Hsiang Wang
Hsiang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230219101Abstract: A fluid pipe magnetization unit includes a ferromagnetism casing, a plurality of magnetic rods, and at least one flow limiting element. The magnetic rods include at least one first magnetic rod and at least one second magnetic rod. Inner elements of the first magnetic rod and the second magnetic rod are alternately positioned with opposite magnetic poles in the ferromagnetism casing. The at least one flow limiting element is arranged in at least one weak magnetic area in the ferromagnetism casing to prevent fluid from flowing through the at least one weak magnetic area. In addition, a fluid pipe magnetization device with the same is also disclosed herein.Type: ApplicationFiled: May 20, 2022Publication date: July 13, 2023Inventors: Ching-Ho YU, Yung-Hsiang WANG, Chih-Chieh MO
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Publication number: 20230219435Abstract: A charging gun is applicable to a charger station. The charging gun includes a charging gun body and a charge state display apparatus. The charge state display apparatus includes a charge state sensor, a display light module, and a controller. The charge state sensor is configured to sense a charge state of the charger station. The display light module is arranged on the charging gun body. The display light module includes a first light-emitting element, a second light-emitting element, and a third light-emitting element. The controller is electrically connected to the charge state sensor and the display light module. The controller is configured to control the first light-emitting element, the second light-emitting element, or the third light-emitting element to emit light according to the charge state.Type: ApplicationFiled: December 28, 2022Publication date: July 13, 2023Inventors: Shih-Hsiang WANG, Jia-Xing LIN, Shih-Wei WANG, Min-Hsiu TSAI
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Patent number: 11699596Abstract: In an embodiment, a method includes: receiving, within a processing chamber, a wafer with a photoresist mask above a metal layer, wherein the processing chamber is connected to a gas source; applying an etchant configured to etch the metal layer in accordance with the photoresist mask within the processing chamber; and applying gas from the gas source to perform plasma ashing in the processing chamber.Type: GrantFiled: November 14, 2019Date of Patent: July 11, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsing-Hsiang Wang, Yu-Hsiang Lin, Wei-Da Chen, Tom Peng, P. Y. Chiu, Miau-Shing Tsai, Cheng-Yi Huang, Ching-Horng Chen
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Patent number: 11699771Abstract: A non-diffusion type photodiode is described and has: a substrate, a buffer layer, a light absorption layer, an intermediate layer, and a multiplication/window layer. The buffer layer is disposed on the substrate. The light absorption layer is disposed on the buffer layer. The intermediate layer is disposed on the light absorption layer and has a first boundary, wherein the intermediate layer is an I-type semiconductor layer or a graded refractive index layer. The multiplication/window layer is disposed on the intermediate layer and has a second boundary, wherein in a top view, the first boundary surrounds the second boundary, and a distance between the first boundary and the second boundary is greater than or equal to 1 micrometer. The non-diffusion type photodiode can reduce generation of dark current.Type: GrantFiled: June 24, 2021Date of Patent: July 11, 2023Assignee: LANDMARK OPTOELECTRONICS CORPORATIONInventors: Huang-wei Pan, Hung-Wen Huang, Yung-Chao Chen, Yi-Hsiang Wang
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Patent number: 11695007Abstract: A method of biasing a guard ring structure includes biasing a gate of a MOS transistor to a first bias voltage level, biasing first and second S/D regions of the MOS transistor to a power domain voltage level, biasing a gate of the guard ring structure to a second bias voltage level, and biasing first and second heavily doped regions of the guard ring structure to the power domain voltage level. Each of the first and second S/D regions has a first doping type, each of the first and second heavily doped regions has a second doping type different from the first doping type, and each of the first and second S/D regions and the first and second heavily doped regions is positioned in a substrate region having the second doping type.Type: GrantFiled: September 23, 2020Date of Patent: July 4, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Hsiang Wang, Szu-Lin Liu, Jaw-Juinn Horng, Yung-Chow Peng
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Publication number: 20230207540Abstract: A light-emitting device includes a circuit carrier board having a short side and a long side, a plurality of light-emitting units on the circuit carrier board for emitting three or more color lights, and a light-transmitting glue layer on the circuit carrier board and covering the plurality of light-emitting units. The short side is shorter than the long side. The plurality of light-emitting units include a first light-emitting unit. The first light-emitting unit has a light exit surface, a first sidewall, and a second sidewall. The first sidewall faces the short side and has a first included angle with the light exit surface, and the second sidewall faces the long side and has a second included angle with the light exit surface. The first included angle is between 85 to 95 degrees, and the second included angle is less than 85 degrees or greater than 105 degrees.Type: ApplicationFiled: December 15, 2022Publication date: June 29, 2023Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Tzu-Hsiang WANG, Ya-Wen LIN, Chi-Chih PU, Hsiao-Pei CHIU, Ching-Tai CHENG, Chong-Yu WANG
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Publication number: 20230207742Abstract: A pixel package includes an electrode structure, a plurality of light-emitting units arranged on the electrode structure, and a light transmitting layer. The electrode structure has an upper layer with a first upper sheet, a lower layer with a first lower sheet, and a supporting layer arranged between the upper layer and the lower layer. The electrode structure and the plurality of light-emitting units are fully embedded in the light transmitting layer. In a top view of the pixel package, the first upper sheet is overlapped with and larger than the first lower sheet.Type: ApplicationFiled: December 29, 2021Publication date: June 29, 2023Inventors: Chi-Chih PU, Li-Yuan HUANG, Tzu-Hsiang WANG, Ya-Wen LIN
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Patent number: 11686987Abstract: The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.Type: GrantFiled: November 12, 2021Date of Patent: June 27, 2023Assignee: INNOLUX CORPORATIONInventors: Chung-Wen Yen, Yu-Tsung Liu, Chao-Hsiang Wang, Te-Yu Lee
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Publication number: 20230185323Abstract: A device is provided. The device includes an operational amplifier, an output circuit, a first capacitor, and a second capacitor. The operational amplifier is configured to generate an output according to a feedback signal. The output circuit is configured to generate a first current signal in response to a supply voltage and the output of the operational amplifier. The first current signal includes a first ripple signal. The first capacitor and the second capacitor are coupled in parallel between the operational amplifier and the output circuit. The first capacitor is configured to receive the first current signal and feedback to the operational amplifier the first ripple signal.Type: ApplicationFiled: February 6, 2023Publication date: June 15, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Hsiang WANG, Jaw-Juinn HORNG
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Patent number: 11677057Abstract: A light emitting device includes a substrate, a first group of light emitting diode (LED) structures, a second group of LED structures, and a connection port is provided. The substrate has a first surface and a second surface opposite to the first surface. The first group of LED structures is disposed on one side of the first surface. The second group of LED structures is disposed on another side of the first surface opposite to the first group of LED structures. The connection portion includes at least an opening, and a first connection pad and a second connection pad electrically coupled to at least a part of the LED structures. The connection port is adapted to be coupled to other device through the opening. A light emitting module and an illuminating apparatus are also provided.Type: GrantFiled: November 30, 2020Date of Patent: June 13, 2023Assignee: EPISTAR CORPORATIONInventors: Tzu-Hsiang Wang, Chi-Chih Pu, Chen-Hong Lee
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Publication number: 20230175317Abstract: A safety gate is configured to be mounted at a gateway and has a frame and a gate body. The frame is configured to be mounted between two walls disposed at two sides of the gateway. The frame has two sides and two first positioning assemblies respectively disposed at the two sides of the frame. The gate body is disposed in the frame and has two sides and two first pivot assemblies respectively disposed at the two sides of the gate body. The first pivot assembly at each side of the gate body is configured to detachably and pivotally connect with the first positioning assembly at a respective one of the sides of the frame.Type: ApplicationFiled: November 15, 2022Publication date: June 8, 2023Inventor: TSUNG-HSIANG WANG
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Patent number: 11671084Abstract: An integrated circuit includes a first metal-insulator-semiconductor capacitor, a second metal-insulator-semiconductor capacitor, and a metal-insulator-metal capacitor. A first terminal of the first metal-insulator-semiconductor capacitor is configured to receive a first reference voltage for a higher voltage domain, while a first terminal of the second metal-insulator-semiconductor capacitor is configured to receive a second reference voltage for the higher voltage domain. A second terminal of the first metal-insulator-semiconductor capacitor is conductively connected to a first terminal of the metal-insulator-metal capacitor, while a second terminal of the second metal-insulator-semiconductor capacitor is conductively connected to a second terminal of the metal-insulator-metal capacitor.Type: GrantFiled: August 24, 2021Date of Patent: June 6, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Szu-Lin Liu, Jaw-Juinn Horng, Yi-Hsiang Wang, Wei-Lin Lai
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Publication number: 20230170361Abstract: The optical device includes a first photodiode, a second photodiode, and a hybrid absorber. The hybrid absorber is disposed above the first photodiode and the second photodiode. The hybrid absorber includes a color filter layer and a plurality of metal-insulator-metal structures. The color filter layer includes a first color filter disposed on the first photodiode and a second color filter disposed on the second photodiode, in which the first color filter is different from the second color filter. The plurality of metal-insulator-metal structures are disposed above the first photodiode and free of disposed above the second photodiode.Type: ApplicationFiled: March 29, 2022Publication date: June 1, 2023Inventors: Kai-Hao CHANG, An-Li KUO, Chun-Yuan WANG, Shin-Hong KUO, Po-Hsiang WANG, Zong-Ru TU, Yu-Chi CHANG, Chih-Ming WANG
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Patent number: 11664389Abstract: A thin film transistor substrate includes a substrate, a first conductive layer, a second conductive layer and a semiconductor layer. The first conductive layer is disposed on the substrate and includes a trace portion extending along a first direction and a protrusive portion extending from the trace portion. The second conductive layer is disposed on the first conductive layer and includes a wiring portion extending along a second direction. The trace portion has a first edge and a second edge opposite to the first edge, and the protrusive portion has at least one curved edge connecting with the second edge. When viewed in a third direction perpendicular to the first direction and the second direction, an interface disposes between the trace portion and the protrusive portion, a virtual extending line overlaps the second edge and the interface, and the semiconductor layer extends beyond the virtual extending line.Type: GrantFiled: May 9, 2022Date of Patent: May 30, 2023Assignee: INNOLUX CORPORATIONInventors: Cheng-Hsiung Chen, Pei-Chieh Chen, Chao-Hsiang Wang, Yi-Ching Chen
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Patent number: 11664431Abstract: The present disclosure relates to a transistor device. The transistor device includes a plurality of first source/drain contacts disposed over a substrate. A plurality of gate structures are disposed over the substrate between the plurality of first source/drain contacts. The plurality of gate structures wrap around the plurality of first source/drain contacts in a plurality of closed loops. A second source/drain contact is disposed over the substrate between the plurality of gate structures. The second source/drain contact continuously wraps around the plurality of gate structures as a continuous structure.Type: GrantFiled: January 8, 2021Date of Patent: May 30, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Aurelien Gauthier Brun, Chun Lin Tsai, Jiun-Lei Jerry Yu, Po-Chih Chen, Yun-Hsiang Wang
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Publication number: 20230154956Abstract: An image sensor includes a first pixel array. The first pixel array includes multiple photo diodes and a polyhedron structure. The polyhedron structure is located above the photo diodes, and the polyhedron structure includes a bottom facet, a top facet, and at least one side facet. The bottom facet is located between the side facet and the photo diodes, and an orthogonal projection of the polyhedron structure overlaps with photo diodes. The polyhedron structure is configured to divide an incident light into a plurality of light beams focused in the photo diodes.Type: ApplicationFiled: June 7, 2022Publication date: May 18, 2023Inventors: Shin-Hong KUO, Yu-Chi CHANG, Zong-Ru TU, Ching-Chiang WU, Po-Hsiang WANG
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Publication number: 20230145833Abstract: Raw material grains according to the present invention comprise, as components, 40 to 60% plant fiber powder, 20 to 30% starch, 10 to 20% vegetable gum powder obtained by fermenting starch, 2 to 15% water-soluble polymer glue, and 1 to 10% water-soluble cellulose derivative. The production process thereof primarily includes: a step of appropriately adjusting blending ratios in accordance with the production method, rotating and kneading for 10-40 minutes the fiber powder, starch, and vegetable gum powder, each in a separate kneader, and then batch stirring and kneading all of the blending components in a fourth kneader to thereby obtain a raw material; and a step of subsequently molding the mixed raw material into a plurality of strands in a molding device, cutting the strands into granular raw material grains via a cutting unit, cooling the raw material grains, and then packaging a raw material grain product.Type: ApplicationFiled: March 1, 2021Publication date: May 11, 2023Applicants: Amica Terra Co., Ltd., House Foods Group Inc.Inventor: Cheng Hsiang Wang
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Publication number: 20230138767Abstract: A control circuit of a power converter and a control method thereof are provided. The control circuit includes an error amplifier, a controller, a digital filter, and a digital pulse width signal modulator. The error amplifying circuit is coupled to an output terminal of the power converter and provides a digital error signal. The controller provides a first working parameter corresponding to the first external control command when receiving a first external control command. The digital filter generates a current digital compensation value. The digital pulse width signal modulator generates a pulse width modulation signal. The controller provides a second working parameter corresponding to the second external control command when receiving a second external control command. The controller calculates a transition value according to the second working parameter and the current digital compensation value. The controller provides the second working parameter and the transition value to the digital filter.Type: ApplicationFiled: September 16, 2022Publication date: May 4, 2023Applicant: uPI Semiconductor Corp.Inventors: Yun-Kuo Lee, Wei-Hsiang Wang, Yen-Chih Lin, Wei-Hsiu Hung
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Patent number: 11641720Abstract: A circuit board includes a composite structure layer, at least one conductive structure, a thermally conductive substrate, and a thermal interface material layer. The composite structure layer has a cavity and includes a first structure layer, a second structure layer, and a connecting structure layer. The first structure layer includes at least one first conductive member, and the second structure layer includes at least one second conductive member. The cavity penetrates the first structure layer and the connecting structure layer to expose the second conductive member. The conductive structure at least penetrates the connecting structure layer and is electrically connected to the first conductive member and the second conductive member. The thermal interface material layer is disposed between the composite structure layer and the thermally conductive substrate, and the second structure layer is connected to the thermally conductive substrate through the thermal interface material layer.Type: GrantFiled: April 6, 2021Date of Patent: May 2, 2023Assignee: Unimicron Technology Corp.Inventors: Pei-Wei Wang, Shao-Chien Lee, Ra-Min Tain, Chi-Chun Po, Po-Hsiang Wang, Pei-Chang Huang, Chin-Min Hu
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Patent number: 11636795Abstract: A method of providing display signal, performed by a first processing device, and the method includes: triggered by a first detection signal to read first identification data of a display, obtaining second identification data according to a reading condition, outputting a second detection signal to a second processing device to obtain an identification data request signal from the second processing device, and outputting the second identification data to the second processing device according to the identification data request signal to instruct the second processing device to output a display signal to the display according to a resolution indicated by the second identification data. The present disclosure further provides a resolution setting device and a display system.Type: GrantFiled: September 26, 2022Date of Patent: April 25, 2023Assignee: WISTRON CORP.Inventors: Po-Yen Huang, Kuang Wei Wang, Tzu-Chieh Lee, Yen-Hsiang Wang, Ching-Ting Huang